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GET /api/patches/1340949/?format=api
{ "id": 1340949, "url": "http://patchwork.ozlabs.org/api/patches/1340949/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/patch/20200804173223.36280-8-svaidy@linux.ibm.com/", "project": { "id": 44, "url": "http://patchwork.ozlabs.org/api/projects/44/?format=api", "name": "skiboot firmware development", "link_name": "skiboot", "list_id": "skiboot.lists.ozlabs.org", "list_email": "skiboot@lists.ozlabs.org", "web_url": "http://github.com/open-power/skiboot", "scm_url": "http://github.com/open-power/skiboot", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20200804173223.36280-8-svaidy@linux.ibm.com>", "list_archive_url": null, "date": "2020-08-04T17:32:19", "name": "[v6,07/11] cpu: Make cpu_get_core_index() return the fused core number", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "338af823b47a8d6b99cbd6e750a2de5202e2ba1c", "submitter": { "id": 76774, "url": "http://patchwork.ozlabs.org/api/people/76774/?format=api", "name": "Vaidyanathan Srinivasan", "email": "svaidy@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/skiboot/patch/20200804173223.36280-8-svaidy@linux.ibm.com/mbox/", "series": [ { "id": 194127, "url": "http://patchwork.ozlabs.org/api/series/194127/?format=api", "web_url": "http://patchwork.ozlabs.org/project/skiboot/list/?series=194127", "date": "2020-08-04T17:32:14", "name": "Initial fused-core support for POWER9", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/194127/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1340949/comments/", "check": "success", "checks": "http://patchwork.ozlabs.org/api/patches/1340949/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "skiboot@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4BLhkF1nzYz9sRR\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 5 Aug 2020 03:36:05 +1000 (AEST)", "from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 4BLhkD6ZjlzDqcD\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 5 Aug 2020 03:36:04 +1000 (AEST)", "from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com\n [148.163.156.1])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by lists.ozlabs.org (Postfix) with ESMTPS id 4BLhfQ3mzSzDqYq\n for <skiboot@lists.ozlabs.org>; Wed, 5 Aug 2020 03:32:46 +1000 (AEST)", "from pps.filterd (m0098394.ppops.net [127.0.0.1])\n by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n 074H320F019678; Tue, 4 Aug 2020 13:32:44 -0400", "from pps.reinject (localhost [127.0.0.1])\n by mx0a-001b2d01.pphosted.com with ESMTP id 32q86r0m0b-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Tue, 04 Aug 2020 13:32:44 -0400", "from m0098394.ppops.net (m0098394.ppops.net [127.0.0.1])\n by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 074H37M5020254;\n Tue, 4 Aug 2020 13:32:43 -0400", "from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com\n [169.51.49.99])\n by mx0a-001b2d01.pphosted.com with ESMTP id 32q86r0kyk-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Tue, 04 Aug 2020 13:32:43 -0400", "from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1])\n by ppma04ams.nl.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 074HQTuX006296;\n Tue, 4 Aug 2020 17:32:41 GMT", "from b06cxnps4074.portsmouth.uk.ibm.com\n (d06relay11.portsmouth.uk.ibm.com [9.149.109.196])\n by ppma04ams.nl.ibm.com with ESMTP id 32n0183hwe-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n Tue, 04 Aug 2020 17:32:40 +0000", "from b06wcsmtp001.portsmouth.uk.ibm.com\n (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160])\n by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id\n 074HWc7M31195480\n (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK);\n Tue, 4 Aug 2020 17:32:38 GMT", "from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n by IMSVA (Postfix) with ESMTP id A6E3AA405B;\n Tue, 4 Aug 2020 17:32:38 +0000 (GMT)", "from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n by IMSVA (Postfix) with ESMTP id 925A1A4054;\n Tue, 4 Aug 2020 17:32:37 +0000 (GMT)", "from drishya.in.ibm.com (unknown [9.102.1.52])\n by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP;\n Tue, 4 Aug 2020 17:32:37 +0000 (GMT)" ], "Authentication-Results": [ "ozlabs.org;\n dmarc=fail (p=none dis=none) header.from=linux.ibm.com", "lists.ozlabs.org; spf=pass (sender SPF authorized)\n smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1;\n helo=mx0a-001b2d01.pphosted.com; envelope-from=svaidy@linux.ibm.com;\n receiver=<UNKNOWN>)", "lists.ozlabs.org;\n dmarc=pass (p=none dis=none) header.from=linux.ibm.com" ], "From": "Vaidyanathan Srinivasan <svaidy@linux.ibm.com>", "To": "\"Oliver O'Halloran\" <oohall@gmail.com>", "Date": "Tue, 4 Aug 2020 23:02:19 +0530", "Message-Id": "<20200804173223.36280-8-svaidy@linux.ibm.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20200804173223.36280-1-svaidy@linux.ibm.com>", "References": "<20200804173223.36280-1-svaidy@linux.ibm.com>", "MIME-Version": "1.0", "X-TM-AS-GCONF": "00", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687\n definitions=2020-08-04_04:2020-08-03,\n 2020-08-04 signatures=0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n spamscore=0 impostorscore=0\n malwarescore=0 mlxlogscore=999 phishscore=0 clxscore=1015\n lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0\n mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2006250000 definitions=main-2008040126", "Subject": "[Skiboot] [PATCH v6 07/11] cpu: Make cpu_get_core_index() return\n the fused core number", "X-BeenThere": "skiboot@lists.ozlabs.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Mailing list for skiboot development <skiboot.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/skiboot>,\n <mailto:skiboot-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/skiboot/>", "List-Post": "<mailto:skiboot@lists.ozlabs.org>", "List-Help": "<mailto:skiboot-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/skiboot>,\n <mailto:skiboot-request@lists.ozlabs.org?subject=subscribe>", "Cc": "skiboot@lists.ozlabs.org, Michael Neuling <mikey@neuling.org>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org", "Sender": "\"Skiboot\"\n <skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org>" }, "content": "From: Benjamin Herrenschmidt <benh@kernel.crashing.org>\n\ncpu_get_core_index() currently uses pir_to_core_id() which returns\nan EC number always (ie, a normal core number) even in fused core\nmode. This is inconsistent with cpu_get_thread_index() which returns\na thread within a fused core (0...7) on P9.\n\nSo let's make things consistent and document it.\n\nSigned-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>\nSigned-off-by: Michael Neuling <mikey@neuling.org>\nSigned-off-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com>\n---\n core/chip.c | 13 +++++++++++++\n core/cpu.c | 2 +-\n include/chip.h | 5 +++++\n include/cpu.h | 6 ++++++\n 4 files changed, 25 insertions(+), 1 deletion(-)", "diff": "diff --git a/core/chip.c b/core/chip.c\nindex c57694ab..f1269d3f 100644\n--- a/core/chip.c\n+++ b/core/chip.c\n@@ -34,6 +34,19 @@ uint32_t pir_to_core_id(uint32_t pir)\n \t\tassert(false);\n }\n \n+uint32_t pir_to_fused_core_id(uint32_t pir)\n+{\n+\tif (proc_gen == proc_gen_p9) {\n+\t\tif (this_cpu()->is_fused_core)\n+\t\t\treturn P9_PIR2FUSEDCOREID(pir);\n+\t\telse\n+\t\t\treturn P9_PIR2COREID(pir);\n+\t} else if (proc_gen == proc_gen_p8)\n+\t\treturn P8_PIR2COREID(pir);\n+\telse\n+\t\tassert(false);\n+}\n+\n uint32_t pir_to_thread_id(uint32_t pir)\n {\n \tif (proc_gen == proc_gen_p9) {\ndiff --git a/core/cpu.c b/core/cpu.c\nindex 9d2cd56e..ff0442a8 100644\n--- a/core/cpu.c\n+++ b/core/cpu.c\n@@ -866,7 +866,7 @@ struct cpu_thread *first_available_core_in_chip(u32 chip_id)\n \n uint32_t cpu_get_core_index(struct cpu_thread *cpu)\n {\n-\treturn pir_to_core_id(cpu->pir);\n+\treturn pir_to_fused_core_id(cpu->pir);\n }\n \n void cpu_remove_node(const struct cpu_thread *t)\ndiff --git a/include/chip.h b/include/chip.h\nindex 2063cd29..4deb9618 100644\n--- a/include/chip.h\n+++ b/include/chip.h\n@@ -239,6 +239,11 @@ extern uint32_t pir_to_chip_id(uint32_t pir);\n extern uint32_t pir_to_core_id(uint32_t pir);\n extern uint32_t pir_to_thread_id(uint32_t pir);\n \n+/* In P9 fused core mode, this is the \"fused\" core ID, in\n+ * normal core mode or P8, this is the same as pir_to_core_id\n+ */\n+extern uint32_t pir_to_fused_core_id(uint32_t pir);\n+\n extern struct proc_chip *next_chip(struct proc_chip *chip);\n \n #define for_each_chip(__c) for (__c=next_chip(NULL); __c; __c=next_chip(__c))\ndiff --git a/include/cpu.h b/include/cpu.h\nindex 22f83440..b0c78ce6 100644\n--- a/include/cpu.h\n+++ b/include/cpu.h\n@@ -226,6 +226,12 @@ static inline __nomcount struct cpu_thread *this_cpu(void)\n \treturn __this_cpu;\n }\n \n+/*\n+ * Note: On POWER9 fused core, cpu_get_thread_index() and cpu_get_core_index()\n+ * return respectively the thread number within a fused core (0..7) and\n+ * the fused core number. If you want the EC (small core) number, you have\n+ * to use the low level pir_to_core_id() and pir_to_thread_id().\n+ */\n /* Get the thread # of a cpu within the core */\n static inline uint32_t cpu_get_thread_index(struct cpu_thread *cpu)\n {\n", "prefixes": [ "v6", "07/11" ] }