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{ "id": 819123, "url": "http://patchwork.ozlabs.org/api/covers/819123/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/1506515969-1472-1-git-send-email-kever.yang@rock-chips.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "list_archive_url": null, "date": "2017-09-27T12:39:21", "name": "[U-Boot,0/8] rockchip: add new SoC support for RK3128", "submitter": { "id": 64532, "url": "http://patchwork.ozlabs.org/api/people/64532/?format=api", "name": "Kever Yang", "email": "kever.yang@rock-chips.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/1506515969-1472-1-git-send-email-kever.yang@rock-chips.com/mbox/", "series": [ { "id": 5353, "url": "http://patchwork.ozlabs.org/api/series/5353/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=5353", "date": "2017-09-27T12:39:21", "name": "rockchip: add new SoC support for RK3128", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/5353/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/819123/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"nvUNt/DY\"; dkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2HTM60SHz9t33\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 27 Sep 2017 22:39:51 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 8F63DC21D7B; Wed, 27 Sep 2017 12:39:46 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 19FDCC21C46;\n\tWed, 27 Sep 2017 12:39:43 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid CA5D1C21C46; Wed, 27 Sep 2017 12:39:41 +0000 (UTC)", "from mail-pg0-f68.google.com (mail-pg0-f68.google.com\n\t[74.125.83.68])\n\tby lists.denx.de (Postfix) with ESMTPS id 29FC0C21C45\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 12:39:41 +0000 (UTC)", "by mail-pg0-f68.google.com with SMTP id u18so9103670pgo.1\n\tfor <u-boot@lists.denx.de>; Wed, 27 Sep 2017 05:39:41 -0700 (PDT)", "from localhost.localdomain ([103.29.142.67])\n\tby smtp.gmail.com with ESMTPSA id\n\tv24sm21833899pfi.132.2017.09.27.05.39.33\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tWed, 27 Sep 2017 05:39:38 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tRCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,\n\tT_DKIM_INVALID autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id;\n\tbh=Cax1+GY3K6cu8t9wsANS0BtkZm9gC/XmWllquGNGR78=;\n\tb=nvUNt/DYbw0idR/VB5iWKaJwuEOgzx0jKw9XtYF/hdOjlpMOrWGCwprIuxIOGHjFUG\n\tD6QnPpfDjn2itcqG7sdQudeDoq0gYh/xX9DD8B6j+cDLaVYXDpcSPJXNWt2Nxn7fDXjJ\n\tldnQYopOtaiReeR9UuajC/F3lbMc7RRnD/tZoZAHlgS+f0mPiEWIUHQwWd49GF6/JJm/\n\tFUV2Fup1pSxiWxwRkuXdxiCOD8cc+shocP6bnn30uOrrMXqrz9qt2hQfrnaz94OWkuhS\n\tVj115QYYYokdKdS281zFGfLKv0PJntSVtXRzJHpRelzx+ALWmKjEiuLgw3sLPUXNrfVG\n\t8vDw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id;\n\tbh=Cax1+GY3K6cu8t9wsANS0BtkZm9gC/XmWllquGNGR78=;\n\tb=ACiS1nacxftUvwg+DEyWpUjQBUDaJzP+w+p5vS3uNp7RjUh4OKeNk2DaFxcNj/IBBd\n\tDYv1sHtuL3MfiIJ0L3Z7+qFO4Jgawqrf1hxvAAKAAouMxvCVQ5OJb5EHxxFtb4AFd9z/\n\tRUgN+zBTLJqmaosVRKuJNUvN3zgrT4zjab89Np7jSKBPuNFYEAESPUV1iiZUEeyFmqnl\n\tgYi4rCJepAyVE55I5BlFjybTigjNZE+rS7vsqZClKoNgN0FGvyR/m8FlakuVzVtKWLh4\n\t1NQuDR3UwVtjUGtGGm8iyCbhVE/C8YOBO+i+mS+RjtYaoIY/ThWpnYvS5LCGeH9eQc++\n\tOyaw==", "X-Gm-Message-State": "AHPjjUiGYvZfs83C+D3XSTQPIYNlHmKt/QClKZfgG7neLh3PcvRTCeim\n\tQu2UU3dyZN/jYLq4OSUF1MzPJQ==", "X-Google-Smtp-Source": "AOwi7QC5LWyTzJp+lnQNAeG89Svts0L4nrciJSwiUKgPDy7RvO/jrVRWqKv/mIzP4bWEsEPewqrmfQ==", "X-Received": "by 10.98.10.12 with SMTP id s12mr1218417pfi.127.1506515979315;\n\tWed, 27 Sep 2017 05:39:39 -0700 (PDT)", "From": "Kever Yang <kever.yang@rock-chips.com>", "To": "u-boot@lists.denx.de", "Date": "Wed, 27 Sep 2017 20:39:21 +0800", "Message-Id": "<1506515969-1472-1-git-send-email-kever.yang@rock-chips.com>", "X-Mailer": "git-send-email 1.9.1", "Cc": "Stefan Roese <sr@denx.de>, Chris Packham <judge.packham@gmail.com>,\n\tWilliam Zhang <william.zhang@rock-chips.com>,\n\tJernej Skrabec <jernej.skrabec@siol.net>,\n\tJacob Chen <jacob2.chen@rock-chips.com>,\n\tAndy Yan <andy.yan@rock-chips.com>, \n\tMaxime Ripard <maxime.ripard@free-electrons.com>", "Subject": "[U-Boot] [PATCH 0/8] rockchip: add new SoC support for RK3128", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic\nsupport for it, it does not support SPL/TPL now, and the sdram driver\nonly support get dram size from sysreg in U-Boot stage. Most of basic\ndriver like clock, pinctrl, sysreset have been implement, and more\ndrivers like mac and display will be later.\n\n\n\nKever Yang (8):\n rockchip: rk3128: add device tree file\n rockchip: rk3128: add soc basic support\n rockchip: rk3128: add clock driver\n rockchip: rk3128: add pinctrl driver\n rockchip: rk3128: add sysreset driver\n rockchip: rk3128: add evb-rk3128 support\n rockchip: rk3128: add defconfig for evb-rk3128\n rockchip: rk3128: add sdram driver\n\n arch/arm/dts/Makefile | 1 +\n arch/arm/dts/rk3128-evb.dts | 77 +++\n arch/arm/dts/rk3128.dtsi | 756 ++++++++++++++++++++++++\n arch/arm/include/asm/arch-rockchip/cru_rk3128.h | 173 ++++++\n arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 +++++++++++++++++\n arch/arm/mach-rockchip/Kconfig | 10 +\n arch/arm/mach-rockchip/Makefile | 2 +\n arch/arm/mach-rockchip/rk3128-board.c | 146 +++++\n arch/arm/mach-rockchip/rk3128/Kconfig | 23 +\n arch/arm/mach-rockchip/rk3128/Makefile | 9 +\n arch/arm/mach-rockchip/rk3128/clk_rk3128.c | 32 +\n arch/arm/mach-rockchip/rk3128/rk3128.c | 12 +\n arch/arm/mach-rockchip/rk3128/syscon_rk3128.c | 21 +\n board/rockchip/evb_rk3128/Kconfig | 15 +\n board/rockchip/evb_rk3128/MAINTAINERS | 6 +\n board/rockchip/evb_rk3128/Makefile | 7 +\n board/rockchip/evb_rk3128/evb-rk3128.c | 9 +\n configs/evb-rk3128_defconfig | 42 ++\n drivers/clk/rockchip/Makefile | 3 +-\n drivers/clk/rockchip/clk_rk3128.c | 350 +++++++++++\n drivers/pinctrl/Kconfig | 10 +\n drivers/pinctrl/rockchip/Makefile | 4 +-\n drivers/pinctrl/rockchip/pinctrl_rk3128.c | 192 ++++++\n drivers/ram/rockchip/Makefile | 1 +\n drivers/ram/rockchip/sdram_rk3128.c | 60 ++\n drivers/sysreset/Makefile | 1 +\n drivers/sysreset/sysreset_rk3128.c | 45 ++\n include/configs/evb_rk3128.h | 23 +\n include/configs/rk3128_common.h | 70 +++\n include/dt-bindings/clock/rk3128-cru.h | 187 ++++++\n 30 files changed, 2835 insertions(+), 3 deletions(-)\n create mode 100644 arch/arm/dts/rk3128-evb.dts\n create mode 100644 arch/arm/dts/rk3128.dtsi\n create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3128.h\n create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3128.h\n create mode 100644 arch/arm/mach-rockchip/rk3128-board.c\n create mode 100644 arch/arm/mach-rockchip/rk3128/Kconfig\n create mode 100644 arch/arm/mach-rockchip/rk3128/Makefile\n create mode 100644 arch/arm/mach-rockchip/rk3128/clk_rk3128.c\n create mode 100644 arch/arm/mach-rockchip/rk3128/rk3128.c\n create mode 100644 arch/arm/mach-rockchip/rk3128/syscon_rk3128.c\n create mode 100644 board/rockchip/evb_rk3128/Kconfig\n create mode 100644 board/rockchip/evb_rk3128/MAINTAINERS\n create mode 100644 board/rockchip/evb_rk3128/Makefile\n create mode 100644 board/rockchip/evb_rk3128/evb-rk3128.c\n create mode 100644 configs/evb-rk3128_defconfig\n create mode 100644 drivers/clk/rockchip/clk_rk3128.c\n create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3128.c\n create mode 100644 drivers/ram/rockchip/sdram_rk3128.c\n create mode 100644 drivers/sysreset/sysreset_rk3128.c\n create mode 100644 include/configs/evb_rk3128.h\n create mode 100644 include/configs/rk3128_common.h\n create mode 100644 include/dt-bindings/clock/rk3128-cru.h" }