From patchwork Wed Sep 27 12:39:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 819123 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="nvUNt/DY"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3y2HTM60SHz9t33 for ; Wed, 27 Sep 2017 22:39:51 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 8F63DC21D7B; Wed, 27 Sep 2017 12:39:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 19FDCC21C46; Wed, 27 Sep 2017 12:39:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CA5D1C21C46; Wed, 27 Sep 2017 12:39:41 +0000 (UTC) Received: from mail-pg0-f68.google.com (mail-pg0-f68.google.com [74.125.83.68]) by lists.denx.de (Postfix) with ESMTPS id 29FC0C21C45 for ; Wed, 27 Sep 2017 12:39:41 +0000 (UTC) Received: by mail-pg0-f68.google.com with SMTP id u18so9103670pgo.1 for ; Wed, 27 Sep 2017 05:39:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id; bh=Cax1+GY3K6cu8t9wsANS0BtkZm9gC/XmWllquGNGR78=; b=nvUNt/DYbw0idR/VB5iWKaJwuEOgzx0jKw9XtYF/hdOjlpMOrWGCwprIuxIOGHjFUG D6QnPpfDjn2itcqG7sdQudeDoq0gYh/xX9DD8B6j+cDLaVYXDpcSPJXNWt2Nxn7fDXjJ ldnQYopOtaiReeR9UuajC/F3lbMc7RRnD/tZoZAHlgS+f0mPiEWIUHQwWd49GF6/JJm/ FUV2Fup1pSxiWxwRkuXdxiCOD8cc+shocP6bnn30uOrrMXqrz9qt2hQfrnaz94OWkuhS Vj115QYYYokdKdS281zFGfLKv0PJntSVtXRzJHpRelzx+ALWmKjEiuLgw3sLPUXNrfVG 8vDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=Cax1+GY3K6cu8t9wsANS0BtkZm9gC/XmWllquGNGR78=; b=ACiS1nacxftUvwg+DEyWpUjQBUDaJzP+w+p5vS3uNp7RjUh4OKeNk2DaFxcNj/IBBd DYv1sHtuL3MfiIJ0L3Z7+qFO4Jgawqrf1hxvAAKAAouMxvCVQ5OJb5EHxxFtb4AFd9z/ RUgN+zBTLJqmaosVRKuJNUvN3zgrT4zjab89Np7jSKBPuNFYEAESPUV1iiZUEeyFmqnl gYi4rCJepAyVE55I5BlFjybTigjNZE+rS7vsqZClKoNgN0FGvyR/m8FlakuVzVtKWLh4 1NQuDR3UwVtjUGtGGm8iyCbhVE/C8YOBO+i+mS+RjtYaoIY/ThWpnYvS5LCGeH9eQc++ Oyaw== X-Gm-Message-State: AHPjjUiGYvZfs83C+D3XSTQPIYNlHmKt/QClKZfgG7neLh3PcvRTCeim Qu2UU3dyZN/jYLq4OSUF1MzPJQ== X-Google-Smtp-Source: AOwi7QC5LWyTzJp+lnQNAeG89Svts0L4nrciJSwiUKgPDy7RvO/jrVRWqKv/mIzP4bWEsEPewqrmfQ== X-Received: by 10.98.10.12 with SMTP id s12mr1218417pfi.127.1506515979315; Wed, 27 Sep 2017 05:39:39 -0700 (PDT) Received: from localhost.localdomain ([103.29.142.67]) by smtp.gmail.com with ESMTPSA id v24sm21833899pfi.132.2017.09.27.05.39.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 Sep 2017 05:39:38 -0700 (PDT) From: Kever Yang To: u-boot@lists.denx.de Date: Wed, 27 Sep 2017 20:39:21 +0800 Message-Id: <1506515969-1472-1-git-send-email-kever.yang@rock-chips.com> X-Mailer: git-send-email 1.9.1 Cc: Stefan Roese , Chris Packham , William Zhang , Jernej Skrabec , Jacob Chen , Andy Yan , Maxime Ripard Subject: [U-Boot] [PATCH 0/8] rockchip: add new SoC support for RK3128 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" RK3128 is a quad-core ARM Cortex-A7 SoC, this patch set add basic support for it, it does not support SPL/TPL now, and the sdram driver only support get dram size from sysreg in U-Boot stage. Most of basic driver like clock, pinctrl, sysreset have been implement, and more drivers like mac and display will be later. Kever Yang (8): rockchip: rk3128: add device tree file rockchip: rk3128: add soc basic support rockchip: rk3128: add clock driver rockchip: rk3128: add pinctrl driver rockchip: rk3128: add sysreset driver rockchip: rk3128: add evb-rk3128 support rockchip: rk3128: add defconfig for evb-rk3128 rockchip: rk3128: add sdram driver arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3128-evb.dts | 77 +++ arch/arm/dts/rk3128.dtsi | 756 ++++++++++++++++++++++++ arch/arm/include/asm/arch-rockchip/cru_rk3128.h | 173 ++++++ arch/arm/include/asm/arch-rockchip/grf_rk3128.h | 551 +++++++++++++++++ arch/arm/mach-rockchip/Kconfig | 10 + arch/arm/mach-rockchip/Makefile | 2 + arch/arm/mach-rockchip/rk3128-board.c | 146 +++++ arch/arm/mach-rockchip/rk3128/Kconfig | 23 + arch/arm/mach-rockchip/rk3128/Makefile | 9 + arch/arm/mach-rockchip/rk3128/clk_rk3128.c | 32 + arch/arm/mach-rockchip/rk3128/rk3128.c | 12 + arch/arm/mach-rockchip/rk3128/syscon_rk3128.c | 21 + board/rockchip/evb_rk3128/Kconfig | 15 + board/rockchip/evb_rk3128/MAINTAINERS | 6 + board/rockchip/evb_rk3128/Makefile | 7 + board/rockchip/evb_rk3128/evb-rk3128.c | 9 + configs/evb-rk3128_defconfig | 42 ++ drivers/clk/rockchip/Makefile | 3 +- drivers/clk/rockchip/clk_rk3128.c | 350 +++++++++++ drivers/pinctrl/Kconfig | 10 + drivers/pinctrl/rockchip/Makefile | 4 +- drivers/pinctrl/rockchip/pinctrl_rk3128.c | 192 ++++++ drivers/ram/rockchip/Makefile | 1 + drivers/ram/rockchip/sdram_rk3128.c | 60 ++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_rk3128.c | 45 ++ include/configs/evb_rk3128.h | 23 + include/configs/rk3128_common.h | 70 +++ include/dt-bindings/clock/rk3128-cru.h | 187 ++++++ 30 files changed, 2835 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3128-evb.dts create mode 100644 arch/arm/dts/rk3128.dtsi create mode 100644 arch/arm/include/asm/arch-rockchip/cru_rk3128.h create mode 100644 arch/arm/include/asm/arch-rockchip/grf_rk3128.h create mode 100644 arch/arm/mach-rockchip/rk3128-board.c create mode 100644 arch/arm/mach-rockchip/rk3128/Kconfig create mode 100644 arch/arm/mach-rockchip/rk3128/Makefile create mode 100644 arch/arm/mach-rockchip/rk3128/clk_rk3128.c create mode 100644 arch/arm/mach-rockchip/rk3128/rk3128.c create mode 100644 arch/arm/mach-rockchip/rk3128/syscon_rk3128.c create mode 100644 board/rockchip/evb_rk3128/Kconfig create mode 100644 board/rockchip/evb_rk3128/MAINTAINERS create mode 100644 board/rockchip/evb_rk3128/Makefile create mode 100644 board/rockchip/evb_rk3128/evb-rk3128.c create mode 100644 configs/evb-rk3128_defconfig create mode 100644 drivers/clk/rockchip/clk_rk3128.c create mode 100644 drivers/pinctrl/rockchip/pinctrl_rk3128.c create mode 100644 drivers/ram/rockchip/sdram_rk3128.c create mode 100644 drivers/sysreset/sysreset_rk3128.c create mode 100644 include/configs/evb_rk3128.h create mode 100644 include/configs/rk3128_common.h create mode 100644 include/dt-bindings/clock/rk3128-cru.h