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{ "id": 818933, "url": "http://patchwork.ozlabs.org/api/covers/818933/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/cover/1506490483-46871-1-git-send-email-vviswana@codeaurora.org/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1506490483-46871-1-git-send-email-vviswana@codeaurora.org>", "list_archive_url": null, "date": "2017-09-27T05:34:39", "name": "[v2,0/4] mmc: sdhci-msm: Corrections to implementation of power irq", "submitter": { "id": 72258, "url": "http://patchwork.ozlabs.org/api/people/72258/?format=api", "name": "Vijay Viswanath", "email": "vviswana@codeaurora.org" }, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/cover/1506490483-46871-1-git-send-email-vviswana@codeaurora.org/mbox/", "series": [ { "id": 5282, "url": "http://patchwork.ozlabs.org/api/series/5282/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=5282", "date": "2017-09-27T05:34:39", "name": "mmc: sdhci-msm: Corrections to implementation of power irq", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/5282/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/818933/comments/", "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; 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bh=XQy/19B7l2eSiopd4GV8Oaytt5HRhtJ97d9GueWPiiM=;\n\tb=bdH\n\tHT7a1coIglAxwVrKFWNU9yK+mKA9RzLVIy53c7Aqxk0XRkm7Y8LT15C+RmXjMDt1sLVmo1MmkS86k\n\tlSkjNTTUsHo9TGmlm2Olv7bljXKNUA2QncpDSnp8cSuMuPckuj+B+Dlwqa7rZCswuetZwBGh0Z+hK\n\tMgkoTbXjc7/W+bz+rzyIqgszJViu/+zOvTCyEetuLTAff5wjrLs9+cYAPWu47gCsYiSSH2hleo4hX\n\te6itzy/yxj7knpqIVXL+J9QT0Ogd7xE+gHxXQnv7RfIQbWabMrnk0g2fqBt4zJVo6rNd/pBfRks7r\n\tTBy1it0DZOD5ey4vD3nw8btF65jFNJg==;", "v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1506490499;\n\tbh=8HVKIPyjG5CyvlGbj8cNFc0G7WPoi/ycZsoyrQG5mik=;\n\th=From:To:Cc:Subject:Date:From;\n\tb=Q/G9U0Lt9XjgsrPeQswWra6f/CI9TNMwAnPkB7eH6hUfG26T0UZS+/AtTgfl0XFsw\n\tUBLQBf5i3Pk5Cch3Sz/4Uljr4PA91pFBG8GurO6UXhovNeBXm6Hz1Ua02sbCF7FEbJ\n\t4iUAF7/ns/OmghrbO04fQKo79ieKbtSx6XQY8Ej4=", "v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org;\n\ts=default; t=1506490498;\n\tbh=8HVKIPyjG5CyvlGbj8cNFc0G7WPoi/ycZsoyrQG5mik=;\n\th=From:To:Cc:Subject:Date:From;\n\tb=RNi25UXFYbcIq2zi+49XuibEfIt7DnPhf8pY2DCFtiAMcQNnUeImQUJehb0GBViCD\n\tzikGoT8YJc4WFjyDEXHjnVc1BEMJdiaULNb1rCFCsog/YAvisOlFKOuuvbkET4cDX5\n\tVpuptvC7D72Trn85SoKqXFZCmoVGVBNq+yezE/9A=" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on\n\tpdx-caf-mail.web.codeaurora.org", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00,\n\tDKIM_SIGNED,\n\tT_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0", "DMARC-Filter": "OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1544E6029B", "From": "Vijay Viswanath <vviswana@codeaurora.org>", "To": "adrian.hunter@intel.com,\n\tulf.hansson@linaro.org,\n\twill.deacon@arm.com", "Subject": "[PATCH v2 0/4] mmc: sdhci-msm: Corrections to implementation of\n\tpower irq", "Date": "Wed, 27 Sep 2017 11:04:39 +0530", "Message-Id": "<1506490483-46871-1-git-send-email-vviswana@codeaurora.org>", "X-Mailer": "git-send-email 1.9.1", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170926_223520_336090_FA732E83 ", "X-CRM114-Status": "GOOD ( 10.83 )", "X-Spam-Score": "-4.3 (----)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-4.3 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/,\n\tmedium trust [198.145.29.96 listed in list.dnswl.org]\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "riteshh@codeaurora.org, linux-arm-msm@vger.kernel.org,\n\tlinux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tVijay Viswanath <vviswana@codeaurora.org>, stummala@codeaurora.org,\n\tsubhashj@codeaurora.org, linux-arm-kernel@lists.infradead.org,\n\tasutoshd@codeaurora.org", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "Register writes which change voltage of IO lines or turn the IO bus on/off\nrequire sdhc controller to be ready before progressing further. Once a\nregister write which affects IO lines is done, the driver should wait for\npower irq from controller. Once the irq comes, the driver should acknowledge\nthe irq by writing to power control register. If the acknowledgement is not\ngiven to controller, the controller may not complete the corresponding\nregister write action and this can mess up the controller if drivers proceeds\nwithout power irq completing.\n\nChanges since v1:\n\tPatch enabling MMC_IO_ACCESSORS in Kconfig moved up the patch list.\n\tAlso corrected a mistake in the patch.\n\tRemoved all ifdef CONFIG_MMC_IO_ACCESSORS since the patches using it\n\twill come after MMC_IO_ACCESSORS are enabled.\n\tMerged the patches 3 & 4 of earlier series into 1 patch (patch 4 in\n\tcurrent series).\n\tCorrected a mistake in a comment text in patch 3 of previous series. \n\nChanges since RFC:\n\twait_for_completion_timeout replaced with wait_event_timeout when\n\twaiting for power irq.\n\tRemoved the spinlock within power irq handler and API which waits\n\tfor power irq.\n\tAdded comments to sdhci msm register write functions, warning that they\n\tcan sleep.\n\tSdhci msm register write functions will do a memory barrier before\n\twriting to the register if the particular register can trigger\n\tpower irq.\n\tInstead of enabling SDHCI IO ACCESSORS config in arm64/defconfig, it\n\twill be selected in mmc/host/Kconfig if the platform is MMC_SDHCI_MSM.\n\nSahitya Tummala (1):\n mmc: sdhci-msm: Fix HW issue with power IRQ handling during reset\n\nSubhash Jadavani (1):\n mmc: sdhci-msm: fix issue with power irq\n\nVijay Viswanath (2):\n mmc: Kconfig: Enable CONFIG_MMC_SDHCI_IO_ACCESSORS\n mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr\n irq\n\n drivers/mmc/host/Kconfig | 1 +\n drivers/mmc/host/sdhci-msm.c | 235 ++++++++++++++++++++++++++++++++++++++++++-\n 2 files changed, 231 insertions(+), 5 deletions(-)" }