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{
    "id": 818877,
    "url": "http://patchwork.ozlabs.org/api/covers/818877/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170927005516.28374-1-kalyan.kinthada@alliedtelesis.co.nz/",
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        "name": "Devicetree Bindings",
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    "msgid": "<20170927005516.28374-1-kalyan.kinthada@alliedtelesis.co.nz>",
    "list_archive_url": null,
    "date": "2017-09-27T00:55:15",
    "name": "[v2,0/1] Set FORCE_CSX bit when arbitration between NAND and NOR is enabled.",
    "submitter": {
        "id": 72417,
        "url": "http://patchwork.ozlabs.org/api/people/72417/?format=api",
        "name": "Kalyan Kinthada",
        "email": "kalyan.kinthada@alliedtelesis.co.nz"
    },
    "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170927005516.28374-1-kalyan.kinthada@alliedtelesis.co.nz/mbox/",
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        {
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            "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=5258",
            "date": "2017-09-27T00:55:15",
            "name": "Set FORCE_CSX bit when arbitration between NAND and NOR is enabled.",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/5258/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/covers/818877/comments/",
    "headers": {
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        "From": "Kalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz>",
        "To": "dwmw2@infradead.org, computersforpeace@gmail.com,\n\tboris.brezillon@free-electrons.com, marek.vasut@gmail.com,\n\trichard@nod.at, cyrille.pitchen@wedev4u.fr, robh+dt@kernel.org,\n\tmark.rutland@arm.com, ezequiel.garcia@free-electrons.com,\n\tmiquel.raynal@free-electrons.com, devicetree@vger.kernel.org",
        "Cc": "linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tchris.packham@alliedtelesis.co.nz,\n\tKalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz>",
        "Subject": "[PATCH v2 0/1] Set FORCE_CSX bit when arbitration between NAND and\n\tNOR is enabled. ",
        "Date": "Wed, 27 Sep 2017 13:55:15 +1300",
        "Message-Id": "<20170927005516.28374-1-kalyan.kinthada@alliedtelesis.co.nz>",
        "X-Mailer": "git-send-email 2.14.1",
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        "Precedence": "bulk",
        "List-ID": "<devicetree.vger.kernel.org>",
        "X-Mailing-List": "devicetree@vger.kernel.org"
    },
    "content": "When the arbitration between NOR and NAND flash is enabled\nthe <FORCE_CSX> field bit[21] in the Data Flash Control Register\nneeds to be set to 1 according to guidleine GL-5830741.\n\nSet the FORCE_CSX bit in NDCR for ARMADA370 variants as the arbitration\nis always enabled by default.\n\nChanges since v1:\n\nThanks Miquel RAYNAL for the suggestion.\n* Deleted: \"dt-bindings: mtd: pxa3xx: Add \"marvell,nand-force-csx\" compatible string\"\n  Not necessary to create a new compatible string.\n\n* \"mtd-nand-pxa3xx-Set-FORCE_CSX-bit-to-ARMADA370-variants\" \n  Modified commit message.\n  This commit sets the FORCE_CSX bit for all ARMADA370 variants.\n\n----\nKalyan Kinthada (1):\n  mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants.\n\n drivers/mtd/nand/pxa3xx_nand.c | 7 +++++++\n 1 file changed, 7 insertions(+)"
}