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{ "id": 817966, "url": "http://patchwork.ozlabs.org/api/covers/817966/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170924195000.13276-1-martin.blumenstingl@googlemail.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170924195000.13276-1-martin.blumenstingl@googlemail.com>", "list_archive_url": null, "date": "2017-09-24T19:49:58", "name": "[0/2] Meson GXL USB3 PHY and OTG detection driver", "submitter": { "id": 66366, "url": "http://patchwork.ozlabs.org/api/people/66366/?format=api", "name": "Martin Blumenstingl", "email": "martin.blumenstingl@googlemail.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170924195000.13276-1-martin.blumenstingl@googlemail.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/covers/817966/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tSun, 24 Sep 2017 12:50:12 -0700 (PDT)", "From": "Martin Blumenstingl <martin.blumenstingl@googlemail.com>", "To": "kishon@ti.com, robh+dt@kernel.org, mark.rutland@arm.com,\n\tdevicetree@vger.kernel.org, linux-amlogic@lists.infradead.org", "Cc": "carlo@caione.org, khilman@baylibre.com, narmstrong@baylibre.com,\n\tjbrunet@baylibre.com,\n\tMartin Blumenstingl <martin.blumenstingl@googlemail.com>", "Subject": "[PATCH 0/2] Meson GXL USB3 PHY and OTG detection driver", "Date": "Sun, 24 Sep 2017 21:49:58 +0200", "Message-Id": "<20170924195000.13276-1-martin.blumenstingl@googlemail.com>", "X-Mailer": "git-send-email 2.14.1", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Amlogic Meson GXL SoCs use a dwc3 controller with two USB2 ports,\nMeson GXM SoCs use the same dwc3 controller but with three USB3\nports enabled. Neither of these SoCs has any USB3 port enabled in\nthe dwc3 registers.\nThe first USB2 port on both SoCs supports host and peripheral\n(also called \"device\") mode.\n\nThe dwc3 controller supports host mode only. Peripheral mode is\nimplemented through an additional dwc2 controller (which only enables\ndevice mode). The USB3 PHY has register bits which allow a driver to\ndetect the current mode - however this is currently not implemented\nas the dwc2 controller seems to hang during reset (and I do not have\na use-case where I need peripheral/device mode).\n\nWhile the dwc3 controller has no USB3 port enabled we still need the\nUSB3 PHY to be initialized, otherwise some boards (probably those where\nthe bootloader does not initialize the USB3 PHY) show errors with\nhigh-speed USB devices connected to any of the USB2 ports. Configuring\nthe USB_R1_U3H_FLADJ_30MHZ_REG_MASK register as it's done by Amlogic's\nvendor GPL kernel sources makes these error go away.\n\nThanks to Jerome Brunet for reporting the errors and Neil Armstrong\nfor discovering that initializing the USB3 PHY fixes these USB errors!\n\n\nMartin Blumenstingl (2):\n dt-bindings: phy: Add support for the USB3 PHY on Amlogic Meson GXL\n SoCs\n phy: amlogic: add USB3 PHY support for Meson GXL and GXM\n\n .../devicetree/bindings/phy/meson-gxl-usb3-phy.txt | 19 +++\n drivers/phy/amlogic/Kconfig | 12 ++\n drivers/phy/amlogic/Makefile | 1 +\n drivers/phy/amlogic/phy-meson-gxl-usb3.c | 177 +++++++++++++++++++++\n 4 files changed, 209 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/phy/meson-gxl-usb3-phy.txt\n create mode 100644 drivers/phy/amlogic/phy-meson-gxl-usb3.c" }