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{ "id": 816442, "url": "http://patchwork.ozlabs.org/api/covers/816442/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20170920201737.25723-1-f4bug@amsat.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170920201737.25723-1-f4bug@amsat.org>", "list_archive_url": null, "date": "2017-09-20T20:17:32", "name": "[v11,0/5] Add support for Smartfusion2 SoC", "submitter": { "id": 70924, "url": "http://patchwork.ozlabs.org/api/people/70924/?format=api", "name": "Philippe Mathieu-Daudé", "email": "f4bug@amsat.org" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20170920201737.25723-1-f4bug@amsat.org/mbox/", "series": [ { "id": 4222, "url": "http://patchwork.ozlabs.org/api/series/4222/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=4222", "date": "2017-09-20T20:17:32", "name": "Add support for Smartfusion2 SoC", "version": 11, "mbox": "http://patchwork.ozlabs.org/series/4222/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/816442/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:mime-version:content-transfer-encoding;\n\tbh=qFwqEGt6qJ1SihLBkLZ/xpvOEpB0CFAu2sXovo/gg7s=;\n\tb=OSaOFh61tsufvCdbtxjIM5CfnNRyR6r5Uh5BS1R96VZ4fXAh/MAbgr8kqRCRDo7tRV\n\to976gv4+B0oVRYA36lIwO6FsTIlDOWtoC9EGUa5hyRhGjo4vYKKigZnpDttVtNETfh+Z\n\tQ937P2S7CDcFkyI95z/BBE3q6MzCOsCLjV6kfzMFh4gy9sGZizS4quuaDPYNYfxMbxqt\n\tbzxcAi6pcch1wm12OweYtljAEY4FxTNbsXj+pV/gL2WGSTDlH7s5j1kQmH8OobsaTYpN\n\tC4gTtCvLsi1mM3p5Cjx2WboqtP/0qeWmqWzkk/s4afD7WaI3ht9GIFf243VZl0wcs07r\n\tuyCw==", "X-Gm-Message-State": "AHPjjUg3DsWsvqU132V/IgerPR/7almaAyc7v9JUGkZ1UwiT1A94Etwx\n\tX3S564H3Q3fxZ9nN/jSPlp4=", "X-Google-Smtp-Source": "AOwi7QDadJQAN5JkYKRrW45l0whQuL2WtCjILCAvZfqRh/YQbascMGTo2GT4yeBmE9F8Z6i89EbYvw==", "X-Received": "by 10.200.34.251 with SMTP id g56mr876251qta.160.1505938669316; \n\tWed, 20 Sep 2017 13:17:49 -0700 (PDT)", "From": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>", "To": "Peter Maydell <peter.maydell@linaro.org>,\n\tSubbaraya Sundeep <sundeep.lkml@gmail.com>,\n\tAlistair Francis <alistair@alistair23.me>,\n\tPeter Crosthwaite <crosthwaite.peter@gmail.com>,\n\tIgor Mammedov <imammedo@redhat.com>, qemu-devel@nongnu.org,\n\tqemu-arm@nongnu.org", "Date": "Wed, 20 Sep 2017 17:17:32 -0300", "Message-Id": "<20170920201737.25723-1-f4bug@amsat.org>", "X-Mailer": "git-send-email 2.14.1", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-detected-operating-system": "by eggs.gnu.org: Genre and OS details not\n\trecognized.", "X-Received-From": "2607:f8b0:400d:c0d::242", "Subject": "[Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Hi Peter,\n\nNow than Igor's patch landed, I respin Sundeep's series updating it to work\nafter the \"arm: drop intermediate cpu_model -> cpu type parsing and use cpu\ntype directly\" patch.\n\nv11:\n- msf2-soc.c: add a check for null m3clk\n- msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type\n\n--\n\nSundeep original cover:\n\nI am trying to add Smartfusion2 SoC.\nSoC is from Microsemi and System on Module(SOM)\nboard is from Emcraft systems. Smartfusion2 has hardened\nMicrocontroller(Cortex-M3)based Sub System and FPGA fabric.\nAt the moment only system timer, sysreg and SPI\ncontroller are modelled.\n\nTesting:\n./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio \\\n-kernel u-boot.bin -display none -drive file=spi.bin,if=mtd,format=raw\n\nBinaries u-boot.bin and spi.bin are at:\nhttps://github.com/Subbaraya-Sundeep/qemu-test-binaries.git\n\nU-boot is from Emcraft with modified\n - SPI driver not to use PDMA.\n - ugly hack to pass dtb to kernel in r1.\n@\nhttps://github.com/Subbaraya-Sundeep/emcraft-uboot-sf2.git\n\nLinux is 4.5 linux with Smartfusion2 SoC dts and clocksource\ndriver added by myself @\nhttps://github.com/Subbaraya-Sundeep/linux.git\n\nv10:\n Added msf2_sysreg_realize in msf2-sysreg.c\n modified unimplemented devices names:\n pdma->dma and hpdma->hs-dma\n used uint8_t for apb divisors properties\n simplified msf2_divbits() using ctz32()\n\nv9:\n used trace instead of DB_PRINT in msf2-sysreg.c\n used LOG_UNIMP for non guest errors in msf2-sysreg.c\n added unimplemented devices in msf2-soc.c\n removed .alias suffix in alias memory region name for eNVM\n removed mc->ignore_memory_transaction_failures in msf2-som.c\n\nv8:\n memory_region_init_ram to memory_region_init_rom in soc\n %s/emcraft_sf2_init/emcraft_sf2_s2s010_init/g in som\n Added mc->ignore_memory_transaction_failures = true in som\n as per latest commit.\n Code simplifications as suggested by Alistair in sysreg and ssi.\n\nv7:\n Removed vmstate_register_ram_global as per latest commit\n Moved header files to C which are local to C source files\n Removed abort() from msf2-sysreg.c\n Added VMStateDescription in mss-timer.c\n\nv6:\n Moved some defines from header files to source files\n Added properties m3clk, apb0div, apb0div1 properties\n to soc.\n Added properties apb0divisor, apb1divisor to sysreg\n Update system_clock_source in msf2-soc.c\n Changed machine name smartfusion2-som->emcraft-sf2\n\nv5\n As per Philippe comments:\n Added abort in Sysreg if guest tries to remap memory\n other than default mapping.\n Use of CONFIG_MSF2 in Makefile for soc.c\n Fixed incorrect logic in timer model.\n Renamed msf2-timer.c -> mss-timer.c\n msf2-spi.c -> mss-spi.c also type names\n Renamed function msf2_init->emcraft_sf2_init in msf2-som.c\n Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1\n properties to soc.\n Pass soc part-name,memory size and clock rate properties from som.\nv4:\n Fixed build failure by using PRIx macros.\nv3:\n Added SoC file and board file as per Alistair comments.\nv2:\n Added SPI controller so that u-boot loads kernel from spi flash.\nv1:\n Initial patch set with timer and sysreg\n\nThanks,\nSundeep\n\nSubbaraya Sundeep (5):\n msf2: Add Smartfusion2 System timer\n msf2: Microsemi Smartfusion2 System Register block\n msf2: Add Smartfusion2 SPI controller\n msf2: Add Smartfusion2 SoC\n msf2: Add Emcraft's Smartfusion2 SOM kit\n\n default-configs/arm-softmmu.mak | 1 +\n include/hw/arm/msf2-soc.h | 67 +++++++\n include/hw/misc/msf2-sysreg.h | 77 ++++++++\n include/hw/ssi/mss-spi.h | 58 ++++++\n include/hw/timer/mss-timer.h | 64 +++++++\n hw/arm/msf2-soc.c | 238 +++++++++++++++++++++++\n hw/arm/msf2-som.c | 105 +++++++++++\n hw/misc/msf2-sysreg.c | 160 ++++++++++++++++\n hw/ssi/mss-spi.c | 404 ++++++++++++++++++++++++++++++++++++++++\n hw/timer/mss-timer.c | 289 ++++++++++++++++++++++++++++\n hw/arm/Makefile.objs | 1 +\n hw/misc/Makefile.objs | 1 +\n hw/misc/trace-events | 5 +\n hw/ssi/Makefile.objs | 1 +\n hw/timer/Makefile.objs | 1 +\n 15 files changed, 1472 insertions(+)\n create mode 100644 include/hw/arm/msf2-soc.h\n create mode 100644 include/hw/misc/msf2-sysreg.h\n create mode 100644 include/hw/ssi/mss-spi.h\n create mode 100644 include/hw/timer/mss-timer.h\n create mode 100644 hw/arm/msf2-soc.c\n create mode 100644 hw/arm/msf2-som.c\n create mode 100644 hw/misc/msf2-sysreg.c\n create mode 100644 hw/ssi/mss-spi.c\n create mode 100644 hw/timer/mss-timer.c" }