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    "msgid": "<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>",
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    "date": "2017-09-20T18:28:56",
    "name": "[v2,0/3] Altera ASMI Parallel II IP Core",
    "submitter": {
        "id": 70992,
        "url": "http://patchwork.ozlabs.org/api/people/70992/?format=api",
        "name": "Matthew Gerlach",
        "email": "matthew.gerlach@linux.intel.com"
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            "date": "2017-09-20T18:28:57",
            "name": "Altera ASMI Parallel II IP Core",
            "version": 2,
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        "From": "matthew.gerlach@linux.intel.com",
        "To": "vndao@altera.com, dwmw2@infradead.org, computersforpeace@gmail.com,\n\tboris.brezillon@free-electrons.com, marek.vasut@gmail.com,\n\trichard@nod.at, \n\tcyrille.pitchen@wedev4u.fr, robh+dt@kernel.org, mark.rutland@arm.com, \n\tlinux-mtd@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, gregkh@linuxfoundation.org,\n\tdavem@davemloft.net, mchehab@kernel.org, linux-fpga@vger.kernel.org, \n\ttien.hock.loh@intel.com, hean.loong.ong@intel.com",
        "Subject": "[PATCH v2 0/3] Altera ASMI Parallel II IP Core",
        "Date": "Wed, 20 Sep 2017 11:28:56 -0700",
        "Message-Id": "<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>",
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        "Cc": "Matthew Gerlach <matthew.gerlach@linux.intel.com>",
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    "content": "From: Matthew Gerlach <matthew.gerlach@linux.intel.com>\n\nThis patch set adds a spi-nor flash driver for the Altera ASMI Parallel II \nIP Core.  This driver was created based on feedback from Marek Vasut,\nCyrill Pitchen, and Michal Suchanek regarding Version 2 of the Altera\nQuadspi Controller: https://lkml.org/lkml/2017/6/26/518\n\nThe overall problem with Version 2 of the Altera Quadspi Controller and \nits driver was the fact that there was much duplication of code and logic\nwith the spi-nor framework.  This new combination of fpga hardware and \nsoftware \"gets out of the way\" of the spi-nor framework.  The result is a\nmuch simpler driver with the spi-nor framework performing the bulk of the work.\n\nPatch 1 contains the device tree bindings for the driver for\nthe Altera ASMI-Parallel II IP Core.\n\nPatch 2 contains the driver code for the Altera ASMI-Parallel II IP Core.\nThis driver supports being configured via a device tree or with platform\ndata.  In the later case, the memory for the registers has been remapped.\n\nPatch 3 contains a work around for some non-standard behavior of EPCQ flash.\n\nMatthew Gerlach (3):\n  dt-bindings: mtd: Altera ASMI Parallel II IP Core\n  mtd: spi-nor: Altera ASMI Parallel II IP Core\n  mtd: spi-nor: add flag for reading dummy cycles from nv cfg reg\n\n .../devicetree/bindings/mtd/altera-asmip2.txt      |  15 +\n MAINTAINERS                                        |   7 +\n drivers/mtd/spi-nor/Kconfig                        |   6 +\n drivers/mtd/spi-nor/Makefile                       |   1 +\n drivers/mtd/spi-nor/altera-asmip2.c                | 478 +++++++++++++++++++++\n include/linux/mtd/altera-asmip2.h                  |  27 ++\n 6 files changed, 534 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/mtd/altera-asmip2.txt\n create mode 100644 drivers/mtd/spi-nor/altera-asmip2.c\n create mode 100644 include/linux/mtd/altera-asmip2.h"
}