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{ "id": 812400, "url": "http://patchwork.ozlabs.org/api/covers/812400/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170911151029.25185-1-jeffy.chen@rock-chips.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170911151029.25185-1-jeffy.chen@rock-chips.com>", "list_archive_url": null, "date": "2017-09-11T15:10:26", "name": "[v5,0/3] PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver", "submitter": { "id": 67754, "url": "http://patchwork.ozlabs.org/api/people/67754/?format=api", "name": "Jeffy Chen", "email": "jeffy.chen@rock-chips.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170911151029.25185-1-jeffy.chen@rock-chips.com/mbox/", "series": [ { "id": 2511, "url": "http://patchwork.ozlabs.org/api/series/2511/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2511", "date": "2017-09-11T15:10:26", "name": "PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2511/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/812400/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrWZy5wKfz9s4q\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 01:10:50 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751167AbdIKPKs (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 11 Sep 2017 11:10:48 -0400", "from regular1.263xmail.com ([211.150.99.140]:38890 \"EHLO\n\tregular1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750937AbdIKPKs (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 11 Sep 2017 11:10:48 -0400", "from jeffy.chen?rock-chips.com (unknown [192.168.167.76])\n\tby regular1.263xmail.com (Postfix) with ESMTP id 98C484A01;\n\tMon, 11 Sep 2017 23:10:38 +0800 (CST)", "from localhost (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id CE8F439A;\n\tMon, 11 Sep 2017 23:10:32 +0800 (CST)", "from localhost (unknown [103.29.142.67])\n\tby smtp.263.net (Postfix) whith ESMTP id 2274M77Y8E;\n\tMon, 11 Sep 2017 23:10:40 +0800 (CST)" ], "X-263anti-spam": "KSV:0;", "X-MAIL-GRAY": "0", "X-MAIL-DELIVERY": "1", "X-KSVirus-check": "0", "X-ABS-CHECKED": "4", "X-RL-SENDER": "jeffy.chen@rock-chips.com", "X-FST-TO": "linux-kernel@vger.kernel.org", "X-SENDER-IP": "103.29.142.67", "X-LOGIN-NAME": "jeffy.chen@rock-chips.com", "X-UNIQUE-TAG": "<0c0836d575c1d801ede18e15bd6b467d>", "X-ATTACHMENT-NUM": "0", "X-SENDER": "cjf@rock-chips.com", "X-DNS-TYPE": "0", "From": "Jeffy Chen <jeffy.chen@rock-chips.com>", "To": "linux-kernel@vger.kernel.org, bhelgaas@google.com", "Cc": "shawn.lin@rock-chips.com, briannorris@chromium.org,\n\tdianders@chromium.org, Jeffy Chen <jeffy.chen@rock-chips.com>,\n\tMatthias Kaehlcke <mka@chromium.org>,\n\tdevicetree@vger.kernel.org, Will Deacon <will.deacon@arm.com>,\n\tHeiko Stuebner <heiko@sntech.de>, linux-pci@vger.kernel.org,\n\tKlaus Goger <klaus.goger@theobroma-systems.com>,\n\tlinux-rockchip@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, \n\tMark Rutland <mark.rutland@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>,\n\tlinux-arm-kernel@lists.infradead.org", "Subject": "[PATCH v5 0/3] PCI: rockchip: Move PCIE_WAKE handling into rockchip\n\tpcie driver", "Date": "Mon, 11 Sep 2017 23:10:26 +0800", "Message-Id": "<20170911151029.25185-1-jeffy.chen@rock-chips.com>", "X-Mailer": "git-send-email 2.11.0", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Currently we are handling pcie wake in mrvl wifi driver. But Brian\nsuggests to move it into rockchip pcie driver.\n\nTested on my chromebook bob(with cros 4.4 kernel and mrvl wifi).\n\n\nChanges in v5:\nRebase\nMove to pci.txt\nUse \"wakeup\" instead of \"wake\"\n\nChanges in v3:\nFix error handling\n\nChanges in v2:\nUse dev_pm_set_dedicated_wake_irq\n -- Suggested by Brian Norris <briannorris@chromium.com>\n\nJeffy Chen (3):\n PCI: rockchip: Add support for pcie wake irq\n dt-bindings: PCI: Add definition of pcie wake irq\n arm64: dts: rockchip: Handle pcie wake in pcie driver for Gru\n\n Documentation/devicetree/bindings/pci/pci.txt | 2 ++\n arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 15 +++++++++------\n drivers/pci/host/pcie-rockchip.c | 19 +++++++++++++++++--\n 3 files changed, 28 insertions(+), 8 deletions(-)" }