[{"id":1766638,"web_url":"http://patchwork.ozlabs.org/comment/1766638/","msgid":"<fb363e50-6a88-c546-2ae9-4abb28a931f0@rock-chips.com>","list_archive_url":null,"date":"2017-09-12T00:40:36","subject":"Re: [PATCH v5 3/3] arm64: dts: rockchip: Handle pcie wake in pcie\n\tdriver for Gru","submitter":{"id":66993,"url":"http://patchwork.ozlabs.org/api/people/66993/","name":"Shawn Lin","email":"shawn.lin@rock-chips.com"},"content":"On 2017/9/11 23:10, Jeffy Chen wrote:\n> Currently we are handling pcie wake irq in mrvl wifi driver.\n> Move it to rockchip pcie driver for Gru boards.\n> \n> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>\n> ---\n> \n\nReviewed-by: Shawn Lin <shawn.lin@rock-chips.com>\n\n> Changes in v5:\n> Use \"wakeup\" instead of \"wake\"\n> \n> Changes in v3: None\n> Changes in v2: None\n> \n>   arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 15 +++++++++------\n>   1 file changed, 9 insertions(+), 6 deletions(-)\n> \n> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi\n> index 199a5118b20d..9e0269a13ced 100644\n> --- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi\n> +++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi\n> @@ -707,7 +707,15 @@ ap_i2c_audio: &i2c8 {\n>   \n>   \tep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;\n>   \tpinctrl-names = \"default\";\n> -\tpinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;\n> +\tpinctrl-0 = <&pcie_clkreqn_cpm>, <&wlan_host_wake_l>, <&wifi_perst_l>;\n> +\n> +\tinterrupts-extended = <&gic GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,\n> +\t\t\t      <&gic GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,\n> +\t\t\t      <&gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>,\n> +\t\t\t      <&gpio0 8 IRQ_TYPE_LEVEL_LOW>;\n> +\tinterrupt-names = \"sys\", \"legacy\", \"client\", \"wakeup\";\n> +\t/delete-property/ interrupts;\n> +\n>   \tvpcie3v3-supply = <&pp3300_wifi_bt>;\n>   \tvpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */\n>   \tvpcie0v9-supply = <&pp900_pcie>;\n> @@ -722,11 +730,6 @@ ap_i2c_audio: &i2c8 {\n>   \t\t\tcompatible = \"pci1b4b,2b42\";\n>   \t\t\treg = <0x83010000 0x0 0x00000000 0x0 0x00100000\n>   \t\t\t       0x83010000 0x0 0x00100000 0x0 0x00100000>;\n> -\t\t\tinterrupt-parent = <&gpio0>;\n> -\t\t\tinterrupts = <8 IRQ_TYPE_LEVEL_LOW>;\n> -\t\t\tpinctrl-names = \"default\";\n> -\t\t\tpinctrl-0 = <&wlan_host_wake_l>;\n> -\t\t\twakeup-source;\n>   \t\t};\n>   \t};\n>   };\n> \n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at  http://vger.kernel.org/majordomo-info.html","headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xrmDq1gVQz9s7B\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 10:40:59 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751022AbdILAk5 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 11 Sep 2017 20:40:57 -0400","from lucky1.263xmail.com ([211.157.147.131]:33447 \"EHLO\n\tlucky1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750999AbdILAk5 (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 11 Sep 2017 20:40:57 -0400","from shawn.lin?rock-chips.com (unknown [192.168.165.105])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id 825338F866;\n\tTue, 12 Sep 2017 08:40:54 +0800 (CST)","from [172.16.12.30] (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 73E5342D;\n\tTue, 12 Sep 2017 08:40:37 +0800 (CST)","from [172.16.12.30] (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 27886MFYZFG;\n\tTue, 12 Sep 2017 08:40:53 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"1","X-MAIL-DELIVERY":"0","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"shawn.lin@rock-chips.com","X-FST-TO":"catalin.marinas@arm.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"shawn.lin@rock-chips.com","X-UNIQUE-TAG":"<de89fe782bea87944e93a5001ca43606>","X-ATTACHMENT-NUM":"0","X-SENDER":"lintao@rock-chips.com","X-DNS-TYPE":"0","Cc":"bhelgaas@google.com, shawn.lin@rock-chips.com,\n\tbriannorris@chromium.org, dianders@chromium.org,\n\tMatthias Kaehlcke <mka@chromium.org>,\n\tHeiko Stuebner <heiko@sntech.de>, devicetree@vger.kernel.org,\n\tKlaus Goger <klaus.goger@theobroma-systems.com>,\n\tlinux-rockchip@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, \n\tlinux-arm-kernel@lists.infradead.org, Will Deacon <will.deacon@arm.com>, \n\tMark Rutland <mark.rutland@arm.com>,\n\tCatalin Marinas <catalin.marinas@arm.com>","Subject":"Re: [PATCH v5 3/3] arm64: dts: rockchip: Handle pcie wake in pcie\n\tdriver for Gru","To":"Jeffy Chen <jeffy.chen@rock-chips.com>","References":"<20170911151029.25185-1-jeffy.chen@rock-chips.com>\n\t<20170911151029.25185-4-jeffy.chen@rock-chips.com>","From":"Shawn Lin <shawn.lin@rock-chips.com>","Message-ID":"<fb363e50-6a88-c546-2ae9-4abb28a931f0@rock-chips.com>","Date":"Tue, 12 Sep 2017 08:40:36 +0800","User-Agent":"Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101\n\tThunderbird/52.3.0","MIME-Version":"1.0","In-Reply-To":"<20170911151029.25185-4-jeffy.chen@rock-chips.com>","Content-Type":"text/plain; charset=gbk; format=flowed","Content-Transfer-Encoding":"7bit","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"}}]