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{ "id": 811349, "url": "http://patchwork.ozlabs.org/api/covers/811349/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170908071156.5115-1-clabbe.montjoie@gmail.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "list_archive_url": null, "date": "2017-09-08T07:11:46", "name": "[v5,00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY", "submitter": { "id": 64152, "url": "http://patchwork.ozlabs.org/api/people/64152/?format=api", "name": "Corentin Labbe", "email": "clabbe.montjoie@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170908071156.5115-1-clabbe.montjoie@gmail.com/mbox/", "series": [ { "id": 2113, "url": "http://patchwork.ozlabs.org/api/series/2113/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=2113", "date": "2017-09-08T07:11:46", "name": "net: stmmac: dwmac-sun8i: Handle integrated PHY", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/2113/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/811349/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"dcE3SbdK\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xpT8N1tgRz9sBd\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 8 Sep 2017 17:14:12 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1754929AbdIHHOK (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tFri, 8 Sep 2017 03:14:10 -0400", "from mail-wm0-f51.google.com ([74.125.82.51]:35519 \"EHLO\n\tmail-wm0-f51.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1754871AbdIHHOJ (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Fri, 8 Sep 2017 03:14:09 -0400", "by mail-wm0-f51.google.com with SMTP id f199so9779610wme.0;\n\tFri, 08 Sep 2017 00:14:08 -0700 (PDT)", "from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr.\n\t[90.118.159.96]) by smtp.googlemail.com with ESMTPSA id\n\tl19sm684566wrl.47.2017.09.08.00.14.05\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tFri, 08 Sep 2017 00:14:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id;\n\tbh=w8RcbEOMKY/vjLYzKK6iAjKcvFVR8cve2hrcJlAqCbA=;\n\tb=dcE3SbdKCzW/XL7krCxC1tTbS1aq+DosWb8Ho2OO5UFbS8Nvq9Kt8xSwS7nrrtv/xK\n\tNrZOoshoV1Ioc4jv2NxjIZRIiq3Fs3GOiJCDqETXlKXCWbGIhn/me5otOsxzmfcHTe9C\n\tY7anqc22lVPgvDSSL71qOaSp7ExylkylifEYXV5dFkrJU9g2VA6WBmXpXAQS3FkNrqsD\n\t8gJojBDlPxyWXyu/bMi3Tn0R0LLC8CkqKTjvyF6bhLhtz9WbObIywix78y2ogh2t/tIE\n\t9Yuzttu9rvOF35+tK/VQyixxIMS4GpgMaeOB5yNo5nMOCqW6cpURzffXNCDh6vy6fOlq\n\tgKyA==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=w8RcbEOMKY/vjLYzKK6iAjKcvFVR8cve2hrcJlAqCbA=;\n\tb=p1dueECHWDcJXlYOi7yr9vcZsmuo8v5SK9C1dd2f4N5L+JcgaIjKtRPa2PyGOMCp/Q\n\t/XwbYhP0Bbaw7z8A5DfMzZpINgF+TSgg7LBTdxfFfQoInmR7AaP5w0qKXAPWmMvA19b1\n\tMFhQ71JnOOwMIpuiie+QQ8cn6A95eZI7GFmbY3CmBZilarp6ka+cGeNEjifdlEtcHSa3\n\tn1h6rzUAAM1667f73mf4+NQazlu/itJpU6kQIyVZn/P6fN0MqsUMK6EKFMGfhEZa8uqw\n\trZhMwmRI/d5yG8RNUDVdltu6EMXsjRIa6PL/yI+arhOfQtedktdrIq/+wMH2v063s9eT\n\txndg==", "X-Gm-Message-State": "AHPjjUgBO3QNVb1Ao/ldvqMrd3xuMy09cra8DcqNhkbHdOmV7FMHxAeK\n\t+9i/Uu8yRiBrmqATtweLqWg=", "X-Google-Smtp-Source": "AOwi7QDpUF3KpPm0N5WH0y5vLBDL+hcs7B++N4f/++2/PAQjBVmIbdv8FKT95LdBWdKHf+aU6UIp9A==", "X-Received": "by 10.28.111.196 with SMTP id c65mr853315wmi.18.1504854847595;\n\tFri, 08 Sep 2017 00:14:07 -0700 (PDT)", "From": "Corentin Labbe <clabbe.montjoie@gmail.com>", "To": "robh+dt@kernel.org, mark.rutland@arm.com,\n\tmaxime.ripard@free-electrons.com, wens@csie.org,\n\tlinux@armlinux.org.uk, catalin.marinas@arm.com,\n\twill.deacon@arm.com, peppe.cavallaro@st.com,\n\talexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com", "Cc": "netdev@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tCorentin Labbe <clabbe.montjoie@gmail.com>", "Subject": "[PATCH v5 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY", "Date": "Fri, 8 Sep 2017 09:11:46 +0200", "Message-Id": "<20170908071156.5115-1-clabbe.montjoie@gmail.com>", "X-Mailer": "git-send-email 2.13.5", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Hello\n\nThe current way to find if the PHY is internal is to compare DT phy-mode\nand emac_variant/internal_phy.\nBut it will negate a possible future SoC where an external PHY use the\nsame phy mode than the integrated one.\n\nThis patchs series adds a new way to find if the PHY is integrated, via\nthe phy-is-integrated DT property.\n\nSince it exists both integrated and external ethernet-phy@1, they are merged in\nthe final DTB and so share all properties.\nFor avoiding this, and better represent the reality, we use a MDIO mux.\n\nThe first try was to create a new MDIO mux \"mdio-mux-syscon\".\nmdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception\nthat the register is used via syscon/regmap.\nBut this solution does not work for two reason:\n- changing the MDIO selection need the reset of MAC which cannot be done by the\n mdio-mux-syscon driver\n- There were driver loading order problem:\n - mdio-mux-syscon needing that stmmac register the parent MDIO\n - stmmac needing that child MDIO was registered just after registering parent MDIO\n\nSo we cannot use any external MDIO-mux.\n\nThe final solution was to represent a mdio-mux and let the MAC handle all things.\nNote that phy-is-integrated is still needed (even if we use a MDIO mux) since\nsome properties apply only on integrated PHY and we need to know the final MDIO\nbus in mdio_mux_syscon_switch_fn().\n\nSince DT bits was reverted in 4.13, this patch series include the revert of the revert.\nSo\n- the first four patchs bring back DT/stmmac stuff that was in 4.13 (and reverted)\n- fifth patch document how DT MDIO mux is implemented\n- patch 6 and 7 modify DT\n- patch 8, 9, 10 Modify stmmac according to the new bindings\n\nI have let patch splited for easy review. (for seeing what's new)\nBut the final serie could have some patch squashed if someone want.\nLike squashing patch and 2 and 5 (documentation)\n\nSince DT worked well in 4.13, could it be targeted for 4.14 ?\nIf necessary I could split this serie in two:\n- bring back A64/A83T (patchs 1, 2, 4, 7, 9)\n- add MXIO-mux and H3 (patchs 3, 4, 5, 6, 8, 10)\n\nRegards\n\nChanges since v4:\n- Update documentation for new bindings\n- Added 4 patchs for bring back reverted stuff of 4.13\n- dwmac-sun8i now handle mdio-mux\n- MDIO use now compatible = \"snps,dwmac-mdio\";\n\nChanges since v3:\n- Added a patch for handling fixed-link\n- Updated documentation\n\nChanges since v2:\n- Add a MDIO mux for creating distinction between integrated and external MDIO.\n- phy-is-integrated is not set in dtsi.\n\nChanges since v1:\n- Dropped phy-is-integrated documentation patch since another same patch was already merged\n- Moved phy-is-integrated from SoC dtsi to final board DT.\n\n\nCorentin Labbe (10):\n arm64: dts: allwinner: Restore EMAC changes\n dt-bindings: net: Restore sun8i dwmac binding\n arm: dts: sunxi: Restore EMAC changes\n net: stmmac: sun8i: Restore the compatibles\n dt-bindings: net: dwmac-sun8i: update documentation about integrated\n PHY\n ARM: dts: sunxi: h3/h5: represent the mdio switch used by\n sun8i-h3-emac\n arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio\n net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated\n net: stmmac: snps,dwmac-mdio MDIOs are automatically registered\n net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs\n\n .../devicetree/bindings/net/dwmac-sun8i.txt | 197 +++++++++++++++++++++\n arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +\n arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 ++\n arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +\n arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +\n arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +\n arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +\n arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 +\n arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++\n arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++\n arch/arm/boot/dts/sunxi-h3-h5.dtsi | 46 +++++\n .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++\n .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 ++\n .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 ++\n .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++\n arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++\n .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 ++\n .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 ++\n .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 ++\n drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +\n drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 140 ++++++++++++---\n .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 -\n 22 files changed, 601 insertions(+), 25 deletions(-)\n create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt" }