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{ "id": 2226724, "url": "http://patchwork.ozlabs.org/api/covers/2226724/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/cover/bmm.hhuopdltxe.gcc.gcc-TEST.clyon.63.1.0@forge-stage.sourceware.org/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<bmm.hhuopdltxe.gcc.gcc-TEST.clyon.63.1.0@forge-stage.sourceware.org>", "list_archive_url": null, "date": "2026-04-22T18:33:51", "name": "[v1,0/1] arm: always enable both simd and mve builtins", "submitter": { "id": 92734, "url": "http://patchwork.ozlabs.org/api/people/92734/?format=api", "name": "Christophe Lyon via Sourceware Forge", "email": "forge-bot+clyon@forge-stage.sourceware.org" }, "mbox": "http://patchwork.ozlabs.org/project/gcc/cover/bmm.hhuopdltxe.gcc.gcc-TEST.clyon.63.1.0@forge-stage.sourceware.org/mbox/", "series": [ { "id": 501083, "url": "http://patchwork.ozlabs.org/api/series/501083/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=501083", "date": "2026-04-22T18:33:51", "name": "arm: always enable both simd and mve builtins", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501083/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2226724/comments/", "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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Wed, 22 Apr 2026 18:34:46 +0000 (GMT)", "from forge-stage.sourceware.org (localhost [IPv6:::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange x25519 server-signature ECDSA (prime256v1) server-digest SHA256)\n (No client certificate requested)\n by forge-stage.sourceware.org (Postfix) with ESMTPS id 32D7E434D9\n for <gcc-patches@gcc.gnu.org>; Wed, 22 Apr 2026 18:34:46 +0000 (UTC)" ], "DKIM-Filter": [ "OpenDKIM Filter v2.11.0 sourceware.org C66F6409BEAC", "OpenDKIM Filter v2.11.0 sourceware.org 5D26C42DB866" ], "DMARC-Filter": "OpenDMARC Filter v1.4.2 sourceware.org 5D26C42DB866", "ARC-Filter": "OpenARC Filter v1.0.0 sourceware.org 5D26C42DB866", "ARC-Seal": "i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1776882886; cv=none;\n b=q+R0ApvTHnOXkB8IyqADYEsgQcaMx5T2kJEnHQtVFK0JcBtDFd1stjNmKPO/tbAZkxSN0AeFvF3AcFmIr0QZN0l+CbiuyB8l23xK6Tgup+qENqRyic0P15uQuWwGcH6E8bAfQcf9NAcDImLRJZGnGJ/eOYPHOtHtn7PYX2S2uJ0=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=sourceware.org; s=key;\n t=1776882886; c=relaxed/simple;\n bh=TlA38EJSat8R4ExMh+lY62ZfLWIfyVE8Tpf8nLF8N68=;\n h=From:Date:Subject:To:Message-ID;\n b=OLmvA69VDmcjIvJiKKcVUdBB37FdpEIAxT2+u5r1f/GqwSRNJVnOey/9KY3ayFCG+L2o2TArYqwe1/by+r4lW0cDTonQDPtnXymS7oQ3He+pYeGjSUNnGpJTIqrkUXLefZAGS+Emwn1zle6B/QjPTK+x6b1m/m92fKUrhxmj96E=", "ARC-Authentication-Results": "i=1; server2.sourceware.org", "From": "Christophe Lyon via Sourceware Forge\n <forge-bot+clyon@forge-stage.sourceware.org>", "Date": "Wed, 22 Apr 2026 18:33:51 +0000", "Subject": "[PATCH v1 0/1] arm: always enable both simd and mve builtins", "To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>", "Message-ID": "\n <bmm.hhuopdltxe.gcc.gcc-TEST.clyon.63.1.0@forge-stage.sourceware.org>", "X-Mailer": "batrachomyomachia", "X-Pull-Request-Organization": "gcc", "X-Pull-Request-Repository": "gcc-TEST", "X-Pull-Request": "https://forge.sourceware.org/gcc/gcc-TEST/pulls/63", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Reply-To": "gcc-patches mailing list <gcc-patches@gcc.gnu.org>,\n clyon@gcc.gnu.org", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Hi gcc-patches mailing list,\nChristophe Lyon via Sourceware Forge <forge-bot+clyon@forge-stage.sourceware.org> has requested that the following forgejo pull request\nbe published on the mailing list.\n\nCreated on: 2025-08-14 08:52:06+00:00\nLatest update: 2025-08-24 18:49:54+00:00\nChanges: 342 changed files, 12722 additions, 2555 deletions\nHead revision: clyon/gcc-TEST ref forge-MVE-switcher commit 152d42122b80496a613e3cc19ffaf4e4e60727c6\nBase revision: gcc/gcc-TEST ref trunk commit 7f6da2623b8739da61d8e57dc175005c5885c6ff r16-3181-g7f6da2623b8739\nMerge base: 7f6da2623b8739da61d8e57dc175005c5885c6ff\nFull diff url: https://forge.sourceware.org/gcc/gcc-TEST/pulls/63.diff\nDiscussion: https://forge.sourceware.org/gcc/gcc-TEST/pulls/63\nRequested Reviewers:\n\nWe get lots of error messages when compiling arm_neon.h under\ne.g. -mcpu=cortex-m55, because Neon builtins are enabled only when\n!TARGET_HAVE_MVE. This has been the case since MVE support was\nintroduced.\n\nThis patch uses an approach similar to what we do on aarch64, but only\npartially since Neon intrinsics do not use the \"new\" framework.\n\nWe register all types and Neon intrinsics, whether MVE is enabled or\nnot, which enables to compile arm_neon.h. However, we need to\nintroduce a \"switcher\" similar to aarch64's to avoid ICEs when LTO is\nenabled: in that case, since we have to enable the MVE intrinsics, we\ntemporarily change arm_active_target.isa to enable MVE bits. This\nenables hooks like arm_vector_mode_supported_p and arm_array_mode to\nbehave as expected by the MVE intrinsics framework. We switch back\nto the previous arm_active_target.isa immediately after.\n\nWith a toolchain targetting e.g. cortex-m55,\ngcc.target/arm/attr-neon3.c now compiles successfully, with only one\nfailure to be fixed separately:\nFAIL: gcc.target/arm/attr-neon3.c check-function-bodies my1\n\nBesides that, gcc.log is no longer full of errors messages when trying\nto compile arm_neon.h if MVE is forced somehow.\n\ngcc/ChangeLog:\n\n\t* config/arm/arm-builtins.cc (arm_init_simd_builtin_types): Remove\n\tTARGET_HAVE_MVE condition.\n\t(class arm_target_switcher): New.\n\t(arm_init_mve_builtins): Remove calls to\n\tarm_init_simd_builtin_types and\n\tarm_init_simd_builtin_scalar_types. Switch to MVE isa flags.\n\t(arm_init_neon_builtins): Remove calls to\n\tarm_init_simd_builtin_types and\n\tarm_init_simd_builtin_scalar_types.\n\t(arm_need_mve_mode_regs): New.\n\t(arm_need_neon_mode_regs): New.\n\t(arm_target_switcher::arm_target_switcher): New.\n\t(arm_target_switcher::~arm_target_switcher): New.\n\t(arm_init_builtins): Call arm_init_simd_builtin_scalar_types and\n\tarm_init_simd_builtin_types. Always call arm_init_mve_builtins\n\tand arm_init_neon_builtins.\n\nThanks for taking the time to contribute to GCC!\n\nPlease be advised that https://forge.sourceware.org/ is currently a trial\nthat is being used by the GCC community to experiment with a new workflow\nbased on pull requests.\n\nPull requests sent here may be forgotten or ignored. Patches that you want to\npropose for inclusion in GCC should use the existing email-based workflow,\nsee https://gcc.gnu.org/contribute.html\n\n\nChanged files:\n- M: gcc/config/arm/arm-builtins.cc\n\n\nChristophe Lyon (1):\n arm: always enable both simd and mve builtins\n\n gcc/config/arm/arm-builtins.cc | 161 ++++++++++++++++++++++++---------\n 1 file changed, 116 insertions(+), 45 deletions(-)" }