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GET /api/1.2/patches/806157/?format=api
{ "id": 806157, "url": "http://patchwork.ozlabs.org/api/1.2/patches/806157/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1503784282-13461-1-git-send-email-vishalm@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/1.2/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503784282-13461-1-git-send-email-vishalm@ti.com>", "list_archive_url": null, "date": "2017-08-26T21:51:22", "name": "[U-Boot] ARM: DRA72x: Add support for detection of DRA71x SR 2.1", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "b549de55418a6291ce215cea0a5137a06179d08f", "submitter": { "id": 67042, "url": "http://patchwork.ozlabs.org/api/1.2/people/67042/?format=api", "name": "Vishal Mahaveer", "email": "vishalm@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/1.2/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1503784282-13461-1-git-send-email-vishalm@ti.com/mbox/", "series": [], "comments": "http://patchwork.ozlabs.org/api/patches/806157/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/806157/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"ZfIFTjA4\";\n\tdkim-atps=neutral" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xfsRb2LBNz9s82\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSun, 27 Aug 2017 08:00:57 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 81627C221B0; Sat, 26 Aug 2017 22:00:50 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id C1E19C2215D;\n\tSat, 26 Aug 2017 22:00:47 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 643A5C22145; Sat, 26 Aug 2017 21:51:25 +0000 (UTC)", "from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77])\n\tby lists.denx.de (Postfix) with ESMTPS id A7B8CC22134\n\tfor <u-boot@lists.denx.de>; Sat, 26 Aug 2017 21:51:24 +0000 (UTC)", "from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v7QLpM5o021892\n\tfor <u-boot@lists.denx.de>; Sat, 26 Aug 2017 16:51:22 -0500", "from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7QLpMF6001414\n\tfor <u-boot@lists.denx.de>; Sat, 26 Aug 2017 16:51:22 -0500", "from DLEE100.ent.ti.com (157.170.170.30) by DLEE101.ent.ti.com\n\t(157.170.170.31) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tSat, 26 Aug 2017 16:51:22 -0500", "from dflp33.itg.ti.com (10.64.6.16) by DLEE100.ent.ti.com\n\t(157.170.170.30) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Sat, 26 Aug 2017 16:51:22 -0500", "from uda0271468b (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v7QLpMSj026371;\n\tSat, 26 Aug 2017 16:51:22 -0500", "from a0271468 by uda0271468b with local (Exim 4.82)\n\t(envelope-from <vishalm@ti.com>)\n\tid 1dlizC-0003Vg-7P; Sat, 26 Aug 2017 16:51:22 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1503784282;\n\tbh=J8l7gS9DrLRqhSm12psRI5o8genDm7Er5/nrSXBF+a8=;\n\th=From:To:CC:Subject:Date;\n\tb=ZfIFTjA4PIg6davlrmeKSiR2HZsR+E7uT7PAXtpmcc1VV4fymnE6wnVvDh09YSuIY\n\tXvMOiGKGUFV6IxUbyV3AdPiVFs6bfmIGPuTqw4y0mmheVxMw91O32HjetmF6tdbAIk\n\tUNe2HvSqJNNT7f33QusuwPsBvSyvXjL1RHjzTT+g=", "From": "Vishal Mahaveer <vishalm@ti.com>", "To": "<u-boot@lists.denx.de>", "Date": "Sat, 26 Aug 2017 16:51:22 -0500", "Message-ID": "<1503784282-13461-1-git-send-email-vishalm@ti.com>", "X-Mailer": "git-send-email 1.9.1", "MIME-Version": "1.0", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "X-Mailman-Approved-At": "Sat, 26 Aug 2017 22:00:47 +0000", "Subject": "[U-Boot] [PATCH] ARM: DRA72x: Add support for detection of DRA71x\n\tSR 2.1", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "DRA71x processors are reduced pin and software compatible\nderivative of DRA72 processors. Add support for detection\nof SR2.1 version of DRA71x family of processors.\n\nSigned-off-by: Vishal Mahaveer <vishalm@ti.com>\n---\n arch/arm/include/asm/arch-omap5/omap.h | 1 +\n arch/arm/include/asm/omap_common.h | 1 +\n arch/arm/mach-omap2/omap5/hw_data.c | 2 ++\n arch/arm/mach-omap2/omap5/hwinit.c | 3 +++\n arch/arm/mach-omap2/omap5/sdram.c | 2 ++\n board/ti/dra7xx/evm.c | 3 +++\n 6 files changed, 12 insertions(+)", "diff": "diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h\nindex b047f0d..6705544 100644\n--- a/arch/arm/include/asm/arch-omap5/omap.h\n+++ b/arch/arm/include/asm/arch-omap5/omap.h\n@@ -63,6 +63,7 @@\n #define DRA752_CONTROL_ID_CODE_ES2_0\t\t0x2B99002F\n #define DRA722_CONTROL_ID_CODE_ES1_0\t\t0x0B9BC02F\n #define DRA722_CONTROL_ID_CODE_ES2_0\t\t0x1B9BC02F\n+#define DRA722_CONTROL_ID_CODE_ES2_1\t\t0x2B9BC02F\n \n /* UART */\n #define UART1_BASE\t\t(OMAP54XX_L4_PER_BASE + 0x6a000)\ndiff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h\nindex ef5c481..46ee9c2 100644\n--- a/arch/arm/include/asm/omap_common.h\n+++ b/arch/arm/include/asm/omap_common.h\n@@ -766,6 +766,7 @@ static inline u8 is_dra72x(void)\n #define DRA752_ES2_0\t0x07520200\n #define DRA722_ES1_0\t0x07220100\n #define DRA722_ES2_0\t0x07220200\n+#define DRA722_ES2_1\t0x07220210\n \n /*\n * silicon device type\ndiff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c\nindex 4ad6b53..06a9fd2 100644\n--- a/arch/arm/mach-omap2/omap5/hw_data.c\n+++ b/arch/arm/mach-omap2/omap5/hw_data.c\n@@ -719,6 +719,7 @@ void __weak hw_data_init(void)\n \n \tcase DRA722_ES1_0:\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t*prcm = &dra7xx_prcm;\n \t*dplls_data = &dra72x_dplls;\n \t*ctrl = &dra7xx_ctrl;\n@@ -753,6 +754,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)\n \t\t*regs = &ioregs_dra72x_es1;\n \t\tbreak;\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t\t*regs = &ioregs_dra72x_es2;\n \t\tbreak;\n \ndiff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c\nindex afe59e0..d53900f 100644\n--- a/arch/arm/mach-omap2/omap5/hwinit.c\n+++ b/arch/arm/mach-omap2/omap5/hwinit.c\n@@ -377,6 +377,9 @@ void init_omap_revision(void)\n \tcase DRA722_CONTROL_ID_CODE_ES2_0:\n \t\t*omap_si_rev = DRA722_ES2_0;\n \t\tbreak;\n+\tcase DRA722_CONTROL_ID_CODE_ES2_1:\n+\t\t*omap_si_rev = DRA722_ES2_1;\n+\t\tbreak;\n \tdefault:\n \t\t*omap_si_rev = OMAP5430_SILICON_ID_INVALID;\n \t}\ndiff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c\nindex 7712923..684b5bc 100644\n--- a/arch/arm/mach-omap2/omap5/sdram.c\n+++ b/arch/arm/mach-omap2/omap5/sdram.c\n@@ -481,6 +481,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,\n \t\t*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);\n \t\tbreak;\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t\t*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;\n \t\t*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2);\n \t\tbreak;\n@@ -714,6 +715,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)\n \tcase DRA752_ES2_0:\n \tcase DRA722_ES1_0:\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t\tbug_00339_regs_ptr = dra_bug_00339_regs;\n \t\t*iterations = sizeof(dra_bug_00339_regs)/\n \t\t\t sizeof(dra_bug_00339_regs[0]);\ndiff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c\nindex 93d3d0b..58feb15 100644\n--- a/board/ti/dra7xx/evm.c\n+++ b/board/ti/dra7xx/evm.c\n@@ -236,6 +236,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)\n \t\tbreak;\n \tcase DRA722_ES1_0:\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t\tif (ram_size < CONFIG_MAX_MEM_MAPPED)\n \t\t\t*regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1;\n \t\telse\n@@ -299,6 +300,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)\n \t\tbreak;\n \tcase DRA722_ES1_0:\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \tdefault:\n \t\tif (ram_size < CONFIG_MAX_MEM_MAPPED)\n \t\t\t*dmm_lisa_regs = &lisa_map_2G_x_2;\n@@ -643,6 +645,7 @@ void recalibrate_iodelay(void)\n \tswitch (omap_revision()) {\n \tcase DRA722_ES1_0:\n \tcase DRA722_ES2_0:\n+\tcase DRA722_ES2_1:\n \t\tpads = dra72x_core_padconf_array_common;\n \t\tnpads = ARRAY_SIZE(dra72x_core_padconf_array_common);\n \t\tif (board_is_dra71x_evm()) {\n", "prefixes": [ "U-Boot" ] }