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GET /api/1.1/patches/2232309/?format=api
{ "id": 2232309, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2232309/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ltp/patch/20260504101736.26544-2-piotr.kubaj@intel.com/", "project": { "id": 59, "url": "http://patchwork.ozlabs.org/api/1.1/projects/59/?format=api", "name": "Linux Test Project development", "link_name": "ltp", "list_id": "ltp.lists.linux.it", "list_email": "ltp@lists.linux.it", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260504101736.26544-2-piotr.kubaj@intel.com>", "date": "2026-05-04T10:17:36", "name": "[v9] high_freq_hwp_cap_cppc.c: new test", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "990e6444a24c10585efddb12c91c69ff206468f2", "submitter": { "id": 92049, "url": "http://patchwork.ozlabs.org/api/1.1/people/92049/?format=api", "name": "Piotr Kubaj", "email": "piotr.kubaj@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/ltp/patch/20260504101736.26544-2-piotr.kubaj@intel.com/mbox/", "series": [ { "id": 502639, "url": "http://patchwork.ozlabs.org/api/1.1/series/502639/?format=api", "web_url": "http://patchwork.ozlabs.org/project/ltp/list/?series=502639", "date": "2026-05-04T10:17:36", "name": "[v9] high_freq_hwp_cap_cppc.c: new test", "version": 9, "mbox": "http://patchwork.ozlabs.org/series/502639/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2232309/comments/", "check": "warning", "checks": "http://patchwork.ozlabs.org/api/patches/2232309/checks/", "tags": {}, "headers": { "Return-Path": "<ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "ltp@lists.linux.it" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "ltp@picard.linux.it" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=D7RWU4ov;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.linux.it\n (client-ip=213.254.12.146; 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Mon, 4 May 2026 12:18:22 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.12])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by in-2.smtp.seeweb.it (Postfix) with ESMTPS id 56248600189\n for <ltp@lists.linux.it>; Mon, 4 May 2026 12:18:20 +0200 (CEST)", "from fmviesa009.fm.intel.com ([10.60.135.149])\n by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 04 May 2026 03:18:18 -0700", "from pkubaj-desk.igk.intel.com (HELO intel.com) ([10.217.160.221])\n by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 04 May 2026 03:18:17 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777889901; x=1809425901;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=Fy/WYbIVxWEe5OjcHhGeUuu4m8ykgljEAAaMET/vj/c=;\n b=D7RWU4ov5Y78/RYl20hQ+5oy0ePFtizFBHEKfckYXOZDOS+Ol6IaG9+B\n UvP6mcNIEzF7cUsstJout5bJaP4QDWfVfLkHzwBMAb7wvByK5csLXMPHe\n a2VaQAUgAPRPFRJoqipSlCPVPMvlTUlCLFC7YaPpKrL5Qi/MMJmamZJm5\n CDG/rsblxd5YEAEUp+wRl0HCZ7W/iNNCJtF5TfK2qfli73LGhRx/CMv/i\n /ysWDvCRJnWj8m/dhrMhW5UAgWc5oJzKTIxrSFFPyikWM8UGEKEUQZQbp\n JK7VHpQcFjXQ4qMj+A1iEnYwcjHavsHla9AJszOMenVjqqu4PG7j3uiVb A==;", "X-CSE-ConnectionGUID": [ "abNt531XRNq1Pfb8urEnxw==", "53fzRWlJTYe6pdNSOssYCA==" ], "X-CSE-MsgGUID": [ "PrWbGAXcTOW/CRUWjxbbaA==", "gheSt3sbTxGWnf7XSEbYDA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11775\"; a=\"82593255\"", "E=Sophos;i=\"6.23,215,1770624000\"; d=\"scan'208\";a=\"82593255\"", "E=Sophos;i=\"6.23,215,1770624000\"; d=\"scan'208\";a=\"228983635\"" ], "X-ExtLoop1": "1", "From": "Piotr Kubaj <piotr.kubaj@intel.com>", "To": "ltp@lists.linux.it", "Date": "Mon, 4 May 2026 12:17:36 +0200", "Message-ID": "<20260504101736.26544-2-piotr.kubaj@intel.com>", "X-Mailer": "git-send-email 2.47.3", "MIME-Version": "1.0", "X-Spam-Status": "No, score=0.1 required=7.0 tests=DKIM_SIGNED,DKIM_VALID,\n DKIM_VALID_AU,DKIM_VALID_EF,DMARC_PASS,SPF_HELO_NONE,SPF_PASS\n shortcircuit=no autolearn=disabled version=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on in-2.smtp.seeweb.it", "X-Virus-Scanned": "clamav-milter 1.0.9 at in-2.smtp.seeweb.it", "X-Virus-Status": "Clean", "Subject": "[LTP] [PATCH v9] high_freq_hwp_cap_cppc.c: new test", "X-BeenThere": "ltp@lists.linux.it", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Linux Test Project <ltp.lists.linux.it>", "List-Unsubscribe": "<https://lists.linux.it/options/ltp>,\n <mailto:ltp-request@lists.linux.it?subject=unsubscribe>", "List-Archive": "<http://lists.linux.it/pipermail/ltp/>", "List-Post": "<mailto:ltp@lists.linux.it>", "List-Help": "<mailto:ltp-request@lists.linux.it?subject=help>", "List-Subscribe": "<https://lists.linux.it/listinfo/ltp>,\n <mailto:ltp-request@lists.linux.it?subject=subscribe>", "Cc": "helena.anna.dubel@intel.com, tomasz.ossowski@intel.com,\n rafael.j.wysocki@intel.com, daniel.niestepski@intel.com", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it", "Sender": "\"ltp\" <ltp-bounces+incoming=patchwork.ozlabs.org@lists.linux.it>" }, "content": "Verify for all online logical CPUs that their highest performance value are\nthe same for HWP Capability MSR 0x771 and CPPC sysfs file.\n\nSigned-off-by: Piotr Kubaj <piotr.kubaj@intel.com>\n---\nChecks for msr and CPPC are added to setup().\nUseless snprintf() for CPU0 is dropped.\n runtest/power_management_tests | 1 +\n testcases/kernel/power_management/.gitignore | 1 +\n .../power_management/high_freq_hwp_cap_cppc.c | 88 +++++++++++++++++++\n 3 files changed, 90 insertions(+)\n create mode 100644 testcases/kernel/power_management/.gitignore\n create mode 100644 testcases/kernel/power_management/high_freq_hwp_cap_cppc.c", "diff": "diff --git a/runtest/power_management_tests b/runtest/power_management_tests\nindex b670da6ec..4da57ee72 100644\n--- a/runtest/power_management_tests\n+++ b/runtest/power_management_tests\n@@ -1,4 +1,5 @@\n #POWER_MANAGEMENT\n+high_freq_hwp_cap_cppc high_freq_hwp_cap_cppc\n runpwtests03 runpwtests03.sh\n runpwtests04 runpwtests04.sh\n runpwtests06 runpwtests06.sh\ndiff --git a/testcases/kernel/power_management/.gitignore b/testcases/kernel/power_management/.gitignore\nnew file mode 100644\nindex 000000000..03f0c83e4\n--- /dev/null\n+++ b/testcases/kernel/power_management/.gitignore\n@@ -0,0 +1 @@\n+high_freq_hwp_cap_cppc\ndiff --git a/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c\nnew file mode 100644\nindex 000000000..0701f0277\n--- /dev/null\n+++ b/testcases/kernel/power_management/high_freq_hwp_cap_cppc.c\n@@ -0,0 +1,88 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Copyright (C) 2026 Piotr Kubaj <piotr.kubaj@intel.com>\n+ */\n+\n+/*\\\n+ * Verify for all online logical CPUs that their highest performance value are\n+ * the same for HWP Capability MSR 0x771 and CPPC sysfs file.\n+ */\n+\n+#include \"tst_test.h\"\n+#include \"tst_safe_prw.h\"\n+\n+#define MSR_HWP_CAPABILITIES\t0x771\n+#define HIGHEST_PERF_MASK\t0xFF\n+\n+static int nproc;\n+\n+static void setup(void)\n+{\n+\tif (access(\"/dev/cpu/0/msr\", F_OK) == -1)\n+\t\ttst_brk(TCONF | TERRNO, \"msr driver not loaded\");\n+\n+\tif (access(\"/sys/devices/system/cpu/cpu0/acpi_cppc/highest_perf\", F_OK) == -1)\n+\t\ttst_brk(TCONF | TERRNO, \"CPPC sysfs not available\");\n+\n+\tnproc = tst_ncpus_conf();\n+}\n+\n+static void run(void)\n+{\n+\tbool status = true;\n+\tchar path[PATH_MAX];\n+\n+\tfor (int i = 0; i < nproc; i++) {\n+\t\tint online = 1;\n+\t\tunsigned long long msr_highest_perf = 0, sysfs_highest_perf = 0;\n+\n+\t\tif (i) {\n+\t\t\tsnprintf(path, sizeof(path), \"/sys/devices/system/cpu/cpu%d/online\", i);\n+\t\t\tSAFE_FILE_SCANF(path, \"%d\", &online);\n+\t\t}\n+\n+\t\tif (!online) {\n+\t\t\ttst_res(TINFO, \"CPU%d offline, skipping\", i);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tsnprintf(path, sizeof(path), \"/sys/devices/system/cpu/cpu%d/acpi_cppc/highest_perf\", i);\n+\t\tSAFE_FILE_SCANF(path, \"%llu\", &sysfs_highest_perf);\n+\t\ttst_res(TDEBUG, \"%s: %llu\", path, sysfs_highest_perf);\n+\n+\t\tsnprintf(path, sizeof(path), \"/dev/cpu/%d/msr\", i);\n+\t\tint fd = SAFE_OPEN(path, O_RDONLY);\n+\n+\t\tSAFE_PREAD(1, fd, &msr_highest_perf, sizeof(msr_highest_perf), MSR_HWP_CAPABILITIES);\n+\t\tSAFE_CLOSE(fd);\n+\t\tmsr_highest_perf &= HIGHEST_PERF_MASK;\n+\t\ttst_res(TDEBUG, \"%s: %llu\", path, msr_highest_perf);\n+\n+\t\tif (msr_highest_perf != sysfs_highest_perf) {\n+\t\t\ttst_res(TINFO, \"cpu%d: sysfs=%llu MSR=%llu\",\n+\t\t\t\ti, sysfs_highest_perf, msr_highest_perf);\n+\t\t\tstatus = false;\n+\t\t}\n+\t}\n+\n+\tif (status)\n+\t\ttst_res(TPASS, \"Sysfs and MSR values are equal\");\n+\telse\n+\t\ttst_res(TFAIL, \"Highest performance values differ between sysfs and MSR\");\n+}\n+\n+static struct tst_test test = {\n+\t.needs_kconfigs = (const char *const []) {\n+\t\t\"CONFIG_ACPI_CPPC_LIB\",\n+\t\t\"CONFIG_X86_MSR\",\n+\t\tNULL\n+\t},\n+\t.needs_root = 1,\n+\t.setup = setup,\n+\t.supported_archs = (const char *const []) {\n+\t\t\"x86\",\n+\t\t\"x86_64\",\n+\t\tNULL\n+\t},\n+\t.test_all = run\n+};\n", "prefixes": [ "v9" ] }