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GET /api/1.1/patches/2231938/?format=api
{ "id": 2231938, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2231938/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260501155421.3329862-3-elder@riscstar.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/1.1/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260501155421.3329862-3-elder@riscstar.com>", "date": "2026-05-01T15:54:10", "name": "[net-next,02/12] net: pcs: pcs-xpcs: select operating mode for 10G-baseR capable PCS", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3ff84399ad51a7d9098ce2b596eb027618682744", "submitter": { "id": 89551, "url": "http://patchwork.ozlabs.org/api/1.1/people/89551/?format=api", "name": "Alex Elder", "email": "elder@riscstar.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260501155421.3329862-3-elder@riscstar.com/mbox/", "series": [ { "id": 502478, "url": "http://patchwork.ozlabs.org/api/1.1/series/502478/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=502478", "date": "2026-05-01T15:54:09", "name": "net: enable TC956x support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/502478/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2231938/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2231938/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-gpio+bounces-35954-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=riscstar-com.20251104.gappssmtp.com\n header.i=@riscstar-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=tNcg/P1P;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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Qualcomm QPS615)\nis unable to operate at 1000base-X and slower with a PHY connected\nusing SGMII/2500base-X (in our case a Qualcomm QCA8081).\n\nThe problem arises when the XPCS supports 10Gbase-R. That means that\nthe reset value of SR_XS_PCS_CTRL2:PCS_TYPE_SEL (0) is valid and this\nsuppresses the modal switching based on bit 13 of SR_PMA_CTRL1 or\nSR_XS_PCS_CTRL1.\n\nThe reported XPCS dev ID on a TC9564 is exactly the same as every other\nXPCS supported by the kernel so we can't use the dev ID to automatically\ndetermine what operating mode to select. However we can use the feature\nbits in SR_XS_PCS_STS2 to detect 10Gbase-R support.\n\nRather than introduce a quirk let's attempt to solve this generically by\nsetting SR_XS_PCS_CTRL2:PCS_TYPE_SEL to a reserved value when we detect\nthe right we detect the right combination of phy interface and XPCS\nfeature support.\n\nSigned-off-by: Daniel Thompson <daniel@riscstar.com>\nSigned-off-by: Alex Elder <elder@riscstar.com>\n---\n drivers/net/pcs/pcs-xpcs.c | 38 ++++++++++++++++++++++++++++++++++++++\n 1 file changed, 38 insertions(+)", "diff": "diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c\nindex e69fa2f0a0e8d..b2c84b7e1e113 100644\n--- a/drivers/net/pcs/pcs-xpcs.c\n+++ b/drivers/net/pcs/pcs-xpcs.c\n@@ -747,6 +747,40 @@ static void xpcs_pre_config(struct phylink_pcs *pcs, phy_interface_t interface)\n \txpcs->need_reset = false;\n }\n \n+static int xpcs_config_operating_mode(struct dw_xpcs *xpcs, int an_mode)\n+{\n+\tint mdio_stat2, ret;\n+\n+\tswitch (an_mode) {\n+\tcase DW_AN_C37_SGMII:\n+\tcase DW_AN_C37_1000BASEX:\n+\tcase DW_2500BASEX:\n+\t\tmdio_stat2 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2);\n+\t\tif (mdio_stat2 < 0)\n+\t\t\treturn mdio_stat2;\n+\n+\t\t/*\n+\t\t * If this XPCS supports 10Gbase-R then it will be the default\n+\t\t * which prevents 1000base-X and slower from working correctly.\n+\t\t *\n+\t\t * Why are we writing MDIO_PCS_CTRL2_TYPE + 1? We want the modal\n+\t\t * behaviour that comes when we pick a reserved value. XPCS\n+\t\t * allocates extra bits to this field and allocates values from\n+\t\t * 15 down so MDIO_PCS_CTRL2_TYPE + 1 is the value likely to\n+\t\t * be allocated last (and hopefully never).\n+\t\t */\n+\t\tif (mdio_stat2 & MDIO_PCS_STAT2_10GBR) {\n+\t\t\tret = xpcs_write(xpcs, MDIO_MMD_PCS, MDIO_CTRL2,\n+\t\t\t\t\t MDIO_PCS_CTRL2_TYPE + 1);\n+\t\t\tif (ret < 0)\n+\t\t\t\treturn ret;\n+\t\t}\n+\t\tbreak;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs,\n \t\t\t\t unsigned int neg_mode)\n {\n@@ -919,6 +953,10 @@ static int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface,\n \tif (!compat)\n \t\treturn -ENODEV;\n \n+\tret = xpcs_config_operating_mode(xpcs, compat->an_mode);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n \tif (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) {\n \t\t/* Wangxun devices need backplane CL37 AN enabled for\n \t\t * SGMII and 1000base-X\n", "prefixes": [ "net-next", "02/12" ] }