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GET /api/1.1/patches/2230820/?format=api
{ "id": 2230820, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2230820/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260430050954.3467984-3-hongxing.zhu@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/1.1/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260430050954.3467984-3-hongxing.zhu@nxp.com>", "date": "2026-04-30T05:09:53", "name": "[v3,2/3] arm64: dts: imx95: Add dma, intr, aer and pme interrupters for pcie{0,1}", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8d9d130665968a1ac32954972185ef8f9eeaa4e7", "submitter": { "id": 68324, "url": "http://patchwork.ozlabs.org/api/1.1/people/68324/?format=api", "name": "Hongxing Zhu", "email": "hongxing.zhu@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260430050954.3467984-3-hongxing.zhu@nxp.com/mbox/", "series": [ { "id": 502196, "url": "http://patchwork.ozlabs.org/api/1.1/series/502196/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=502196", "date": "2026-04-30T05:09:52", "name": "Add root port reset to support link recovery", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/502196/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2230820/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2230820/checks/", "tags": {}, "headers": { "Return-Path": "\n <linux-pci+bounces-53447-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=3WwsmxDqHp3X70CxbWq7rq/H2AVd/J7nCgKyzFOVg/0=;\n b=cvLD9DCXIdH27++eYvkrHR/mOhpg2fUdcgnSFrLrUyQXo9Uv6z6GK/G+v5cdLZWENGYtZy2ugXqlw9Eiv/dKgYNLGmkcnblYRxSwgXCnGw+KVV0cVm+a8suwvmWFQ2f2uWWMRT+pxnx2Qk/s6NMTldRH2w4yz4vj7s1qfFdBHrNm7h6dy94DViV1Np1fphesHx8azZqMEwuyoJLviNgmLNZrrJs51OVmyxfmDkM0doDHSE8x8RSo2dcyYCf4G1ov/R3oXAKOJeJqDmtzer0nnWUaomUuGjU1/NG6P5sFy3D5HJASEOqq1X4+9iZzTieIArCjsrOOJdim/5r1Mmz3aA==", "From": "Richard Zhu <hongxing.zhu@nxp.com>", "To": "robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tbhelgaas@google.com,\n\tfrank.li@nxp.com,\n\tl.stach@pengutronix.de,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com", "Cc": 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 40e695ca-b092-4b87-56f5-08dea6767634", "X-MS-Exchange-CrossTenant-AuthSource": "AM0PR04MB5220.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Apr 2026 05:08:05.6301\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n RnRljiTdYgH5B6MTcs7+zLevykeXmU6eDBa8uaQAYAY6WG9yeJCdWJsKLRteKLx5Ra2hJXjQu4rd6QEmCyOuHA==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "GV1PR04MB10108" }, "content": "Add dma, intr, aer and pme interrupters for pcie{0,1}.\n\nSigned-off-by: Richard Zhu <hongxing.zhu@nxp.com>\n---\n arch/arm64/boot/dts/freescale/imx95.dtsi | 16 ++++++++++++----\n 1 file changed, 12 insertions(+), 4 deletions(-)", "diff": "diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi\nindex 71394871d8dd0..6896d9c15bf53 100644\n--- a/arch/arm64/boot/dts/freescale/imx95.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi\n@@ -1861,8 +1861,12 @@ pcie0: pcie@4c300000 {\n \t\t\tbus-range = <0x00 0xff>;\n \t\t\tnum-lanes = <1>;\n \t\t\tnum-viewport = <8>;\n-\t\t\tinterrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tinterrupt-names = \"msi\";\n+\t\t\tinterrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"msi\", \"dma\", \"intr\", \"aer\", \"pme\";\n \t\t\t#interrupt-cells = <1>;\n \t\t\tinterrupt-map-mask = <0 0 0 0x7>;\n \t\t\tinterrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,\n@@ -1936,8 +1940,12 @@ pcie1: pcie@4c380000 {\n \t\t\tbus-range = <0x00 0xff>;\n \t\t\tnum-lanes = <1>;\n \t\t\tnum-viewport = <8>;\n-\t\t\tinterrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\tinterrupt-names = \"msi\";\n+\t\t\tinterrupts = <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tinterrupt-names = \"msi\", \"dma\", \"intr\", \"aer\", \"pme\";\n \t\t\t#interrupt-cells = <1>;\n \t\t\tinterrupt-map-mask = <0 0 0 0x7>;\n \t\t\tinterrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,\n", "prefixes": [ "v3", "2/3" ] }