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GET /api/1.1/patches/2229546/?format=api
{ "id": 2229546, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2229546/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428130718.1325177-3-stefanb@linux.ibm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260428130718.1325177-3-stefanb@linux.ibm.com>", "date": "2026-04-28T13:07:14", "name": "[2/6] tests: Have TPM I2C read/write functions take QTestState as first parameter", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "11ee08a39b35b1cd68b614dd7c2bbf8f65b0b1f5", "submitter": { "id": 75097, "url": "http://patchwork.ozlabs.org/api/1.1/people/75097/?format=api", "name": "Stefan Berger", "email": "stefanb@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260428130718.1325177-3-stefanb@linux.ibm.com/mbox/", "series": [ { "id": 501847, "url": "http://patchwork.ozlabs.org/api/1.1/series/501847/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501847", "date": "2026-04-28T13:07:15", "name": "Add test case for TPM over I2C with swtpm", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/501847/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2229546/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2229546/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=PyLkPcoQ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc\n :content-transfer-encoding:date:from:in-reply-to:message-id\n :mime-version:references:subject:to; s=pp1; bh=2Jbe5vvHnNLP38Kul\n ch2Ry4UhiSSV8bgumVKRuTFO4A=; b=PyLkPcoQlxLQZhvNLFyUAagF7P4l6Y9kq\n AZFgbQiju+Kr0bfSIWVHxcUM6JEKFv1UJS4SIpFC7Pij5cyqQxJh+Fq5dPQ7iaTI\n syQpEEQMfpFLd34TSqTBfHCisbrO2mDIdNpuOt6LfTNAl0j+1y+cT6o6n1jk/RAG\n rUpH5QK0SjxVgo3maYPWNDEuowxB6pCuJOFWP55KRFBKahvbcxX562GE6UJaN8UO\n 021k7FhnZ7wQb0wtdZBBUVapAAeAS4CD+hx9Yp0Z8lyTvFeJqSD/4oZVjgjKUoA2\n hdeJHVz+hr76W4lUHhssHVmMUuXhWnCRxqhgAJ59O7rIeFo6sdQQA==", "From": "Stefan Berger <stefanb@linux.ibm.com>", "To": "qemu-devel@nongnu.org", "Cc": "marcandre.lureau@redhat.com, armenon@redhat.com,\n Stefan Berger <stefanb@linux.ibm.com>", "Subject": "[PATCH 2/6] tests: Have TPM I2C read/write functions take QTestState\n as first parameter", "Date": "Tue, 28 Apr 2026 13:07:14 +0000", "Message-ID": "<20260428130718.1325177-3-stefanb@linux.ibm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260428130718.1325177-1-stefanb@linux.ibm.com>", "References": "<20260428130718.1325177-1-stefanb@linux.ibm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-TM-AS-GCONF": "00", "X-Authority-Analysis": "v=2.4 cv=AqDeGu9P c=1 sm=1 tr=0 ts=69f0b112 cx=c_pps\n a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22\n a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=cp_pve3XC55RmFQTQzQA:9", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwNDI4MDExOCBTYWx0ZWRfXy4oob/YHz7HI\n 13WtF0lAc+IeiDyTPc7Q25R3rnvagQP4mqFzAuUHNYuJW3JvQX6ve41D0WoR+bSfhpPlJU9G8Lm\n SWk3zWCx2MucS3nUpXsKjubEYDQ+r/Un/pCsPUoYNVuGupyZT3HuewxnoP4+BhtQ9dnN1rfVj5A\n roPoxptyZLrr1Z+A/rexoxw2tmqAJOQgGQ9BN7uXtD7I6YKsJprUh9XW4m49IVWDfZbo3cXyy6l\n riMOWPYqhKdJ2m5uhZ87ja5pvyOCVfSNFRlBawzrg8QVOC2yIEbRO2VzPQVwjk2ts+fGuj6Fafw\n p6yTzfjCODRoam87np62Z6B0Q7GHArJ9dmA7uDRUdyDhzidAyzh+/UR85yOMNXJZ74mLPthqWSI\n VmiWCfP2j3TMOEDFfhjBy/ZVNtS/ousW4ifRbk5y6RSX2CYi+2nD1eGEC5cCIadALZQEWDR36WR\n LYGc9LmLWV97Oo1AyqA==", "X-Proofpoint-GUID": "YSTpdAW6PWEGb8LYZLte01nTtTCCORY0", "X-Proofpoint-ORIG-GUID": "YSTpdAW6PWEGb8LYZLte01nTtTCCORY0", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-28_04,2026-04-28_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 clxscore=1015\n lowpriorityscore=0 spamscore=0 bulkscore=0 impostorscore=0 malwarescore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604280118", "Received-SPF": "pass client-ip=148.163.156.1;\n envelope-from=stefanb@linux.ibm.com;\n helo=mx0a-001b2d01.pphosted.com", "X-Spam_score_int": "-26", "X-Spam_score": "-2.7", "X-Spam_bar": "--", "X-Spam_report": "(-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Pass the QTestState as first parameter to the TPM I2C functions. Use\nglobal_qtest in existing test cases.\n\nSigned-off-by: Stefan Berger <stefanb@linux.ibm.com>\n---\n tests/qtest/tpm-tis-i2c-test.c | 171 +++++++++++++++++----------------\n tests/qtest/tpm-tis-i2c-util.c | 32 +++---\n tests/qtest/tpm-tis-i2c-util.h | 10 +-\n 3 files changed, 110 insertions(+), 103 deletions(-)", "diff": "diff --git a/tests/qtest/tpm-tis-i2c-test.c b/tests/qtest/tpm-tis-i2c-test.c\nindex 02ddf76c2c..f614f888f3 100644\n--- a/tests/qtest/tpm-tis-i2c-test.c\n+++ b/tests/qtest/tpm-tis-i2c-test.c\n@@ -50,62 +50,64 @@ static void tpm_tis_i2c_test_basic(const void *data)\n * All register accesses below must work without locality 0 being the\n * active locality. Therefore, ensure access is released.\n */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n- access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* read interrupt capability -- none are supported */\n- v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_CAPABILITY);\n g_assert_cmpint(v, ==, 0);\n \n /* try to enable all interrupts */\n- tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);\n- v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE);\n+ tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_ENABLE);\n /* none could be enabled */\n g_assert_cmpint(v, ==, 0);\n \n /* enable csum */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE,\n+ TPM_DATA_CSUM_ENABLED);\n /* check csum enable register has bit 0 set */\n- v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n+ v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n /* reading it as 32bit register returns same result */\n- v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n \n /* disable csum */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);\n /* check csum enable register has bit 0 clear */\n- v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n+ v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n g_assert_cmpint(v, ==, 0);\n \n /* write to unsupported register '1' */\n- tpm_tis_i2c_writel(0, 1, 0x12345678);\n- v = tpm_tis_i2c_readl(0, 1);\n+ tpm_tis_i2c_writel(global_qtest, 0, 1, 0x12345678);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, 1);\n g_assert_cmpint(v, ==, 0xffffffff);\n \n /* request use of locality */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n+ TPM_TIS_ACCESS_REQUEST_USE);\n \n /* read byte from STS + 3 */\n- v = tpm_tis_i2c_readb(0, TPM_I2C_REG_STS + 3);\n+ v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_STS + 3);\n g_assert_cmpint(v, ==, 0);\n \n /* check STS after writing to STS + 3 */\n- v = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS + 3, 0xf);\n- v2 = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS + 3, 0xf);\n+ v2 = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n g_assert_cmpint(v, ==, v2);\n \n /* release access */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n \n /* select locality 5 -- must not be possible */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_LOC_SEL, 5);\n- v = tpm_tis_i2c_readb(0, TPM_I2C_REG_LOC_SEL);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_LOC_SEL, 5);\n+ v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_LOC_SEL);\n g_assert_cmpint(v, ==, 0);\n }\n \n@@ -118,11 +120,12 @@ static void tpm_tis_i2c_test_check_localities(const void *data)\n uint32_t rid;\n \n for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) {\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n- capability = tpm_tis_i2c_readl(locty, TPM_I2C_REG_INTF_CAPABILITY);\n+ capability = tpm_tis_i2c_readl(global_qtest, locty,\n+ TPM_I2C_REG_INTF_CAPABILITY);\n i2c_cap = (TPM_I2C_CAP_INTERFACE_TYPE |\n TPM_I2C_CAP_INTERFACE_VER |\n TPM_I2C_CAP_TPM2_FAMILY |\n@@ -131,15 +134,15 @@ static void tpm_tis_i2c_test_check_localities(const void *data)\n TPM_I2C_CAP_DEV_ADDR_CHANGE);\n g_assert_cmpint(capability, ==, i2c_cap);\n \n- didvid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_DID_VID);\n+ didvid = tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_DID_VID);\n g_assert_cmpint(didvid, ==, (1 << 16) | PCI_VENDOR_ID_IBM);\n \n- rid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_RID);\n+ rid = tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_RID);\n g_assert_cmpint(rid, !=, 0);\n g_assert_cmpint(rid, !=, 0xffffffff);\n \n /* locality selection must be at locty */\n- l = tpm_tis_i2c_readb(locty, TPM_I2C_REG_LOC_SEL);\n+ l = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_LOC_SEL);\n g_assert_cmpint(l, ==, locty);\n }\n }\n@@ -151,23 +154,23 @@ static void tpm_tis_i2c_test_check_access_reg(const void *data)\n \n /* do not test locality 4 (hw only) */\n for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* request use of locality */\n- tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_REQUEST_USE);\n \n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* release access */\n- tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n }\n@@ -186,14 +189,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {\n pending_request_flag = 0;\n \n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* request use of locality */\n- tpm_tis_i2c_writeb(locty,\n+ tpm_tis_i2c_writeb(global_qtest, locty,\n TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n@@ -201,14 +204,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n /* lower localities cannot seize access */\n for (l = 0; l < locty; l++) {\n /* lower locality is not active */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n pending_request_flag |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* try to request use from 'l' */\n- tpm_tis_i2c_writeb(l,\n+ tpm_tis_i2c_writeb(global_qtest, l,\n TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_REQUEST_USE);\n \n@@ -216,7 +219,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n * requesting use from 'l' was not possible;\n * we must see REQUEST_USE and possibly PENDING_REQUEST\n */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_REQUEST_USE |\n@@ -227,17 +230,17 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n * locality 'locty' must be unchanged;\n * we must see PENDING_REQUEST\n */\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_PENDING_REQUEST |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* try to seize from 'l' */\n- tpm_tis_i2c_writeb(l,\n+ tpm_tis_i2c_writeb(global_qtest, l,\n TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);\n /* seize from 'l' was not possible */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_REQUEST_USE |\n@@ -245,7 +248,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* locality 'locty' must be unchanged */\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_PENDING_REQUEST |\n@@ -264,14 +267,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n */\n for (l = locty + 1; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {\n /* try to 'request use' from 'l' */\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_REQUEST_USE);\n \n /*\n * requesting use from 'l' was not possible; we should see\n * REQUEST_USE and may see PENDING_REQUEST\n */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_REQUEST_USE |\n@@ -282,7 +285,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n * locality 'l-1' must be unchanged; we should always\n * see PENDING_REQUEST from 'l' requesting access\n */\n- access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n@@ -290,10 +293,11 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* try to seize from 'l' */\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n+ TPM_TIS_ACCESS_SEIZE);\n \n /* seize from 'l' was possible */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n@@ -301,7 +305,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* l - 1 should show that it has BEEN_SEIZED */\n- access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_BEEN_SEIZED |\n@@ -309,10 +313,10 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* clear the BEEN_SEIZED flag and make sure it's gone */\n- tpm_tis_i2c_writeb(l - 1, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l - 1, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_BEEN_SEIZED);\n \n- access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n pending_request_flag |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n@@ -330,22 +334,22 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n /* release access from l - 1; this activates locty - 1 */\n l--;\n \n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n \n DPRINTF(\"%s: %d: relinquishing control on l = %d\\n\",\n __func__, __LINE__, l);\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n \n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n pending_request_flag |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n for (l = locty - 1; l >= 0; l--) {\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n@@ -353,7 +357,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* release this locality */\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n \n if (l == 1) {\n@@ -363,7 +367,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n \n /* no locality may be active now */\n for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n@@ -384,14 +388,14 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n for (locty = TPM_TIS_NUM_LOCALITIES - 2; locty >= 0; locty--) {\n pending_request_flag = 0;\n \n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n /* request use of locality */\n- tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_REQUEST_USE);\n- access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n@@ -405,9 +409,9 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n * request use of locality 'l' -- we MUST see REQUEST USE and\n * may see PENDING_REQUEST\n */\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_REQUEST_USE);\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_REQUEST_USE |\n@@ -416,7 +420,7 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;\n }\n /* release locality 'locty' */\n- tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n /*\n * highest locality should now be active; release it and make sure the\n@@ -427,16 +431,16 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n continue;\n }\n /* 'l' should be active now */\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n pending_request_flag |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n /* 'l' relinquishes access */\n- tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n+ tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n- access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n DPRINTF_ACCESS;\n if (l == 1 || (locty <= 1 && l == 2)) {\n pending_request_flag = 0;\n@@ -460,22 +464,24 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n size_t i;\n \n /* enable csum */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE,\n+ TPM_DATA_CSUM_ENABLED);\n /* check csum enable register has bit 0 set */\n- v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n+ v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n /* reading it as 32bit register returns same result */\n- v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n+ v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n \n /* request use of locality 0 */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n- access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n+ TPM_TIS_ACCESS_REQUEST_USE);\n+ access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n \n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n DPRINTF_STS;\n \n g_assert_cmpint(sts & 0xff, ==, 0);\n@@ -484,21 +490,22 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n g_assert_cmpint(bcount, >=, 128);\n \n /* read bcount from STS + 1 must work also */\n- bcount2 = tpm_tis_i2c_readw(0, TPM_I2C_REG_STS + 1);\n+ bcount2 = tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_STS + 1);\n g_assert_cmpint(bcount, ==, bcount2);\n \n /* ic2 must have bits 26-31 zero */\n g_assert_cmpint(sts & (0x1f << 26), ==, 0);\n \n- tpm_tis_i2c_writel(0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY);\n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_STS,\n+ TPM_TIS_STS_COMMAND_READY);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n DPRINTF_STS;\n g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_COMMAND_READY);\n \n /* transmit command */\n for (i = 0; i < sizeof(TPM_CMD); i++) {\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);\n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n DPRINTF_STS;\n if (i < sizeof(TPM_CMD) - 1) {\n g_assert_cmpint(sts & 0xff, ==,\n@@ -509,21 +516,21 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);\n }\n /* read the checksum */\n- csum = tpm_tis_i2c_readw(0, TPM_I2C_REG_DATA_CSUM_GET);\n+ csum = tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_GET);\n g_assert_cmpint(csum, ==, 0x6733);\n \n /* start processing */\n- tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);\n+ tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);\n \n uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;\n do {\n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {\n break;\n }\n } while (g_get_monotonic_time() < end_time);\n \n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n DPRINTF_STS;\n g_assert_cmpint(sts & 0xff, == ,\n TPM_TIS_STS_VALID | TPM_TIS_STS_DATA_AVAILABLE);\n@@ -534,8 +541,8 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n g_assert_cmpint(sizeof(tpm_msg), ==, bcount);\n \n for (i = 0; i < sizeof(tpm_msg); i++) {\n- tpm_msg[i] = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_FIFO);\n- sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n+ tpm_msg[i] = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_FIFO);\n+ sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n DPRINTF_STS;\n if (sts & TPM_TIS_STS_DATA_AVAILABLE) {\n g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);\n@@ -544,9 +551,9 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n g_assert_cmpmem(tpm_msg, sizeof(tpm_msg), s->tpm_msg, sizeof(*s->tpm_msg));\n \n /* relinquish use of locality 0 */\n- tpm_tis_i2c_writeb(0,\n+ tpm_tis_i2c_writeb(global_qtest, 0,\n TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n- access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n+ access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n }\n \n int main(int argc, char **argv)\ndiff --git a/tests/qtest/tpm-tis-i2c-util.c b/tests/qtest/tpm-tis-i2c-util.c\nindex 07b1eeba69..6e724a4a47 100644\n--- a/tests/qtest/tpm-tis-i2c-util.c\n+++ b/tests/qtest/tpm-tis-i2c-util.c\n@@ -20,45 +20,45 @@ uint32_t aspeed_bus_addr;\n \n static uint8_t cur_locty = 0xff;\n \n-static void tpm_tis_i2c_set_locty(uint8_t locty)\n+static void tpm_tis_i2c_set_locty(QTestState *s, uint8_t locty)\n {\n if (cur_locty != locty) {\n cur_locty = locty;\n- aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,\n+ aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR,\n TPM_I2C_REG_LOC_SEL, locty);\n }\n }\n \n-uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg)\n+uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg)\n {\n- tpm_tis_i2c_set_locty(locty);\n- return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n+ tpm_tis_i2c_set_locty(s, locty);\n+ return aspeed_i2c_readb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n }\n \n-uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg)\n+uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg)\n {\n- tpm_tis_i2c_set_locty(locty);\n+ tpm_tis_i2c_set_locty(s, locty);\n return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n }\n \n-uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg)\n+uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg)\n {\n- tpm_tis_i2c_set_locty(locty);\n- return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n+ tpm_tis_i2c_set_locty(s, locty);\n+ return aspeed_i2c_readl(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n }\n \n-void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v)\n+void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t v)\n {\n if (reg != TPM_I2C_REG_LOC_SEL) {\n- tpm_tis_i2c_set_locty(locty);\n+ tpm_tis_i2c_set_locty(s, locty);\n }\n- aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n+ aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n }\n \n-void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v)\n+void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_t v)\n {\n if (reg != TPM_I2C_REG_LOC_SEL) {\n- tpm_tis_i2c_set_locty(locty);\n+ tpm_tis_i2c_set_locty(s, locty);\n }\n- aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n+ aspeed_i2c_writel(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n }\ndiff --git a/tests/qtest/tpm-tis-i2c-util.h b/tests/qtest/tpm-tis-i2c-util.h\nindex dfe626b43d..3289545f61 100644\n--- a/tests/qtest/tpm-tis-i2c-util.h\n+++ b/tests/qtest/tpm-tis-i2c-util.h\n@@ -20,11 +20,11 @@ extern uint32_t aspeed_bus_addr;\n #define I2C_SLAVE_ADDR 0x2e\n #define I2C_DEV_BUS_NUM 10\n \n-uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg);\n-uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg);\n-uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg);\n+uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg);\n+uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg);\n+uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg);\n \n-void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v);\n-void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v);\n+void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t v);\n+void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_t v);\n \n #endif /* TESTS_TPM_TIS_I2C_UTIL_H */\n", "prefixes": [ "2/6" ] }