[{"id":3684007,"web_url":"http://patchwork.ozlabs.org/comment/3684007/","msgid":"","list_archive_url":null,"date":"2026-04-29T11:30:37","subject":"Re: [PATCH 2/6] tests: Have TPM I2C read/write functions take\n QTestState as first parameter","submitter":{"id":91136,"url":"http://patchwork.ozlabs.org/api/people/91136/","name":"Arun Menon","email":"armenon@redhat.com"},"content":"Hi,\n\nOn Tue, Apr 28, 2026 at 01:07:14PM +0000, Stefan Berger wrote:\n> Pass the QTestState as first parameter to the TPM I2C functions. Use\n> global_qtest in existing test cases.\n> \n> Signed-off-by: Stefan Berger \n> ---\n> tests/qtest/tpm-tis-i2c-test.c | 171 +++++++++++++++++----------------\n> tests/qtest/tpm-tis-i2c-util.c | 32 +++---\n> tests/qtest/tpm-tis-i2c-util.h | 10 +-\n> 3 files changed, 110 insertions(+), 103 deletions(-)\n> \n> diff --git a/tests/qtest/tpm-tis-i2c-test.c b/tests/qtest/tpm-tis-i2c-test.c\n> index 02ddf76c2c..f614f888f3 100644\n> --- a/tests/qtest/tpm-tis-i2c-test.c\n> +++ b/tests/qtest/tpm-tis-i2c-test.c\n> @@ -50,62 +50,64 @@ static void tpm_tis_i2c_test_basic(const void *data)\n> * All register accesses below must work without locality 0 being the\n> * active locality. Therefore, ensure access is released.\n> */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> - access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* read interrupt capability -- none are supported */\n> - v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_CAPABILITY);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_CAPABILITY);\n> g_assert_cmpint(v, ==, 0);\n> \n> /* try to enable all interrupts */\n> - tpm_tis_i2c_writel(0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);\n> - v = tpm_tis_i2c_readl(0, TPM_I2C_REG_INT_ENABLE);\n> + tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_INT_ENABLE, 0xffffffff);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_INT_ENABLE);\n> /* none could be enabled */\n> g_assert_cmpint(v, ==, 0);\n> \n> /* enable csum */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE,\n> + TPM_DATA_CSUM_ENABLED);\n> /* check csum enable register has bit 0 set */\n> - v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> + v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n> /* reading it as 32bit register returns same result */\n> - v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n> \n> /* disable csum */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE, 0);\n> /* check csum enable register has bit 0 clear */\n> - v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> + v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> g_assert_cmpint(v, ==, 0);\n> \n> /* write to unsupported register '1' */\n> - tpm_tis_i2c_writel(0, 1, 0x12345678);\n> - v = tpm_tis_i2c_readl(0, 1);\n> + tpm_tis_i2c_writel(global_qtest, 0, 1, 0x12345678);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, 1);\n> g_assert_cmpint(v, ==, 0xffffffff);\n> \n> /* request use of locality */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n> + TPM_TIS_ACCESS_REQUEST_USE);\n> \n> /* read byte from STS + 3 */\n> - v = tpm_tis_i2c_readb(0, TPM_I2C_REG_STS + 3);\n> + v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_STS + 3);\n> g_assert_cmpint(v, ==, 0);\n> \n> /* check STS after writing to STS + 3 */\n> - v = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS + 3, 0xf);\n> - v2 = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS + 3, 0xf);\n> + v2 = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> g_assert_cmpint(v, ==, v2);\n> \n> /* release access */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> \n> /* select locality 5 -- must not be possible */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_LOC_SEL, 5);\n> - v = tpm_tis_i2c_readb(0, TPM_I2C_REG_LOC_SEL);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_LOC_SEL, 5);\n> + v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_LOC_SEL);\n> g_assert_cmpint(v, ==, 0);\n> }\n> \n> @@ -118,11 +120,12 @@ static void tpm_tis_i2c_test_check_localities(const void *data)\n> uint32_t rid;\n> \n> for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES; locty++) {\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> - capability = tpm_tis_i2c_readl(locty, TPM_I2C_REG_INTF_CAPABILITY);\n> + capability = tpm_tis_i2c_readl(global_qtest, locty,\n> + TPM_I2C_REG_INTF_CAPABILITY);\n> i2c_cap = (TPM_I2C_CAP_INTERFACE_TYPE |\n> TPM_I2C_CAP_INTERFACE_VER |\n> TPM_I2C_CAP_TPM2_FAMILY |\n> @@ -131,15 +134,15 @@ static void tpm_tis_i2c_test_check_localities(const void *data)\n> TPM_I2C_CAP_DEV_ADDR_CHANGE);\n> g_assert_cmpint(capability, ==, i2c_cap);\n> \n> - didvid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_DID_VID);\n> + didvid = tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_DID_VID);\n> g_assert_cmpint(didvid, ==, (1 << 16) | PCI_VENDOR_ID_IBM);\n> \n> - rid = tpm_tis_i2c_readl(locty, TPM_I2C_REG_RID);\n> + rid = tpm_tis_i2c_readl(global_qtest, locty, TPM_I2C_REG_RID);\n> g_assert_cmpint(rid, !=, 0);\n> g_assert_cmpint(rid, !=, 0xffffffff);\n> \n> /* locality selection must be at locty */\n> - l = tpm_tis_i2c_readb(locty, TPM_I2C_REG_LOC_SEL);\n> + l = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_LOC_SEL);\n> g_assert_cmpint(l, ==, locty);\n> }\n> }\n> @@ -151,23 +154,23 @@ static void tpm_tis_i2c_test_check_access_reg(const void *data)\n> \n> /* do not test locality 4 (hw only) */\n> for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* request use of locality */\n> - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_REQUEST_USE);\n> \n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* release access */\n> - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> }\n> @@ -186,14 +189,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> for (locty = 0; locty < TPM_TIS_NUM_LOCALITIES - 1; locty++) {\n> pending_request_flag = 0;\n> \n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* request use of locality */\n> - tpm_tis_i2c_writeb(locty,\n> + tpm_tis_i2c_writeb(global_qtest, locty,\n> TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> @@ -201,14 +204,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> /* lower localities cannot seize access */\n> for (l = 0; l < locty; l++) {\n> /* lower locality is not active */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> pending_request_flag |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* try to request use from 'l' */\n> - tpm_tis_i2c_writeb(l,\n> + tpm_tis_i2c_writeb(global_qtest, l,\n> TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_REQUEST_USE);\n> \n> @@ -216,7 +219,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> * requesting use from 'l' was not possible;\n> * we must see REQUEST_USE and possibly PENDING_REQUEST\n> */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_REQUEST_USE |\n> @@ -227,17 +230,17 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> * locality 'locty' must be unchanged;\n> * we must see PENDING_REQUEST\n> */\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_PENDING_REQUEST |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* try to seize from 'l' */\n> - tpm_tis_i2c_writeb(l,\n> + tpm_tis_i2c_writeb(global_qtest, l,\n> TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);\n> /* seize from 'l' was not possible */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_REQUEST_USE |\n> @@ -245,7 +248,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* locality 'locty' must be unchanged */\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_PENDING_REQUEST |\n> @@ -264,14 +267,14 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> */\n> for (l = locty + 1; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {\n> /* try to 'request use' from 'l' */\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_REQUEST_USE);\n> \n> /*\n> * requesting use from 'l' was not possible; we should see\n> * REQUEST_USE and may see PENDING_REQUEST\n> */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_REQUEST_USE |\n> @@ -282,7 +285,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> * locality 'l-1' must be unchanged; we should always\n> * see PENDING_REQUEST from 'l' requesting access\n> */\n> - access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> @@ -290,10 +293,11 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* try to seize from 'l' */\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_SEIZE);\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> + TPM_TIS_ACCESS_SEIZE);\n> \n> /* seize from 'l' was possible */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> @@ -301,7 +305,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* l - 1 should show that it has BEEN_SEIZED */\n> - access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_BEEN_SEIZED |\n> @@ -309,10 +313,10 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* clear the BEEN_SEIZED flag and make sure it's gone */\n> - tpm_tis_i2c_writeb(l - 1, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l - 1, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_BEEN_SEIZED);\n> \n> - access = tpm_tis_i2c_readb(l - 1, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l - 1, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> pending_request_flag |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> @@ -330,22 +334,22 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> /* release access from l - 1; this activates locty - 1 */\n> l--;\n> \n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> \n> DPRINTF(\"%s: %d: relinquishing control on l = %d\\n\",\n> __func__, __LINE__, l);\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> \n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> pending_request_flag |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> for (l = locty - 1; l >= 0; l--) {\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> @@ -353,7 +357,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* release this locality */\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> \n> if (l == 1) {\n> @@ -363,7 +367,7 @@ static void tpm_tis_i2c_test_check_access_reg_seize(const void *data)\n> \n> /* no locality may be active now */\n> for (l = 0; l < TPM_TIS_NUM_LOCALITIES - 1; l++) {\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> @@ -384,14 +388,14 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n> for (locty = TPM_TIS_NUM_LOCALITIES - 2; locty >= 0; locty--) {\n> pending_request_flag = 0;\n> \n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> /* request use of locality */\n> - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_REQUEST_USE);\n> - access = tpm_tis_i2c_readb(locty, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, locty, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> @@ -405,9 +409,9 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n> * request use of locality 'l' -- we MUST see REQUEST USE and\n> * may see PENDING_REQUEST\n> */\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_REQUEST_USE);\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_REQUEST_USE |\n> @@ -416,7 +420,7 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n> pending_request_flag = TPM_TIS_ACCESS_PENDING_REQUEST;\n> }\n> /* release locality 'locty' */\n> - tpm_tis_i2c_writeb(locty, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, locty, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> /*\n> * highest locality should now be active; release it and make sure the\n> @@ -427,16 +431,16 @@ static void tpm_tis_i2c_test_check_access_reg_release(const void *data)\n> continue;\n> }\n> /* 'l' should be active now */\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> pending_request_flag |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> /* 'l' relinquishes access */\n> - tpm_tis_i2c_writeb(l, TPM_I2C_REG_ACCESS,\n> + tpm_tis_i2c_writeb(global_qtest, l, TPM_I2C_REG_ACCESS,\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> - access = tpm_tis_i2c_readb(l, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, l, TPM_I2C_REG_ACCESS);\n> DPRINTF_ACCESS;\n> if (l == 1 || (locty <= 1 && l == 2)) {\n> pending_request_flag = 0;\n> @@ -460,22 +464,24 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n> size_t i;\n> \n> /* enable csum */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_CSUM_ENABLE, TPM_DATA_CSUM_ENABLED);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE,\n> + TPM_DATA_CSUM_ENABLED);\n> /* check csum enable register has bit 0 set */\n> - v = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> + v = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n> /* reading it as 32bit register returns same result */\n> - v = tpm_tis_i2c_readl(0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> + v = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_ENABLE);\n> g_assert_cmpint(v, ==, TPM_DATA_CSUM_ENABLED);\n> \n> /* request use of locality 0 */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_REQUEST_USE);\n> - access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_ACCESS,\n> + TPM_TIS_ACCESS_REQUEST_USE);\n> + access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n> g_assert_cmpint(access, ==, TPM_TIS_ACCESS_TPM_REG_VALID_STS |\n> TPM_TIS_ACCESS_ACTIVE_LOCALITY |\n> TPM_TIS_ACCESS_TPM_ESTABLISHMENT);\n> \n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> DPRINTF_STS;\n> \n> g_assert_cmpint(sts & 0xff, ==, 0);\n> @@ -484,21 +490,22 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n> g_assert_cmpint(bcount, >=, 128);\n> \n> /* read bcount from STS + 1 must work also */\n> - bcount2 = tpm_tis_i2c_readw(0, TPM_I2C_REG_STS + 1);\n> + bcount2 = tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_STS + 1);\n> g_assert_cmpint(bcount, ==, bcount2);\n> \n> /* ic2 must have bits 26-31 zero */\n> g_assert_cmpint(sts & (0x1f << 26), ==, 0);\n> \n> - tpm_tis_i2c_writel(0, TPM_I2C_REG_STS, TPM_TIS_STS_COMMAND_READY);\n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + tpm_tis_i2c_writel(global_qtest, 0, TPM_I2C_REG_STS,\n> + TPM_TIS_STS_COMMAND_READY);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> DPRINTF_STS;\n> g_assert_cmpint(sts & 0xff, ==, TPM_TIS_STS_COMMAND_READY);\n> \n> /* transmit command */\n> for (i = 0; i < sizeof(TPM_CMD); i++) {\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);\n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_DATA_FIFO, TPM_CMD[i]);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> DPRINTF_STS;\n> if (i < sizeof(TPM_CMD) - 1) {\n> g_assert_cmpint(sts & 0xff, ==,\n> @@ -509,21 +516,21 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n> g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);\n> }\n> /* read the checksum */\n> - csum = tpm_tis_i2c_readw(0, TPM_I2C_REG_DATA_CSUM_GET);\n> + csum = tpm_tis_i2c_readw(global_qtest, 0, TPM_I2C_REG_DATA_CSUM_GET);\n> g_assert_cmpint(csum, ==, 0x6733);\n> \n> /* start processing */\n> - tpm_tis_i2c_writeb(0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);\n> + tpm_tis_i2c_writeb(global_qtest, 0, TPM_I2C_REG_STS, TPM_TIS_STS_TPM_GO);\n> \n> uint64_t end_time = g_get_monotonic_time() + 50 * G_TIME_SPAN_SECOND;\n> do {\n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> if ((sts & TPM_TIS_STS_DATA_AVAILABLE) != 0) {\n> break;\n> }\n> } while (g_get_monotonic_time() < end_time);\n> \n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> DPRINTF_STS;\n> g_assert_cmpint(sts & 0xff, == ,\n> TPM_TIS_STS_VALID | TPM_TIS_STS_DATA_AVAILABLE);\n> @@ -534,8 +541,8 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n> g_assert_cmpint(sizeof(tpm_msg), ==, bcount);\n> \n> for (i = 0; i < sizeof(tpm_msg); i++) {\n> - tpm_msg[i] = tpm_tis_i2c_readb(0, TPM_I2C_REG_DATA_FIFO);\n> - sts = tpm_tis_i2c_readl(0, TPM_I2C_REG_STS);\n> + tpm_msg[i] = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_DATA_FIFO);\n> + sts = tpm_tis_i2c_readl(global_qtest, 0, TPM_I2C_REG_STS);\n> DPRINTF_STS;\n> if (sts & TPM_TIS_STS_DATA_AVAILABLE) {\n> g_assert_cmpint((sts >> 8) & 0xffff, ==, --bcount);\n> @@ -544,9 +551,9 @@ static void tpm_tis_i2c_test_check_transmit(const void *data)\n> g_assert_cmpmem(tpm_msg, sizeof(tpm_msg), s->tpm_msg, sizeof(*s->tpm_msg));\n> \n> /* relinquish use of locality 0 */\n> - tpm_tis_i2c_writeb(0,\n> + tpm_tis_i2c_writeb(global_qtest, 0,\n> TPM_I2C_REG_ACCESS, TPM_TIS_ACCESS_ACTIVE_LOCALITY);\n> - access = tpm_tis_i2c_readb(0, TPM_I2C_REG_ACCESS);\n> + access = tpm_tis_i2c_readb(global_qtest, 0, TPM_I2C_REG_ACCESS);\n> }\n> \n> int main(int argc, char **argv)\n> diff --git a/tests/qtest/tpm-tis-i2c-util.c b/tests/qtest/tpm-tis-i2c-util.c\n> index 07b1eeba69..6e724a4a47 100644\n> --- a/tests/qtest/tpm-tis-i2c-util.c\n> +++ b/tests/qtest/tpm-tis-i2c-util.c\n> @@ -20,45 +20,45 @@ uint32_t aspeed_bus_addr;\n> \n> static uint8_t cur_locty = 0xff;\n> \n> -static void tpm_tis_i2c_set_locty(uint8_t locty)\n> +static void tpm_tis_i2c_set_locty(QTestState *s, uint8_t locty)\n> {\n> if (cur_locty != locty) {\n> cur_locty = locty;\n> - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR,\n> + aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR,\n> TPM_I2C_REG_LOC_SEL, locty);\n> }\n> }\n> \n> -uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg)\n> +uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg)\n> {\n> - tpm_tis_i2c_set_locty(locty);\n> - return aspeed_i2c_readb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n> + tpm_tis_i2c_set_locty(s, locty);\n> + return aspeed_i2c_readb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n> }\n> \n> -uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg)\n> +uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg)\n> {\n> - tpm_tis_i2c_set_locty(locty);\n> + tpm_tis_i2c_set_locty(s, locty);\n> return aspeed_i2c_readw(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n> }\n> \n> -uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg)\n> +uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg)\n> {\n> - tpm_tis_i2c_set_locty(locty);\n> - return aspeed_i2c_readl(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n> + tpm_tis_i2c_set_locty(s, locty);\n> + return aspeed_i2c_readl(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg);\n> }\n> \n> -void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v)\n> +void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t v)\n> {\n> if (reg != TPM_I2C_REG_LOC_SEL) {\n> - tpm_tis_i2c_set_locty(locty);\n> + tpm_tis_i2c_set_locty(s, locty);\n> }\n> - aspeed_i2c_writeb(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n> + aspeed_i2c_writeb(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n> }\n> \n> -void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v)\n> +void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_t v)\n> {\n> if (reg != TPM_I2C_REG_LOC_SEL) {\n> - tpm_tis_i2c_set_locty(locty);\n> + tpm_tis_i2c_set_locty(s, locty);\n> }\n> - aspeed_i2c_writel(global_qtest, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n> + aspeed_i2c_writel(s, aspeed_bus_addr, I2C_SLAVE_ADDR, reg, v);\n> }\n> diff --git a/tests/qtest/tpm-tis-i2c-util.h b/tests/qtest/tpm-tis-i2c-util.h\n> index dfe626b43d..3289545f61 100644\n> --- a/tests/qtest/tpm-tis-i2c-util.h\n> +++ b/tests/qtest/tpm-tis-i2c-util.h\n> @@ -20,11 +20,11 @@ extern uint32_t aspeed_bus_addr;\n> #define I2C_SLAVE_ADDR 0x2e\n> #define I2C_DEV_BUS_NUM 10\n> \n> -uint8_t tpm_tis_i2c_readb(uint8_t locty, uint8_t reg);\n> -uint16_t tpm_tis_i2c_readw(uint8_t locty, uint8_t reg);\n> -uint32_t tpm_tis_i2c_readl(uint8_t locty, uint8_t reg);\n> +uint8_t tpm_tis_i2c_readb(QTestState *s, uint8_t locty, uint8_t reg);\n> +uint16_t tpm_tis_i2c_readw(QTestState *s, uint8_t locty, uint8_t reg);\n> +uint32_t tpm_tis_i2c_readl(QTestState *s, uint8_t locty, uint8_t reg);\n> \n> -void tpm_tis_i2c_writeb(uint8_t locty, uint8_t reg, uint8_t v);\n> -void tpm_tis_i2c_writel(uint8_t locty, uint8_t reg, uint32_t v);\n> +void tpm_tis_i2c_writeb(QTestState *s, uint8_t locty, uint8_t reg, uint8_t v);\n> +void tpm_tis_i2c_writel(QTestState *s, uint8_t locty, uint8_t reg, uint32_t v);\n> \n> #endif /* TESTS_TPM_TIS_I2C_UTIL_H */\n> -- \n> 2.43.0\n> \n\nReviewed-by: Arun Menon \n\nRegards,\nArun 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