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GET /api/1.1/patches/2225258/?format=api
{ "id": 2225258, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2225258/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260420180238.33599-1-daniel.barboza@oss.qualcomm.com/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260420180238.33599-1-daniel.barboza@oss.qualcomm.com>", "date": "2026-04-20T18:02:38", "name": "[v3] match.pd: simplify lshift const cmp using bit_and [PR124019]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "e4f224d827ca9b4e96ec5412d487a8749ff5a813", "submitter": { "id": 92288, "url": "http://patchwork.ozlabs.org/api/1.1/people/92288/?format=api", "name": "Daniel Barboza", "email": "daniel.barboza@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260420180238.33599-1-daniel.barboza@oss.qualcomm.com/mbox/", "series": [ { "id": 500657, "url": "http://patchwork.ozlabs.org/api/1.1/series/500657/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=500657", "date": "2026-04-20T18:02:38", "name": "[v3] match.pd: simplify lshift const cmp using bit_and [PR124019]", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/500657/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2225258/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2225258/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ZiFpEQGw;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=kcUZ8j8I;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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The idea is that a bit_and is, on most common targets\nat least, more efficient than a lshift.\n\nBootstrapped and regression tested on x86, aarch64 and RISC-V.\n\n\tPR tree-optimization/124019\n\ngcc/ChangeLog:\n\n\t* match.pd (`A<<CST1 EQ|NE CST2 -> (A&CSTmask) EQ|NE (CST2>>CST1)`):\n\tNew pattern.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/aarch64/cmp_shifted_reg_1.c: changed comparison\n\tto \">\" to dodge this optimization and keep generating the\n\texpected shift compare insn.\n\t* gcc.dg/tree-ssa/pr124019.c: New test.\n---\n\nChanges from v2:\n- Wrapped the pattern around #if GIMPLE;\n- Added check for lshift single_use();\n- negs.c changes were reverted. The pattern is now checking\n for lshift single_use() and the test is no longer being affected;\n- Removed the \"A << 1 != CST1\" check related to pr114760-1.c and\n the CLZ builtin. Checking for single_use() is enough to avoid\n tripping on the builtin, thus we're free to support this use\n case;\n- Added check for CST2 zero bits.\n- v2 link: https://gcc.gnu.org/pipermail/gcc-patches/2026-March/709651.html\n\n gcc/match.pd | 36 +++++++++++++++++\n gcc/testsuite/gcc.dg/tree-ssa/pr124019.c | 40 +++++++++++++++++++\n .../gcc.target/aarch64/cmp_shifted_reg_1.c | 2 +-\n 3 files changed, 77 insertions(+), 1 deletion(-)\n create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr124019.c", "diff": "diff --git a/gcc/match.pd b/gcc/match.pd\nindex 7b652afb43d..d34d3ddf35f 100644\n--- a/gcc/match.pd\n+++ b/gcc/match.pd\n@@ -1454,6 +1454,42 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)\n (if (TYPE_UNSIGNED (type))\n (bit_and @0 (bit_not (lshift { build_all_ones_cst (type); } @1)))))\n \n+#if GIMPLE\n+/* PR124019: A << CST1 EQ|NE CST2 -> (A & CSTmask) EQ|NE (CST2 >> CST1); */\n+(for cmp (eq ne)\n+ (simplify\n+ (cmp (lshift@3 @0 INTEGER_CST@1) INTEGER_CST@2)\n+ (if (INTEGRAL_TYPE_P (TREE_TYPE (@0))\n+\t&& single_use (@3)\n+\t&& tree_fits_uhwi_p (@1)\n+\t&& tree_to_uhwi (@1) < TYPE_PRECISION (TREE_TYPE (@0))\n+\t&& tree_to_uhwi (@1) < TYPE_PRECISION (TREE_TYPE (@2)))\n+ (with {\n+ unsigned prec2 = TYPE_PRECISION (TREE_TYPE (@2));\n+ wide_int cst2_mask = wi::mask (tree_to_uhwi (@1), false, prec2);\n+ }\n+ /* We need to assert that CST2 lower CST1 bits are zero for the\n+\ttransformation to be valid. This seem to be already taken\n+\tcare of\tby CCP, turning cases like \"a << 4 == 17\" into\n+\t\"return 0\", and this check might be redundant. We can't rely\n+\ton CCP always having our backs though, therefore validate the\n+\tzero bits here to be sure. */\n+ (if (wi::to_wide (@2) == 0\n+\t || wi::eq_p (wi::bit_and (cst2_mask, wi::to_wide (@2)),\n+\t\t wi::zero (prec2)))\n+ (with {\n+\tunsigned prec = TYPE_PRECISION (TREE_TYPE (@0));\n+\tunsigned mask_len = prec - tree_to_uhwi (@1);\n+\ttree cst1_mask = wide_int_to_tree (TREE_TYPE (@0),\n+\t\t\t\t\t wi::mask (mask_len, false, prec));\n+\ttree type3 = TREE_TYPE (@3);\n+\twide_int lrshift = wi::lrshift (wi::to_wide (@2), wi::to_wide (@1));\n+\ttree cst_lrshift = wide_int_to_tree (type3, lrshift);\n+ }\n+ (cmp (convert:type3 (bit_and @0 { cst1_mask; }))\n+\t { cst_lrshift; })))))))\n+#endif\n+\n (for bitop (bit_and bit_ior)\n cmp (eq ne)\n /* PR35691: Transform\ndiff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr124019.c b/gcc/testsuite/gcc.dg/tree-ssa/pr124019.c\nnew file mode 100644\nindex 00000000000..bd46864c75b\n--- /dev/null\n+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr124019.c\n@@ -0,0 +1,40 @@\n+/* { dg-additional-options -O2 } */\n+/* { dg-additional-options -fdump-tree-optimized } */\n+\n+typedef unsigned char uint8_t;\n+typedef signed char int8_t;\n+\n+uint8_t f1(int8_t a)\n+{\n+ int8_t b = a << 4;\n+ return b == -128;\n+}\n+\n+uint8_t f2(int8_t a)\n+{\n+ int8_t b = a << 4;\n+ return b != -128;\n+}\n+\n+uint8_t f3(int8_t a)\n+{\n+ int8_t b = a << 6;\n+ return b == -128;\n+}\n+\n+uint8_t f4(int8_t a)\n+{\n+ int8_t b = a << 7;\n+ return b == -128;\n+}\n+\n+uint8_t f5(int8_t a)\n+{\n+ int8_t b = a << 1;\n+ return b == -128;\n+}\n+/* { dg-final { scan-tree-dump-times \" & 15;\" 2 optimized } } */\n+/* { dg-final { scan-tree-dump-times \" & 3;\" 1 optimized } } */\n+/* { dg-final { scan-tree-dump-times \" & 1;\" 1 optimized } } */\n+/* { dg-final { scan-tree-dump-times \" & 127;\" 1 optimized } } */\n+/* { dg-final { scan-tree-dump-times \" << \" 0 optimized } } */\ndiff --git a/gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c b/gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c\nindex cacecf4e71d..8feedce5c51 100644\n--- a/gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c\n+++ b/gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c\n@@ -4,7 +4,7 @@\n int f3 (int x, int y)\n {\n int res = x << 3;\n- return res != 0;\n+ return res > 0;\n }\n \n /* We should combine the shift and compare */\n", "prefixes": [ "v3" ] }