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GET /api/1.1/patches/2223718/?format=api
{ "id": 2223718, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2223718/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416014928.1279360-12-jamin_lin@aspeedtech.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260416014928.1279360-12-jamin_lin@aspeedtech.com>", "date": "2026-04-16T01:49:55", "name": "[v3,11/17] hw/usb/hcd-ehci: Implement 64-bit iTD descriptor addressing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7ce861f2cd09dd441115df05e92d36a5a9b11873", "submitter": { "id": 81768, "url": "http://patchwork.ozlabs.org/api/1.1/people/81768/?format=api", "name": "Jamin Lin", "email": "jamin_lin@aspeedtech.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260416014928.1279360-12-jamin_lin@aspeedtech.com/mbox/", "series": [ { "id": 500066, "url": "http://patchwork.ozlabs.org/api/1.1/series/500066/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500066", "date": "2026-04-16T01:49:32", "name": "hw/usb/ehci: Add 64-bit descriptor addressing support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/500066/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2223718/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2223718/checks/", "tags": {}, "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=PfNS/YNZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=LAsEwYhTEgnwpr2wb5WWKVJuSUOpQQQf3sYOcHjK3dY=;\n b=HnWphBhwPkC8NPpzobpEp2XjtnPJp1c4dn0//OrQuAfg1/t/j8TSG2UCeX17J+Ufyu5An2UA1DKObVBPZomyUNTN9Tmt0V1AWwTiAloTdpi4WTHHwYHgBrGrkTsemXZPhjnGbqCBKjkBtnBvT5yeckcwxXBcqGX7JF9bXrWbOlimzolNndpionisbpez0e+Yasb2LS4i3clpd6kcOGndvsRyMLl+8iY1Ih+LB2YrmDU4LEXSyj07239Z4ujE+9pxZzLXaJNhdImAaU93UKIQrZPgHPHQzNzaSYB/VCzkh1jJwaGBF1fYaKLT9giFaMVi6LnbrbaMtqwBWjf5J45SbA==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=aspeedtech.com; dmarc=pass action=none\n header.from=aspeedtech.com; dkim=pass header.d=aspeedtech.com; arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=aspeedtech.com;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=LAsEwYhTEgnwpr2wb5WWKVJuSUOpQQQf3sYOcHjK3dY=;\n b=PfNS/YNZsAQUn5eykSuTasL9peS+RvaQZqD0iINCU10fHVa4s/8AdVqZg4SXk9+hz5R8kbUoEq+qugtCKWGNy9Rr/t5WC+irRm6+Kry3yUO/b1huqnc3+6GtvtHuxwcW5zGyueeS6n/U7yrACQm8rUxGptY4imP4vgfvWwclZZhs3sc56DRoI54FL15bDXItAYJjILSX1W1crXV2vUS03FHthN5h0B+6synGyYMD1Xoog3qRdgR3oqcbgvBqnjSXhp/SjVn8NChjNtLxKYpTrndiaHRbDZ5AV7jiKiFM6BtQz3dXoE2uvsfnpQgbJeExska1KgYj8tH7FzKwy/RYVQ==", "From": "Jamin Lin <jamin_lin@aspeedtech.com>", "To": "\"philmd@linaro.org\" <philmd@linaro.org>, =?iso-8859-1?q?C=E9dric_Le_Goat?=\n\t=?iso-8859-1?q?er?= <clg@kaod.org>, Peter Maydell <peter.maydell@linaro.org>,\n Steven Lee <steven_lee@aspeedtech.com>, Troy Lee <leetroy@gmail.com>,\n Kane Chen <kane_chen@aspeedtech.com>,\n Andrew Jeffery <andrew@codeconstruct.com.au>, Joel Stanley <joel@jms.id.au>,\n \"open list:ASPEED BMCs\" <qemu-arm@nongnu.org>,\n \"open list:All patches CC here\" <qemu-devel@nongnu.org>", "CC": "Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>,\n \"flwu@google.com\" <flwu@google.com>, \"nabihestefan@google.com\"\n <nabihestefan@google.com>", "Subject": "[PATCH v3 11/17] hw/usb/hcd-ehci: Implement 64-bit iTD descriptor\n addressing", "Thread-Topic": "[PATCH v3 11/17] hw/usb/hcd-ehci: Implement 64-bit iTD\n descriptor addressing", "Thread-Index": "AQHczUNTxi7u6u1JKU6aX9gks+CZZg==", "Date": "Thu, 16 Apr 2026 01:49:55 +0000", "Message-ID": "<20260416014928.1279360-12-jamin_lin@aspeedtech.com>", "References": "<20260416014928.1279360-1-jamin_lin@aspeedtech.com>", "In-Reply-To": "<20260416014928.1279360-1-jamin_lin@aspeedtech.com>", "Accept-Language": "zh-TW, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "authentication-results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=PfNS/YNZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-Exchange-RoutingPolicyChecked": "\n ggiZAXpSkMKjl0PLils/Vm4RsvYXod14Cqa79/cb1cq4y+EHF5M9mnvi9x7UHNrHFhzeq4zDm654fRnJxMRJ1dLA2pCRmFQhtwdZJx5JkYYoYTX7sIWe6ogUk/OJa3ADDJyQsPENW87es/7ka1C9/6ScIbPD7WgEzfN67QeCzzQKUYgcck4gCd8XSDh1IV2Pj/YR/7LE62R/W7tLQLSaWsWZHK80TbpCwXSyJVUEOEBlVni4rBWyJRIbpnzgKct3PDrxXP3+iDJ9OAF5M30YlnYEiH0CV4cLaK+IxPSBEEsmzmcUz+fbT2F5PBwRWEOSIPRPfLr/3hR1JFGfgkpKFw==", "X-OriginatorOrg": "aspeedtech.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-AuthSource": "TYPPR06MB8206.apcprd06.prod.outlook.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1e67438a-694c-47f6-d674-08de9b5a7598", "X-MS-Exchange-CrossTenant-originalarrivaltime": "16 Apr 2026 01:49:55.5335 (UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "43d4aa98-e35b-4575-8939-080e90d5a249", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "\n 2mbohS5RJgtf1QQGaVESfU1w4KCivEhanNX+2nhMkbmAFJrE0w3U3DL2b30+bFFvFp3K/jPYOOPwm/QXs6kddLNamNEAOJzYrM/IZ75ofEg=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SEYPR06MB6202", "Received-SPF": "pass client-ip=2a01:111:f403:c405::5;\n envelope-from=jamin_lin@aspeedtech.com;\n helo=TYPPR03CU001.outbound.protection.outlook.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n SPF_HELO_PASS=-0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "EHCI supports 64-bit control data structure addressing when the\n64-bit Addressing Capability bit in HCCPARAMS is set. In that mode,\nthe CTRLDSSEGMENT register provides the upper 32 bits that are\nconcatenated with 32-bit link pointer values to form full 64-bit\ndescriptor addresses (EHCI 1.0, section 2.3.5 and Appendix B).\n\niTD link pointers are stored as 32-bit values and must be expanded\nto full 64-bit descriptor addresses when 64-bit mode is enabled.\nUpdate the iTD traversal path to use ehci_get_desc_addr() when\nfollowing link pointers.\n\nAppendix B also defines high dword fields for iTD buffer pointers.\nAdd bufptr_hi[7] to EHCIitd and use ehci_get_buf_addr() to construct\nfull 64-bit buffer addresses from bufptr[] and bufptr_hi[] fields\nwhen processing isochronous transfers. This allows buffers above\n4GB to be handled correctly.\n\nWhen 64-bit capability is disabled, descriptor and buffer addresses\nremain 32-bit and existing behaviour is unchanged.\n\nSigned-off-by: Jamin Lin <jamin_lin@aspeedtech.com>\n---\n hw/usb/hcd-ehci.h | 1 +\n hw/usb/hcd-ehci.c | 9 ++++++---\n 2 files changed, 7 insertions(+), 3 deletions(-)", "diff": "diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h\nindex 712de9d50e..af8c080c60 100644\n--- a/hw/usb/hcd-ehci.h\n+++ b/hw/usb/hcd-ehci.h\n@@ -63,6 +63,7 @@ typedef struct EHCIitd {\n #define ITD_BUFPTR_MAXPKT_SH 0\n #define ITD_BUFPTR_MULT_MASK 0x00000003\n #define ITD_BUFPTR_MULT_SH 0\n+ uint32_t bufptr_hi[7];\n } EHCIitd;\n \n /*\ndiff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c\nindex d93d227e6f..3db1c25e4d 100644\n--- a/hw/usb/hcd-ehci.c\n+++ b/hw/usb/hcd-ehci.c\n@@ -1463,7 +1463,8 @@ static int ehci_process_itd(EHCIState *ehci,\n return -1;\n }\n \n- ptr1 = (itd->bufptr[pg] & ITD_BUFPTR_MASK);\n+ ptr1 = ehci_get_buf_addr(ehci, itd->bufptr_hi[pg],\n+ itd->bufptr[pg], ITD_BUFPTR_MASK);\n qemu_sglist_init(&ehci->isgl, ehci->device, 2, ehci->as);\n if (off + len > 4096) {\n /* transfer crosses page border */\n@@ -1471,7 +1472,9 @@ static int ehci_process_itd(EHCIState *ehci,\n qemu_sglist_destroy(&ehci->isgl);\n return -1; /* avoid page pg + 1 */\n }\n- ptr2 = (itd->bufptr[pg + 1] & ITD_BUFPTR_MASK);\n+ ptr2 = ehci_get_buf_addr(ehci, itd->bufptr_hi[pg + 1],\n+ itd->bufptr[pg + 1],\n+ ITD_BUFPTR_MASK);\n uint32_t len2 = off + len - 4096;\n uint32_t len1 = len - len2;\n qemu_sglist_add(&ehci->isgl, ptr1 + off, len1);\n@@ -1761,7 +1764,7 @@ static int ehci_state_fetchitd(EHCIState *ehci, int async)\n \n put_dwords(ehci, NLPTR_GET(entry), (uint32_t *) &itd,\n sizeof(EHCIitd) >> 2);\n- ehci_set_fetch_addr(ehci, async, itd.next);\n+ ehci_set_fetch_addr(ehci, async, ehci_get_desc_addr(ehci, itd.next));\n ehci_set_state(ehci, async, EST_FETCHENTRY);\n \n return 1;\n", "prefixes": [ "v3", "11/17" ] }