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GET /api/1.1/patches/2221000/?format=api
{ "id": 2221000, "url": "http://patchwork.ozlabs.org/api/1.1/patches/2221000/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/patch/20260408165426.4154722-1-christoph.muellner@vrull.eu/", "project": { "id": 17, "url": "http://patchwork.ozlabs.org/api/1.1/projects/17/?format=api", "name": "GNU Compiler Collection", "link_name": "gcc", "list_id": "gcc-patches.gcc.gnu.org", "list_email": "gcc-patches@gcc.gnu.org", "web_url": null, "scm_url": null, "webscm_url": null }, "msgid": "<20260408165426.4154722-1-christoph.muellner@vrull.eu>", "date": "2026-04-08T16:54:26", "name": "RISC-V: Fix Zbkb single-bit IOR/XOR synthesis [PR124818]", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "b0ed3c22addbb782ad8c06ce4ec51f6ee3b7b407", "submitter": { "id": 84173, "url": "http://patchwork.ozlabs.org/api/1.1/people/84173/?format=api", "name": "Christoph Müllner", "email": "christoph.muellner@vrull.eu" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/gcc/patch/20260408165426.4154722-1-christoph.muellner@vrull.eu/mbox/", "series": [ { "id": 499161, "url": "http://patchwork.ozlabs.org/api/1.1/series/499161/?format=api", "web_url": "http://patchwork.ozlabs.org/project/gcc/list/?series=499161", "date": "2026-04-08T16:54:26", "name": "RISC-V: Fix Zbkb single-bit IOR/XOR synthesis [PR124818]", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499161/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2221000/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2221000/checks/", "tags": {}, "headers": { "Return-Path": "<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "gcc-patches@gcc.gnu.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=vrull.eu header.i=@vrull.eu header.a=rsa-sha256\n header.s=google header.b=mR/lxGfR;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=38.145.34.32; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "gcc-patches@gcc.gnu.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Gcc-patches mailing list <gcc-patches.gcc.gnu.org>", "List-Unsubscribe": "<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>", "List-Archive": "<https://gcc.gnu.org/pipermail/gcc-patches/>", "List-Post": "<mailto:gcc-patches@gcc.gnu.org>", "List-Help": "<mailto:gcc-patches-request@gcc.gnu.org?subject=help>", "List-Subscribe": "<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>", "Errors-To": "gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org" }, "content": "Only Zbs provides the bseti/binvi support that can directly handle a\nlarge single-bit immediate in scalar IOR/XOR operations. Zbkb alone\ndoes not, but synthesize_ior_xor treated Zbkb as sufficient and\nreturned false for such constants.\n\nOn RV32 with -march=rv32gc_zbkb this leaves an unmatchable\n(ior:SI reg (const_int 0x20000)) RTL insn, which later triggers an ICE\nin extract_insn during virtual register instantiation.\n\nRestrict the single-bit fast path to Zbs and add an RV32 Zbkb\nregression test for the reduced reproducer.\n\n\tPR target/124818\n\ngcc/ChangeLog:\n\n\t* config/riscv/riscv.cc (synthesize_ior_xor): Do not treat\n\tTARGET_ZBKB as sufficient for single-bit immediate IOR/XOR.\n\ngcc/testsuite/ChangeLog:\n\n\t* gcc.target/riscv/pr124818.c: New test.\n\nSigned-off-by: Christoph Müllner <christoph.muellner@vrull.eu>\n---\n gcc/config/riscv/riscv.cc | 2 +-\n gcc/testsuite/gcc.target/riscv/pr124818.c | 9 +++++++++\n 2 files changed, 10 insertions(+), 1 deletion(-)\n create mode 100644 gcc/testsuite/gcc.target/riscv/pr124818.c", "diff": "diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc\nindex a6106547757..b743d3533f2 100644\n--- a/gcc/config/riscv/riscv.cc\n+++ b/gcc/config/riscv/riscv.cc\n@@ -15919,7 +15919,7 @@ synthesize_ior_xor (rtx_code code, rtx operands[3])\n {\n /* Trivial cases that don't need synthesis. */\n if (SMALL_OPERAND (INTVAL (operands[2]))\n- || ((TARGET_ZBS || TARGET_ZBKB)\n+ || (TARGET_ZBS\n \t && single_bit_mask_operand (operands[2], word_mode)))\n return false;\n \ndiff --git a/gcc/testsuite/gcc.target/riscv/pr124818.c b/gcc/testsuite/gcc.target/riscv/pr124818.c\nnew file mode 100644\nindex 00000000000..a629e8e96a2\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/riscv/pr124818.c\n@@ -0,0 +1,9 @@\n+/* { dg-do compile { target { riscv32*-*-* } } } */\n+/* { dg-options \"-O2 -march=rv32gc_zbkb -mabi=ilp32\" } */\n+\n+int\n+f (unsigned int *flags)\n+{\n+ *flags |= 0x20000U;\n+ return 1;\n+}\n", "prefixes": [] }