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{ "id": 2221540, "url": "http://patchwork.ozlabs.org/api/1.1/covers/2221540/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260409155344.2849233-1-bruno.vilaca.sa@gmail.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/1.1/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "" }, "msgid": "<20260409155344.2849233-1-bruno.vilaca.sa@gmail.com>", "date": "2026-04-09T15:53:41", "name": "[0/2] target/riscv: fix RV32 henvcfg/stateen CSR handling", "submitter": { "id": 93104, "url": "http://patchwork.ozlabs.org/api/1.1/people/93104/?format=api", "name": "Bruno Sa", "email": "bruno.vilaca.sa@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260409155344.2849233-1-bruno.vilaca.sa@gmail.com/mbox/", "series": [ { "id": 499332, "url": "http://patchwork.ozlabs.org/api/1.1/series/499332/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499332", "date": "2026-04-09T15:53:42", "name": "target/riscv: fix RV32 henvcfg/stateen CSR handling", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499332/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2221540/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=IAyeihGC;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fs6Lk51Vxz1yCv\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Apr 2026 03:27:10 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wAt9E-0008SC-Jc; Thu, 09 Apr 2026 13:26:32 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <bruno.vilaca.sa@gmail.com>)\n id 1wArhf-0000NV-LU\n for qemu-devel@nongnu.org; Thu, 09 Apr 2026 11:53:59 -0400", "from mail-wm1-x335.google.com ([2a00:1450:4864:20::335])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <bruno.vilaca.sa@gmail.com>)\n id 1wArhe-0001YU-Az\n for qemu-devel@nongnu.org; Thu, 09 Apr 2026 11:53:59 -0400", "by mail-wm1-x335.google.com with SMTP id\n 5b1f17b1804b1-48374014a77so14540545e9.3\n for <qemu-devel@nongnu.org>; Thu, 09 Apr 2026 08:53:57 -0700 (PDT)", "from ninolomata-AERO-15-KC.. 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helo=mail-wm1-x335.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-Mailman-Approved-At": "Thu, 09 Apr 2026 13:26:29 -0400", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This series fixes two RV32-specific CSR handling issues in target/riscv.\n\nThe first patch fixes write_henvcfg() so that an RV32 write to henvcfg\ndoes not clear the upper-half bits implemented in henvcfgh.\n\nThe second patch fixes the RV32 split handling of the stateen CSRs by\nrejecting the xH CSRs on RV64, placing the upper-half mask bits in the\n*stateen0h write paths on RV32, and dropping the unsupported writable\nbits from sstateen0.\n\nBruno Sa (2):\n target/riscv: preserve RV32 henvcfgh on henvcfg writes\n target/riscv: fix RV32 stateen CSR handling\n\n target/riscv/csr.c | 122 ++++++++++++++++++++++++++++++++-------------\n 1 file changed, 86 insertions(+), 36 deletions(-)" }