[{"id":3675591,"web_url":"http://patchwork.ozlabs.org/comment/3675591/","msgid":"","list_archive_url":null,"date":"2026-04-10T01:21:41","subject":"Re: [PATCH 0/2] target/riscv: fix RV32 henvcfg/stateen CSR handling","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/people/64571/","name":"Alistair Francis","email":"alistair23@gmail.com"},"content":"On Fri, Apr 10, 2026 at 3:27 AM Bruno Sa wrote:\n>\n> This series fixes two RV32-specific CSR handling issues in target/riscv.\n>\n> The first patch fixes write_henvcfg() so that an RV32 write to henvcfg\n> does not clear the upper-half bits implemented in henvcfgh.\n>\n> The second patch fixes the RV32 split handling of the stateen CSRs by\n> rejecting the xH CSRs on RV64, placing the upper-half mask bits in the\n> *stateen0h write paths on RV32, and dropping the unsupported writable\n> bits from sstateen0.\n>\n> Bruno Sa (2):\n> target/riscv: preserve RV32 henvcfgh on henvcfg writes\n> target/riscv: fix RV32 stateen CSR handling\n\nThanks for the patches.\n\nI have applied patch 1 to my tree, but patch 2 doesn't seem to apply.\nDo you mind rebasing it on\nhttps://github.com/alistair23/qemu/tree/riscv-to-apply.next and\nresending a v2\n\nAlistair\n\n>\n> target/riscv/csr.c | 122 ++++++++++++++++++++++++++++++++-------------\n> 1 file changed, 86 insertions(+), 36 deletions(-)\n>\n> --\n> 2.43.0\n>","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=qcncp71m;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Thu, 09 Apr 2026\n 18:22:08 -0700 (PDT)","MIME-Version":"1.0","References":"<20260409155344.2849233-1-bruno.vilaca.sa@gmail.com>","In-Reply-To":"<20260409155344.2849233-1-bruno.vilaca.sa@gmail.com>","From":"Alistair Francis ","Date":"Fri, 10 Apr 2026 11:21:41 +1000","X-Gm-Features":"AQROBzDzqFjZGtJJwdZ4FGzCWVLXwkpJ-w_QwzPBibD6Jqk54I0dhrUsAwPQYWw","Message-ID":"\n ","Subject":"Re: [PATCH 0/2] target/riscv: fix RV32 henvcfg/stateen CSR handling","To":"Bruno Sa ","Cc":"qemu-devel@nongnu.org, qemu-riscv@nongnu.org, palmer@dabbelt.com,\n alistair.francis@wdc.com, liwei1518@gmail.com, dbarboza@ventanamicro.com,\n zhiwei_liu@linux.alibaba.com","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"quoted-printable","Received-SPF":"pass client-ip=2a00:1450:4864:20::630;\n envelope-from=alistair23@gmail.com; helo=mail-ej1-x630.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"}}]