diff mbox

[U-Boot,v3,2/5] sunxi: add USB EHCI driver

Message ID f4b90cf6a65a83e92ae1c6204f57402d395c1a67.1405895188.git.rbyshko@gmail.com
State Superseded
Delegated to: Ian Campbell
Headers show

Commit Message

Roman Byshko July 24, 2014, 8:54 p.m. UTC
The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
---
 drivers/usb/host/Makefile     |   1 +
 drivers/usb/host/ehci-sunxi.c | 196 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 197 insertions(+)
 create mode 100644 drivers/usb/host/ehci-sunxi.c

Comments

Marek Vasut July 25, 2014, 3:01 p.m. UTC | #1
On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> The Allwinner aka sunxi SoCs have one or more USB host controllers.
> This adds a driver for their EHCI.
> 
> Signed-off-by: Roman Byshko <rbyshko@gmail.com>

Did you verify the patches to be checkpatch clean please ? Also, they don't 
apply to u-boot-usb/master , so I will wait for V4 with this cleanup and rebase 
on top of u-boot-usb. Otherwise they are good, thanks !

CHECK: No space is necessary after a cast
#170: FILE: drivers/usb/host/ehci-sunxi.c:43:
+               .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+               .csr = (void*) SUNXI_USB_CSR,

ERROR: "(foo*)" should be "(foo *)"
#170: FILE: drivers/usb/host/ehci-sunxi.c:43:
+               .csr = (void*) SUNXI_USB_CSR,

CHECK: No space is necessary after a cast
#179: FILE: drivers/usb/host/ehci-sunxi.c:52:
+               .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+               .csr = (void*) SUNXI_USB_CSR,

ERROR: "(foo*)" should be "(foo *)"
#179: FILE: drivers/usb/host/ehci-sunxi.c:52:
+               .csr = (void*) SUNXI_USB_CSR,

ERROR: do not initialise statics to 0 or NULL
#186: FILE: drivers/usb/host/ehci-sunxi.c:59:
+static int enabled_hcd_count = 0;

ERROR: "foo* bar" should be "foo *bar"
#188: FILE: drivers/usb/host/ehci-sunxi.c:61:
+static void* get_io_base(int hcd_id)

CHECK: No space is necessary after a cast
#191: FILE: drivers/usb/host/ehci-sunxi.c:64:
+       if (hcd_id == 1)
+               return (void*) SUNXI_USB1_IO_BASE;

ERROR: "(foo*)" should be "(foo *)"
#191: FILE: drivers/usb/host/ehci-sunxi.c:64:
+               return (void*) SUNXI_USB1_IO_BASE;

CHECK: No space is necessary after a cast
#193: FILE: drivers/usb/host/ehci-sunxi.c:66:
+       else if (hcd_id == 2)
+               return (void*) SUNXI_USB2_IO_BASE;

ERROR: "(foo*)" should be "(foo *)"
#193: FILE: drivers/usb/host/ehci-sunxi.c:66:
+               return (void*) SUNXI_USB2_IO_BASE;

ERROR: trailing statements should be on next line
#194: FILE: drivers/usb/host/ehci-sunxi.c:67:
+       else return NULL;

ERROR: trailing whitespace
#195: FILE: drivers/usb/host/ehci-sunxi.c:68:
+}^I$

CHECK: Alignment should match open parenthesis
#301: FILE: drivers/usb/host/ehci-sunxi.c:174:
+       debug("sunxi-ehci: init hccr %x and hcor %x hc_length %d\n",
+               (uint32_t)*hccr, (uint32_t)*hcor,

total: 8 errors, 0 warnings, 5 checks, 203 lines checked

NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or
      scripts/cleanfile

NOTE: Ignored message types: COMPLEX_MACRO CONSIDER_KSTRTO MINMAX 
MULTISTATEMENT_MACRO_USE_DO_WHILE NETWORKING_BLOCK_COMMENT_STYLE USLEEP_RANGE

/tmp/[U-Boot] [PATCH v3 2_5] sunxi_add USB EHCI driver.mbox has style problems, 
please review.

Best regards,
Marek Vasut
Ian Campbell July 25, 2014, 3:38 p.m. UTC | #2
On Fri, 2014-07-25 at 17:01 +0200, Marek Vasut wrote:
> On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> > The Allwinner aka sunxi SoCs have one or more USB host controllers.
> > This adds a driver for their EHCI.
> > 
> > Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> 
> Did you verify the patches to be checkpatch clean please ? Also, they don't 
> apply to u-boot-usb/master , so I will wait for V4 with this cleanup and rebase 
> on top of u-boot-usb. Otherwise they are good, thanks !

Are you planning to take the whole series via u-boot-usb? That's OK by
me of course.

Ian.
Marek Vasut July 25, 2014, 3:41 p.m. UTC | #3
On Friday, July 25, 2014 at 05:38:20 PM, Ian Campbell wrote:
> On Fri, 2014-07-25 at 17:01 +0200, Marek Vasut wrote:
> > On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> > > The Allwinner aka sunxi SoCs have one or more USB host controllers.
> > > This adds a driver for their EHCI.
> > > 
> > > Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> > 
> > Did you verify the patches to be checkpatch clean please ? Also, they
> > don't apply to u-boot-usb/master , so I will wait for V4 with this
> > cleanup and rebase on top of u-boot-usb. Otherwise they are good, thanks
> > !
> 
> Are you planning to take the whole series via u-boot-usb? That's OK by
> me of course.

If you pick all but 2/5 right now, I am happy with that. It will prevent 
conflicts. I will pick 2/5 only after that . Let's do it like that. Roman will 
also have to resend only 2/5 once fixed.

Best regards,
Marek Vasut
Ian Campbell July 25, 2014, 4:06 p.m. UTC | #4
On Fri, 2014-07-25 at 17:41 +0200, Marek Vasut wrote:
> On Friday, July 25, 2014 at 05:38:20 PM, Ian Campbell wrote:
> > On Fri, 2014-07-25 at 17:01 +0200, Marek Vasut wrote:
> > > On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> > > > The Allwinner aka sunxi SoCs have one or more USB host controllers.
> > > > This adds a driver for their EHCI.
> > > > 
> > > > Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> > > 
> > > Did you verify the patches to be checkpatch clean please ? Also, they
> > > don't apply to u-boot-usb/master , so I will wait for V4 with this
> > > cleanup and rebase on top of u-boot-usb. Otherwise they are good, thanks
> > > !
> > 
> > Are you planning to take the whole series via u-boot-usb? That's OK by
> > me of course.
> 
> If you pick all but 2/5 right now, I am happy with that. It will prevent 
> conflicts. I will pick 2/5 only after that . Let's do it like that. Roman will 
> also have to resend only 2/5 once fixed.

Some patches (e.g. #5) don't make much sense without #2, but they are
harmless and when things eventually meet in whichever upstream tree it
should all (hopefully!) burst into life. Does that sound ok?

Ian.
Marek Vasut July 25, 2014, 4:31 p.m. UTC | #5
On Friday, July 25, 2014 at 06:06:45 PM, Ian Campbell wrote:
> On Fri, 2014-07-25 at 17:41 +0200, Marek Vasut wrote:
> > On Friday, July 25, 2014 at 05:38:20 PM, Ian Campbell wrote:
> > > On Fri, 2014-07-25 at 17:01 +0200, Marek Vasut wrote:
> > > > On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> > > > > The Allwinner aka sunxi SoCs have one or more USB host controllers.
> > > > > This adds a driver for their EHCI.
> > > > > 
> > > > > Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> > > > 
> > > > Did you verify the patches to be checkpatch clean please ? Also, they
> > > > don't apply to u-boot-usb/master , so I will wait for V4 with this
> > > > cleanup and rebase on top of u-boot-usb. Otherwise they are good,
> > > > thanks !
> > > 
> > > Are you planning to take the whole series via u-boot-usb? That's OK by
> > > me of course.
> > 
> > If you pick all but 2/5 right now, I am happy with that. It will prevent
> > conflicts. I will pick 2/5 only after that . Let's do it like that. Roman
> > will also have to resend only 2/5 once fixed.
> 
> Some patches (e.g. #5) don't make much sense without #2, but they are
> harmless and when things eventually meet in whichever upstream tree it
> should all (hopefully!) burst into life. Does that sound ok?

Yes, let's do it this way please. I will pick a new version of 2/5 only, you 
pick the rest now.

Thank you !

Best regards,
Marek Vasut
Ian Campbell July 25, 2014, 4:36 p.m. UTC | #6
On Fri, 2014-07-25 at 18:31 +0200, Marek Vasut wrote:
> On Friday, July 25, 2014 at 06:06:45 PM, Ian Campbell wrote:
> > On Fri, 2014-07-25 at 17:41 +0200, Marek Vasut wrote:
> > > On Friday, July 25, 2014 at 05:38:20 PM, Ian Campbell wrote:
> > > > On Fri, 2014-07-25 at 17:01 +0200, Marek Vasut wrote:
> > > > > On Thursday, July 24, 2014 at 10:54:21 PM, Roman Byshko wrote:
> > > > > > The Allwinner aka sunxi SoCs have one or more USB host controllers.
> > > > > > This adds a driver for their EHCI.
> > > > > > 
> > > > > > Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> > > > > 
> > > > > Did you verify the patches to be checkpatch clean please ? Also, they
> > > > > don't apply to u-boot-usb/master , so I will wait for V4 with this
> > > > > cleanup and rebase on top of u-boot-usb. Otherwise they are good,
> > > > > thanks !
> > > > 
> > > > Are you planning to take the whole series via u-boot-usb? That's OK by
> > > > me of course.
> > > 
> > > If you pick all but 2/5 right now, I am happy with that. It will prevent
> > > conflicts. I will pick 2/5 only after that . Let's do it like that. Roman
> > > will also have to resend only 2/5 once fixed.
> > 
> > Some patches (e.g. #5) don't make much sense without #2, but they are
> > harmless and when things eventually meet in whichever upstream tree it
> > should all (hopefully!) burst into life. Does that sound ok?
> 
> Yes, let's do it this way please. I will pick a new version of 2/5 only, you 
> pick the rest now.


Ack, will do.
Hans de Goede July 26, 2014, 4:25 p.m. UTC | #7
Hi,

On 07/24/2014 10:54 PM, Roman Byshko wrote:
> The Allwinner aka sunxi SoCs have one or more USB host controllers.
> This adds a driver for their EHCI.
>
> Signed-off-by: Roman Byshko <rbyshko@gmail.com>
> ---
>   drivers/usb/host/Makefile     |   1 +
>   drivers/usb/host/ehci-sunxi.c | 196 ++++++++++++++++++++++++++++++++++++++++++
>   2 files changed, 197 insertions(+)
>   create mode 100644 drivers/usb/host/ehci-sunxi.c
>
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index 04c1a64..c4f5157 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
>   obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
>   obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
>   obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
> +obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
>   obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
>   obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
>   obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
> diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
> new file mode 100644
> index 0000000..dc628ca
> --- /dev/null
> +++ b/drivers/usb/host/ehci-sunxi.c
> @@ -0,0 +1,196 @@
> +/*
> + * Copyright (C) 2014 Roman Byshko
> + *
> + * Roman Byshko <rbyshko@gmail.com>
> + *
> + * Based on code from
> + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <asm/arch/clock.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <common.h>
> +#include "ehci.h"
> +
> +#define SUNXI_USB1_IO_BASE		0x01c14000
> +#define SUNXI_USB2_IO_BASE		0x01c1c000
> +
> +#define SUNXI_USB_PMU_IRQ_ENABLE	0x800
> +#define SUNXI_USB_CSR			0x01c13404
> +#define SUNXI_USB_PASSBY_EN		1
> +
> +#define SUNXI_EHCI_AHB_ICHR8_EN		(1 << 10)
> +#define SUNXI_EHCI_AHB_INCR4_BURST_EN	(1 << 9)
> +#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN	(1 << 8)
> +#define SUNXI_EHCI_ULPI_BYPASS_EN	(1 << 0)
> +
> +static struct sunxi_ehci_hcd {
> +	struct usb_hcd *hcd;
> +	int usb_rst_mask;
> +	int ahb_clk_mask;
> +	int gpio_vbus;
> +	void *csr;
> +	int irq;
> +	int id;
> +} sunxi_echi_hcd[] = {
> +	{
> +		.usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
> +		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
> +		.gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
> +		.csr = (void*) SUNXI_USB_CSR,
> +		.irq = 39,
> +		.id = 1,
> +	},
> +#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
> +	{
> +		.usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
> +		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
> +		.gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
> +		.csr = (void*) SUNXI_USB_CSR,
> +		.irq = 40,
> +		.id = 2,
> +	}
> +#endif
> +};
> +
> +static int enabled_hcd_count = 0;
> +
> +static void* get_io_base(int hcd_id)
> +{
> +	if (hcd_id == 1)
> +		return (void*) SUNXI_USB1_IO_BASE;
> +	else if (hcd_id == 2)
> +		return (void*) SUNXI_USB2_IO_BASE;
> +	else return NULL;
> +}	
> +
> +static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
> +			  int data, int len)
> +{
> +	int j = 0, usbc_bit = 0;
> +	void *dest = sunxi_ehci->csr;
> +
> +	usbc_bit = 1 << (sunxi_ehci->id * 2);
> +	for (j = 0; j < len; j++) {
> +		/* set the bit address to be written */
> +		clrbits_le32(dest, 0xff << 8);
> +		setbits_le32(dest, (addr + j) << 8);
> +
> +		clrbits_le32(dest, usbc_bit);
> +		/* set data bit */
> +		if (data & 0x1)
> +			setbits_le32(dest, 1 << 7);
> +		else
> +			clrbits_le32(dest, 1 << 7);
> +
> +		setbits_le32(dest, usbc_bit);
> +
> +		clrbits_le32(dest, usbc_bit);
> +
> +		data >>= 1;
> +	}
> +}
> +
> +static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
> +{
> +	/* The following comments are machine
> +	 * translated from Chinese, you have been warned!
> +	 */
> +
> +	/* adjust PHY's magnitude and rate */
> +	usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
> +
> +	/* threshold adjustment disconnect */
> +	usb_phy_write(sunxi_ehci, 0x2a, 3, 2);

This only should be set to 3 for sun4i, for sun5i and sun7i
it should be 2, otherwise usb disconnection does not get
detected reliable. IOW this should be:

	/* threshold adjustment disconnect */
#ifdef CONFIG_SUN4I
	usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
#else
	usb_phy_write(sunxi_ehci, 0x2a, 2, 2);
#endif

As the kernel driver does.

Please fix this before submitting the next version of this
patch.

Regards,

Hans
Hans de Goede July 26, 2014, 10:22 p.m. UTC | #8
Hi,

On Fri, 2014-07-25 at 18:31 +0200, Marek Vasut wrote:
 > On Friday, July 25, 2014 at 06:06:45 PM, Ian Campbell wrote:
 > > On Fri, 2014-07-25 at 17:41 +0200, Marek Vasut wrote:

<snip>

 > > > If you pick all but 2/5 right now, I am happy with that. It will prevent
 > > > conflicts. I will pick 2/5 only after that . Let's do it like that. Roman
 > > > will also have to resend only 2/5 once fixed.
 > >
 > > Some patches (e.g. #5) don't make much sense without #2, but they are
 > > harmless and when things eventually meet in whichever upstream tree it
 > > should all (hopefully!) burst into life. Does that sound ok?
 >
 > Yes, let's do it this way please. I will pick a new version of 2/5 only, you
 > pick the rest now.

I've been working on u-boot-sunxi next today to add support for more boards upstream,
and I thought it would be good to cherry pick this set first so that I can add the
necessary CONFIG_USB_EHCI in boards.cfg for boards which support this right away,
but this causes builds to fail, e.g. :

drivers/usb/host/built-in.o: In function `usb_lowlevel_stop':
/home/hans/projects/sunxi/u-boot/drivers/usb/host/ehci-hcd.c:923: undefined reference to `ehci_hcd_stop'
drivers/usb/host/built-in.o: In function `usb_lowlevel_init':
/home/hans/projects/sunxi/u-boot/drivers/usb/host/ehci-hcd.c:935: undefined reference to `ehci_hcd_init'
arm-linux-gnu-ld.bfd: BFD version 2.24.0-4.fc21 20140613 assertion fail ../../binutils-2.24/bfd/elf32-arm.c:7696
arm-linux-gnu-ld.bfd: BFD version 2.24.0-4.fc21 20140613 assertion fail ../../binutils-2.24/bfd/elf32-arm.c:7696
arm-linux-gnu-ld.bfd: error: required section '.rel.plt' not found in the linker script
arm-linux-gnu-ld.bfd: final link failed: Invalid operation
Makefile:986: recipe for target 'u-boot' failed

So merging 1 and 3-5 to the sunxi tree while merging 2 through your (Marek's) tree
does not seem to be the best idea. I think it would be best to take this patch
(patch 2) through the sunxi tree too, with your ack (once your happy with it).

Roman, this means that it would be nice to get a v4 from you soon, so that we can line up
the next bunch of patches for mainline.

Thanks & Regards,

Hans
Marek Vasut July 27, 2014, 12:55 a.m. UTC | #9
On Sunday, July 27, 2014 at 12:22:31 AM, Hans de Goede wrote:
> Hi,
> 
> On Fri, 2014-07-25 at 18:31 +0200, Marek Vasut wrote:
>  > On Friday, July 25, 2014 at 06:06:45 PM, Ian Campbell wrote:
>  > > On Fri, 2014-07-25 at 17:41 +0200, Marek Vasut wrote:
> <snip>
> 
>  > > > If you pick all but 2/5 right now, I am happy with that. It will
>  > > > prevent conflicts. I will pick 2/5 only after that . Let's do it
>  > > > like that. Roman will also have to resend only 2/5 once fixed.
>  > > 
>  > > Some patches (e.g. #5) don't make much sense without #2, but they are
>  > > harmless and when things eventually meet in whichever upstream tree it
>  > > should all (hopefully!) burst into life. Does that sound ok?
>  > 
>  > Yes, let's do it this way please. I will pick a new version of 2/5 only,
>  > you pick the rest now.
> 
> I've been working on u-boot-sunxi next today to add support for more boards
> upstream, and I thought it would be good to cherry pick this set first so
> that I can add the necessary CONFIG_USB_EHCI in boards.cfg for boards
> which support this right away, but this causes builds to fail, e.g. :
> 
> drivers/usb/host/built-in.o: In function `usb_lowlevel_stop':
> /home/hans/projects/sunxi/u-boot/drivers/usb/host/ehci-hcd.c:923: undefined
> reference to `ehci_hcd_stop' drivers/usb/host/built-in.o: In function
> `usb_lowlevel_init':
> /home/hans/projects/sunxi/u-boot/drivers/usb/host/ehci-hcd.c:935: undefined
> reference to `ehci_hcd_init' arm-linux-gnu-ld.bfd: BFD version
> 2.24.0-4.fc21 20140613 assertion fail
> ../../binutils-2.24/bfd/elf32-arm.c:7696 arm-linux-gnu-ld.bfd: BFD version
> 2.24.0-4.fc21 20140613 assertion fail
> ../../binutils-2.24/bfd/elf32-arm.c:7696 arm-linux-gnu-ld.bfd: error:
> required section '.rel.plt' not found in the linker script
> arm-linux-gnu-ld.bfd: final link failed: Invalid operation
> Makefile:986: recipe for target 'u-boot' failed
> 
> So merging 1 and 3-5 to the sunxi tree while merging 2 through your
> (Marek's) tree does not seem to be the best idea. I think it would be best
> to take this patch (patch 2) through the sunxi tree too, with your ack
> (once your happy with it).
> 
> Roman, this means that it would be nice to get a v4 from you soon, so that
> we can line up the next bunch of patches for mainline.

OK, then please pick them all up.

Best regards,
Marek Vasut
Ian Campbell July 27, 2014, 8:29 a.m. UTC | #10
On Sun, 2014-07-27 at 02:55 +0200, Marek Vasut wrote:
> > So merging 1 and 3-5 to the sunxi tree while merging 2 through your
> > (Marek's) tree does not seem to be the best idea. I think it would be best
> > to take this patch (patch 2) through the sunxi tree too, with your ack
> > (once your happy with it).
> > 
> > Roman, this means that it would be nice to get a v4 from you soon, so that
> > we can line up the next bunch of patches for mainline.
> 
> OK, then please pick them all up.

Will do. To be clear we are still waiting for a v4 and for your ack.

Ian.
Hans de Goede July 27, 2014, 10:03 a.m. UTC | #11
Hi,

On 07/27/2014 10:29 AM, Ian Campbell wrote:
> On Sun, 2014-07-27 at 02:55 +0200, Marek Vasut wrote:
>>> So merging 1 and 3-5 to the sunxi tree while merging 2 through your
>>> (Marek's) tree does not seem to be the best idea. I think it would be best
>>> to take this patch (patch 2) through the sunxi tree too, with your ack
>>> (once your happy with it).
>>>
>>> Roman, this means that it would be nice to get a v4 from you soon, so that
>>> we can line up the next bunch of patches for mainline.
>>
>> OK, then please pick them all up.
> 
> Will do. To be clear we are still waiting for a v4 and for your ack.

Right.

Roman, note I've already merged your v3 series (with some conflict
resolution + minor fixes) here:

https://github.com/jwrdegoede/u-boot-sunxi/commits/next

As I've been working on enabling the EHCI code on additional boards +
adding support for more boards in general.

So we only need a v4 of "[PATCH v3 2/5] sunxi: add USB EHCI driver"
with all Mareks's + my remarks fixed, and then I'll drop that in place
of the one which is currently in that tree, and move things over to
http://git.denx.de/?p=u-boot/u-boot-sunxi.git;a=shortlog;h=refs/heads/next

Thanks,

Hans
Marek Vasut July 27, 2014, 3:35 p.m. UTC | #12
On Sunday, July 27, 2014 at 12:03:08 PM, Hans de Goede wrote:
> Hi,
> 
> On 07/27/2014 10:29 AM, Ian Campbell wrote:
> > On Sun, 2014-07-27 at 02:55 +0200, Marek Vasut wrote:
> >>> So merging 1 and 3-5 to the sunxi tree while merging 2 through your
> >>> (Marek's) tree does not seem to be the best idea. I think it would be
> >>> best to take this patch (patch 2) through the sunxi tree too, with
> >>> your ack (once your happy with it).
> >>> 
> >>> Roman, this means that it would be nice to get a v4 from you soon, so
> >>> that we can line up the next bunch of patches for mainline.
> >> 
> >> OK, then please pick them all up.
> > 
> > Will do. To be clear we are still waiting for a v4 and for your ack.
> 
> Right.
> 
> Roman, note I've already merged your v3 series (with some conflict
> resolution + minor fixes) here:
> 
> https://github.com/jwrdegoede/u-boot-sunxi/commits/next
> 
> As I've been working on enabling the EHCI code on additional boards +
> adding support for more boards in general.
> 
> So we only need a v4 of "[PATCH v3 2/5] sunxi: add USB EHCI driver"
> with all Mareks's + my remarks fixed, and then I'll drop that in place
> of the one which is currently in that tree, and move things over to
> http://git.denx.de/?p=u-boot/u-boot-sunxi.git;a=shortlog;h=refs/heads/next

Thanks for taking care of this.

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 04c1a64..c4f5157 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,6 +35,7 @@  obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
 obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
 obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
 obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
 obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
 obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
new file mode 100644
index 0000000..dc628ca
--- /dev/null
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -0,0 +1,196 @@ 
+/*
+ * Copyright (C) 2014 Roman Byshko
+ *
+ * Roman Byshko <rbyshko@gmail.com>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/arch/clock.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <common.h>
+#include "ehci.h"
+
+#define SUNXI_USB1_IO_BASE		0x01c14000
+#define SUNXI_USB2_IO_BASE		0x01c1c000
+
+#define SUNXI_USB_PMU_IRQ_ENABLE	0x800
+#define SUNXI_USB_CSR			0x01c13404
+#define SUNXI_USB_PASSBY_EN		1
+
+#define SUNXI_EHCI_AHB_ICHR8_EN		(1 << 10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN	(1 << 9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN	(1 << 8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN	(1 << 0)
+
+static struct sunxi_ehci_hcd {
+	struct usb_hcd *hcd;
+	int usb_rst_mask;
+	int ahb_clk_mask;
+	int gpio_vbus;
+	void *csr;
+	int irq;
+	int id;
+} sunxi_echi_hcd[] = {
+	{
+		.usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
+		.gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+		.csr = (void*) SUNXI_USB_CSR,
+		.irq = 39,
+		.id = 1,
+	},
+#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
+	{
+		.usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+		.ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
+		.gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+		.csr = (void*) SUNXI_USB_CSR,
+		.irq = 40,
+		.id = 2,
+	}
+#endif
+};
+
+static int enabled_hcd_count = 0;
+
+static void* get_io_base(int hcd_id)
+{
+	if (hcd_id == 1)
+		return (void*) SUNXI_USB1_IO_BASE;
+	else if (hcd_id == 2)
+		return (void*) SUNXI_USB2_IO_BASE;
+	else return NULL;
+}	
+
+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
+			  int data, int len)
+{
+	int j = 0, usbc_bit = 0;
+	void *dest = sunxi_ehci->csr;
+
+	usbc_bit = 1 << (sunxi_ehci->id * 2);
+	for (j = 0; j < len; j++) {
+		/* set the bit address to be written */
+		clrbits_le32(dest, 0xff << 8);
+		setbits_le32(dest, (addr + j) << 8);
+
+		clrbits_le32(dest, usbc_bit);
+		/* set data bit */
+		if (data & 0x1)
+			setbits_le32(dest, 1 << 7);
+		else
+			clrbits_le32(dest, 1 << 7);
+
+		setbits_le32(dest, usbc_bit);
+
+		clrbits_le32(dest, usbc_bit);
+
+		data >>= 1;
+	}
+}
+
+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+	/* The following comments are machine
+	 * translated from Chinese, you have been warned!
+	 */
+
+	/* adjust PHY's magnitude and rate */
+	usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
+
+	/* threshold adjustment disconnect */
+	usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
+
+	return;
+}
+
+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
+{
+	unsigned long bits = 0;
+	void *addr = get_io_base(sunxi_ehci->id) + SUNXI_USB_PMU_IRQ_ENABLE;
+
+	bits = SUNXI_EHCI_AHB_ICHR8_EN |
+		SUNXI_EHCI_AHB_INCR4_BURST_EN |
+		SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
+		SUNXI_EHCI_ULPI_BYPASS_EN;
+
+	if (enable)
+		setbits_le32(addr, bits);
+	else
+		clrbits_le32(addr, bits);
+
+	return;
+}
+
+static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+	setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask);
+	setbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask);
+
+	sunxi_usb_phy_init(sunxi_ehci);
+
+	sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN);
+
+	gpio_direction_output(sunxi_ehci->gpio_vbus, 1);
+}
+
+static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+	gpio_direction_output(sunxi_ehci->gpio_vbus, 0);
+
+	sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN);
+
+	clrbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask);
+	clrbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask);
+}
+
+int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
+		struct ehci_hcor **hcor)
+{
+	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
+
+	/* enable common PHY only once */
+	if (index == 0)
+		setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
+
+	sunxi_ehci_enable(sunxi_ehci);
+
+	*hccr = get_io_base(sunxi_ehci->id);
+
+	*hcor = (struct ehci_hcor *)((uint32_t) *hccr
+				+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+
+	debug("sunxi-ehci: init hccr %x and hcor %x hc_length %d\n",
+		(uint32_t)*hccr, (uint32_t)*hcor,
+		(uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+
+	enabled_hcd_count++;
+
+	return 0;
+}
+
+int ehci_hcd_stop(int index)
+{
+	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+	struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index];
+
+	sunxi_ehci_disable(sunxi_ehci);
+
+	/* disable common PHY only once, for the last enabled hcd */
+	if (enabled_hcd_count == 1)
+		clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
+
+	enabled_hcd_count--;
+
+	return 0;
+}