Message ID | ceb99692ba605ef079c6f796082055bed047248b.1703220284.git.Takahiro.Kuwano@infineon.com |
---|---|
State | Accepted |
Commit | 9901312e09af0bf51e35628cd8547637c103ed6c |
Delegated to: | Jagannadha Sutradharudu Teki |
Headers | show |
Series | mtd: spi-nor: Add support for Infineon S28HS02GT | expand |
On Fri, Dec 22, 2023 at 11:16 AM <tkuw584924@gmail.com> wrote: > > From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> > > Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode. > Instead, it supports CLPEF(0x82) which has the same functionality as CLSR. > spansion_sr_ready() is for multi-die package parts including S28HS02GT, so > we need to use CLPEF instead of CLSR. > > This change does not affect to S25x02GT which uses spansion_sr_ready() as > S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30). > > Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> > --- Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3f761b9b9e..20e82aaa65 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -752,7 +752,7 @@ static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy) else dev_dbg(nor->dev, "Programming Error occurred\n"); - nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0); + nor->write_reg(nor, SPINOR_OP_CYPRESS_CLPEF, NULL, 0); return -EIO; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ebe38306a1..8a94e12037 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -180,6 +180,7 @@ /* For Cypress flash. */ #define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */ +#define SPINOR_OP_CYPRESS_CLPEF 0x82 /* Clear P/E err flag */ #define SPINOR_REG_CYPRESS_ARCFN 0x00000006 #define SPINOR_REG_CYPRESS_STR1V 0x00800000 #define SPINOR_REG_CYPRESS_CFR1V 0x00800002