Message ID | 85b7198e80c6c0ab20459bd468b232767f4c0fe8.1432640411.git.michal.simek@xilinx.com |
---|---|
State | Superseded |
Delegated to: | Michal Simek |
Headers | show |
Hi Michal, On Tue, May 26, 2015 at 6:40 AM, Michal Simek <michal.simek@xilinx.com> wrote: > From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> > > Set the data bus width to 64-bit AMBA Databus width in config register. > > Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > drivers/net/zynq_gem.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c > index c723dbb0a694..22195805e6d6 100644 > --- a/drivers/net/zynq_gem.c > +++ b/drivers/net/zynq_gem.c > @@ -58,7 +58,14 @@ > #define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000080000 /* Div pclk by 32, 80MHz */ > #define ZYNQ_GEM_NWCFG_MDCCLKDIV2 0x0000c0000 /* Div pclk by 48, 120MHz */ > > -#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_NWCFG_FDEN | \ > +#ifdef CONFIG_TARGET_XILINX_ZYNQMP Isn't there a more explicit define you can use to select this such as CONFIG_ARM64? > +# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */ > +#else > +# define ZYNQ_GEM_DBUS_WIDTH (0 << 21) /* 32 bit bus */ > +#endif > + > +#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_DBUS_WIDTH | \ > + ZYNQ_GEM_NWCFG_FDEN | \ > ZYNQ_GEM_NWCFG_FSREM | \ > ZYNQ_GEM_NWCFG_MDCCLKDIV) There is a typo in the subject. with->width. -Joe On Tue, May 26, 2015 at 6:40 AM, Michal Simek <michal.simek@xilinx.com> wrote: > From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> > > Set the data bus width to 64-bit AMBA Databus width in config register. > > Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > Signed-off-by: Michal Simek <michal.simek@xilinx.com> > --- > > drivers/net/zynq_gem.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c > index c723dbb0a694..22195805e6d6 100644 > --- a/drivers/net/zynq_gem.c > +++ b/drivers/net/zynq_gem.c > @@ -58,7 +58,14 @@ > #define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000080000 /* Div pclk by 32, 80MHz */ > #define ZYNQ_GEM_NWCFG_MDCCLKDIV2 0x0000c0000 /* Div pclk by 48, 120MHz */ > > -#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_NWCFG_FDEN | \ > +#ifdef CONFIG_TARGET_XILINX_ZYNQMP > +# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */ > +#else > +# define ZYNQ_GEM_DBUS_WIDTH (0 << 21) /* 32 bit bus */ > +#endif > + > +#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_DBUS_WIDTH | \ > + ZYNQ_GEM_NWCFG_FDEN | \ > ZYNQ_GEM_NWCFG_FSREM | \ > ZYNQ_GEM_NWCFG_MDCCLKDIV) > > -- > 2.3.5 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot
On 05/27/2015 08:08 PM, Joe Hershberger wrote: > Hi Michal, > > On Tue, May 26, 2015 at 6:40 AM, Michal Simek <michal.simek at xilinx.com> wrote: >> From: Siva Durga Prasad Paladugu <siva.durga.paladugu at xilinx.com> >> >> Set the data bus width to 64-bit AMBA Databus width in config register. >> >> Signed-off-by: Siva Durga Prasad Paladugu <sivadur at xilinx.com> >> Signed-off-by: Michal Simek <michal.simek at xilinx.com> >> --- >> >> drivers/net/zynq_gem.c | 9 ++++++++- >> 1 file changed, 8 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c >> index c723dbb0a694..22195805e6d6 100644 >> --- a/drivers/net/zynq_gem.c >> +++ b/drivers/net/zynq_gem.c >> @@ -58,7 +58,14 @@ >> #define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000080000 /* Div pclk by 32, 80MHz */ >> #define ZYNQ_GEM_NWCFG_MDCCLKDIV2 0x0000c0000 /* Div pclk by 48, 120MHz */ >> >> -#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_NWCFG_FDEN | \ >> +#ifdef CONFIG_TARGET_XILINX_ZYNQMP > > Isn't there a more explicit define you can use to select this such as > CONFIG_ARM64? No problem to use it - fixed in v2. > >> +# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */ >> +#else >> +# define ZYNQ_GEM_DBUS_WIDTH (0 << 21) /* 32 bit bus */ >> +#endif >> + >> +#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_DBUS_WIDTH | \ >> + ZYNQ_GEM_NWCFG_FDEN | \ >> ZYNQ_GEM_NWCFG_FSREM | \ >> ZYNQ_GEM_NWCFG_MDCCLKDIV) > > There is a typo in the subject. with->width. Fixed too in v2. Thanks, Michal
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index c723dbb0a694..22195805e6d6 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -58,7 +58,14 @@ #define ZYNQ_GEM_NWCFG_MDCCLKDIV 0x000080000 /* Div pclk by 32, 80MHz */ #define ZYNQ_GEM_NWCFG_MDCCLKDIV2 0x0000c0000 /* Div pclk by 48, 120MHz */ -#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_NWCFG_FDEN | \ +#ifdef CONFIG_TARGET_XILINX_ZYNQMP +# define ZYNQ_GEM_DBUS_WIDTH (1 << 21) /* 64 bit bus */ +#else +# define ZYNQ_GEM_DBUS_WIDTH (0 << 21) /* 32 bit bus */ +#endif + +#define ZYNQ_GEM_NWCFG_INIT (ZYNQ_GEM_DBUS_WIDTH | \ + ZYNQ_GEM_NWCFG_FDEN | \ ZYNQ_GEM_NWCFG_FSREM | \ ZYNQ_GEM_NWCFG_MDCCLKDIV)