diff mbox series

[08/13] armv8: Allow endianness to be setted at reset entry

Message ID 20240519-aarch64-be-v1-8-75cc328eddfa@flygoat.com
State Changes Requested
Delegated to: Tom Rini
Headers show
Series Arm64 big endian enablement | expand

Commit Message

Jiaxun Yang May 19, 2024, 12:56 p.m. UTC
Provide a option to allow Endian at U-Boot's EL to be setted
at reset entry.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/arm/cpu/armv8/Kconfig |  9 +++++++++
 arch/arm/cpu/armv8/start.S | 26 ++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 9f0fb369f773..4b38ee12de58 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -14,6 +14,15 @@  config ARMV8_SPL_EXCEPTION_VECTORS
 	  Say N here if you are running out of code space in the image
 	  and want to save some space at the cost of less debugging info.
 
+config ARMV8_RESET_SET_ENDIAN
+	bool "Set CPU endianness at reset entry"
+	help
+	  Perform endianness setting with SCTLR_ELx registers at U-Boot's
+	  reset entry.
+
+	  Say Y here if your CPU may comes out of reset in a different
+	  endianness.
+
 config ARMV8_MULTIENTRY
         bool "Enable multiple CPUs to enter into U-Boot"
 
diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
index 746128026172..2e6ae2f6f3ca 100644
--- a/arch/arm/cpu/armv8/start.S
+++ b/arch/arm/cpu/armv8/start.S
@@ -9,6 +9,7 @@ 
 #include <linux/linkage.h>
 #include <asm/macro.h>
 #include <asm/armv8/mmu.h>
+#include <asm/assembler.h>
 
 /*************************************************************************
  *
@@ -53,6 +54,31 @@  _bss_end_ofs:
 	.quad	__bss_end - _start
 
 reset:
+#if CONFIG_IS_ENABLED(ARMV8_RESET_SET_ENDIAN)
+	switch_el x16, 3f, 2f, 1f
+3:	mrs	x16, sctlr_el3
+CPU_BE(	mov	x17, #(CR_EE))
+CPU_BE(	orr	x16, x17, x16)
+CPU_LE(	mov	x17, #~(CR_EE))
+CPU_LE(	and	x16, x17, x16)
+	msr	sctlr_el3, x16
+	isb
+2:	mrs	x16, sctlr_el2
+CPU_BE(	mov	x17, #(CR_EE | CR_E0E))
+CPU_BE(	orr	x16, x17, x16)
+CPU_LE(	mov	x17, #~(CR_EE | CR_E0E))
+CPU_LE(	and	x16, x17, x16)
+	msr	sctlr_el2, x16
+	isb
+1:	mrs	x16, sctlr_el1
+CPU_BE(	mov	x17, #(CR_EE | CR_E0E))
+CPU_BE(	orr	x16, x17, x16)
+CPU_LE(	mov	x17, #~(CR_EE | CR_E0E))
+CPU_LE(	and	x16, x17, x16)
+	msr	sctlr_el1, x16
+0:	isb
+#endif
+
 	/* Allow the board to save important registers */
 	b	save_boot_params
 .globl	save_boot_params_ret