| Message ID | 20240415212747.2678974-5-jm@ti.com |
|---|---|
| State | Superseded |
| Delegated to: | Tom Rini |
| Headers | show |
| Series | Fix MMC tuning algorithm | expand |
> -----Original Message----- > From: Judith Mendez <jm@ti.com> > Sent: Tuesday, April 16, 2024 6:28 AM > To: Peng Fan <peng.fan@nxp.com>; Jaehoon Chung <jh80.chung@samsung.com>; Tom Rini <trini@konsulko.com> > Cc: Nitin Yadav <n-yadav@ti.com>; Simon Glass <sjg@chromium.org>; u-boot@lists.denx.de > Subject: [PATCH 4/5] mmc: am654_sdhci: Set ENDLL=1 for DDR52 mode > > According to the device datasheet [0], ENDLL=1 for > DDR52 mode, so call am654_sdhci_setup_dll() and write > itapdly after since we do not carry out tuning. > > [0] https://www.ti.com/lit/ds/symlink/am62p.pdf > Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") > Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > drivers/mmc/am654_sdhci.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c > index 38f1ad28ec4..dee56dfdbaa 100644 > --- a/drivers/mmc/am654_sdhci.c > +++ b/drivers/mmc/am654_sdhci.c > @@ -287,12 +287,14 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) > > regmap_update_bits(plat->base, PHY_CTRL4, mask, val); > > - if (mode > UHS_SDR25 && speed >= CLOCK_TOO_SLOW_HZ) { > + if ((mode > UHS_SDR25 || mode == MMC_DDR_52) && speed >= CLOCK_TOO_SLOW_HZ) { > ret = am654_sdhci_setup_dll(plat, speed); > if (ret) > return ret; > > plat->dll_enable = true; > + am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode], > + plat->itap_del_ena[mode]); > } else { > am654_sdhci_setup_delay_chain(plat, mode); > plat->dll_enable = false; > -- > 2.43.2
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c index 38f1ad28ec4..dee56dfdbaa 100644 --- a/drivers/mmc/am654_sdhci.c +++ b/drivers/mmc/am654_sdhci.c @@ -287,12 +287,14 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host) regmap_update_bits(plat->base, PHY_CTRL4, mask, val); - if (mode > UHS_SDR25 && speed >= CLOCK_TOO_SLOW_HZ) { + if ((mode > UHS_SDR25 || mode == MMC_DDR_52) && speed >= CLOCK_TOO_SLOW_HZ) { ret = am654_sdhci_setup_dll(plat, speed); if (ret) return ret; plat->dll_enable = true; + am654_sdhci_write_itapdly(plat, plat->itap_del_sel[mode], + plat->itap_del_ena[mode]); } else { am654_sdhci_setup_delay_chain(plat, mode); plat->dll_enable = false;
According to the device datasheet [0], ENDLL=1 for DDR52 mode, so call am654_sdhci_setup_dll() and write itapdly after since we do not carry out tuning. [0] https://www.ti.com/lit/ds/symlink/am62p.pdf Fixes: c964447ea3d6 ("mmc: am654_sdhci: Add support for input tap delay") Signed-off-by: Judith Mendez <jm@ti.com> --- drivers/mmc/am654_sdhci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)