diff mbox series

[v2,04/14] rockchip: rk3308: Generate ethaddr based on cpu id

Message ID 20240408181429.3676856-5-jonas@kwiboo.se
State Accepted
Delegated to: Kever Yang
Headers show
Series rockchip: rk3308: Sync DT with linux v6.8 and update defconfigs | expand

Commit Message

Jonas Karlman April 8, 2024, 6:14 p.m. UTC
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
memory. The rockchip_otp driver already support the RK3308 variant.
However, the device tree is missing a node to enable use of OTP.

Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
driver and enable use of misc_init_r() to set ethaddr based on cpu id.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v2: Add clocks and resets props
---
 arch/arm/dts/rk3308-u-boot.dtsi | 16 ++++++++++++++++
 arch/arm/mach-rockchip/Kconfig  |  3 +++
 2 files changed, 19 insertions(+)

Comments

Quentin Schulz April 9, 2024, 3:41 p.m. UTC | #1
Hi Jonas,

On 4/8/24 20:14, Jonas Karlman wrote:
> Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
> memory. The rockchip_otp driver already support the RK3308 variant.
> However, the device tree is missing a node to enable use of OTP.
> 
> Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
> driver and enable use of misc_init_r() to set ethaddr based on cpu id.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
> v2: Add clocks and resets props
> ---
>   arch/arm/dts/rk3308-u-boot.dtsi | 16 ++++++++++++++++
>   arch/arm/mach-rockchip/Kconfig  |  3 +++
>   2 files changed, 19 insertions(+)
> 
> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
> index db2c20a7055e..436f66d1b87d 100644
> --- a/arch/arm/dts/rk3308-u-boot.dtsi
> +++ b/arch/arm/dts/rk3308-u-boot.dtsi
> @@ -10,6 +10,22 @@
>   		mmc0 = &emmc;
>   		mmc1 = &sdmmc;
>   	};
> +
> +	otp: nvmem@ff210000 {
> +		compatible = "rockchip,rk3308-otp";
> +		reg = <0x0 0xff210000 0x0 0x4000>;
> +		clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> +			 <&cru PCLK_OTP_PHY>;
> +		clock-names = "otp", "apb_pclk", "phy";
> +		resets = <&cru SRST_OTP_PHY>;
> +		reset-names = "phy";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		cpu_id: id@7 {
> +			reg = <0x07 0x10>;
> +		};
> +	};

Any plan upstreaming this to the Linux kernel so we can avoid 
maintaining it in U-Boot?

It seems supported (the compatible is matched by a driver and there's a 
DT binding already).

Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>

Cheers,
Quentin
Jonas Karlman April 9, 2024, 4:08 p.m. UTC | #2
Hi Quentin,

On 2024-04-09 17:41, Quentin Schulz wrote:
> Hi Jonas,
> 
> On 4/8/24 20:14, Jonas Karlman wrote:
>> Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
>> memory. The rockchip_otp driver already support the RK3308 variant.
>> However, the device tree is missing a node to enable use of OTP.
>>
>> Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
>> driver and enable use of misc_init_r() to set ethaddr based on cpu id.
>>
>> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
>> ---
>> v2: Add clocks and resets props
>> ---
>>   arch/arm/dts/rk3308-u-boot.dtsi | 16 ++++++++++++++++
>>   arch/arm/mach-rockchip/Kconfig  |  3 +++
>>   2 files changed, 19 insertions(+)
>>
>> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
>> index db2c20a7055e..436f66d1b87d 100644
>> --- a/arch/arm/dts/rk3308-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3308-u-boot.dtsi
>> @@ -10,6 +10,22 @@
>>   		mmc0 = &emmc;
>>   		mmc1 = &sdmmc;
>>   	};
>> +
>> +	otp: nvmem@ff210000 {
>> +		compatible = "rockchip,rk3308-otp";
>> +		reg = <0x0 0xff210000 0x0 0x4000>;
>> +		clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
>> +			 <&cru PCLK_OTP_PHY>;
>> +		clock-names = "otp", "apb_pclk", "phy";
>> +		resets = <&cru SRST_OTP_PHY>;
>> +		reset-names = "phy";
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>> +
>> +		cpu_id: id@7 {
>> +			reg = <0x07 0x10>;
>> +		};
>> +	};
> 
> Any plan upstreaming this to the Linux kernel so we can avoid 
> maintaining it in U-Boot?

Yes, I want to get this and some other fixes sent upstream. Will
probably not happen until I have finished up v2 of my other U-Boot
rk3xxx series.

Regards,
Jonas

> 
> It seems supported (the compatible is matched by a driver and there's a 
> DT binding already).
> 
> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
> 
> Cheers,
> Quentin
Kever Yang April 22, 2024, 8:43 a.m. UTC | #3
On 2024/4/9 02:14, Jonas Karlman wrote:
> Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
> memory. The rockchip_otp driver already support the RK3308 variant.
> However, the device tree is missing a node to enable use of OTP.
>
> Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
> driver and enable use of misc_init_r() to set ethaddr based on cpu id.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
> v2: Add clocks and resets props
> ---
>   arch/arm/dts/rk3308-u-boot.dtsi | 16 ++++++++++++++++
>   arch/arm/mach-rockchip/Kconfig  |  3 +++
>   2 files changed, 19 insertions(+)
>
> diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
> index db2c20a7055e..436f66d1b87d 100644
> --- a/arch/arm/dts/rk3308-u-boot.dtsi
> +++ b/arch/arm/dts/rk3308-u-boot.dtsi
> @@ -10,6 +10,22 @@
>   		mmc0 = &emmc;
>   		mmc1 = &sdmmc;
>   	};
> +
> +	otp: nvmem@ff210000 {
> +		compatible = "rockchip,rk3308-otp";
> +		reg = <0x0 0xff210000 0x0 0x4000>;
> +		clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
> +			 <&cru PCLK_OTP_PHY>;
> +		clock-names = "otp", "apb_pclk", "phy";
> +		resets = <&cru SRST_OTP_PHY>;
> +		reset-names = "phy";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +
> +		cpu_id: id@7 {
> +			reg = <0x07 0x10>;
> +		};
> +	};
>   };
>   
>   &cru {
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 71c5945b5742..6e07a70bf4ae 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -163,7 +163,10 @@ config ROCKCHIP_RK3308
>   	imply ARMV8_CRYPTO
>   	imply ARMV8_SET_SMPEN
>   	imply LEGACY_IMAGE_FORMAT
> +	imply MISC
> +	imply MISC_INIT_R
>   	imply ROCKCHIP_COMMON_BOARD
> +	imply ROCKCHIP_OTP
>   	imply SPL_CLK
>   	imply SPL_FIT_SIGNATURE
>   	imply SPL_RAM
diff mbox series

Patch

diff --git a/arch/arm/dts/rk3308-u-boot.dtsi b/arch/arm/dts/rk3308-u-boot.dtsi
index db2c20a7055e..436f66d1b87d 100644
--- a/arch/arm/dts/rk3308-u-boot.dtsi
+++ b/arch/arm/dts/rk3308-u-boot.dtsi
@@ -10,6 +10,22 @@ 
 		mmc0 = &emmc;
 		mmc1 = &sdmmc;
 	};
+
+	otp: nvmem@ff210000 {
+		compatible = "rockchip,rk3308-otp";
+		reg = <0x0 0xff210000 0x0 0x4000>;
+		clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>,
+			 <&cru PCLK_OTP_PHY>;
+		clock-names = "otp", "apb_pclk", "phy";
+		resets = <&cru SRST_OTP_PHY>;
+		reset-names = "phy";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		cpu_id: id@7 {
+			reg = <0x07 0x10>;
+		};
+	};
 };
 
 &cru {
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 71c5945b5742..6e07a70bf4ae 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -163,7 +163,10 @@  config ROCKCHIP_RK3308
 	imply ARMV8_CRYPTO
 	imply ARMV8_SET_SMPEN
 	imply LEGACY_IMAGE_FORMAT
+	imply MISC
+	imply MISC_INIT_R
 	imply ROCKCHIP_COMMON_BOARD
+	imply ROCKCHIP_OTP
 	imply SPL_CLK
 	imply SPL_FIT_SIGNATURE
 	imply SPL_RAM