diff mbox series

[v3,2/3] imx: imx93_evk: add rtc pcf2131

Message ID 20240326033801.228419-3-joy.zou@nxp.com
State Changes Requested
Delegated to: Fabio Estevam
Headers show
Series Add pcf2131 rtc support | expand

Commit Message

Joy Zou March 26, 2024, 3:38 a.m. UTC
support rtc pcf2131 for imx93.

Signed-off-by: Joy Zou <joy.zou@nxp.com>
---
Changes in v3:
1. remove arch/arm/dts/imx93.dtsi modification because this change have existed.

Changes in v2:
1. use the flag bootph-pre-ram instead of uboot,dm-spl.
---
 arch/arm/dts/imx93-11x11-evk-u-boot.dtsi |  8 ++++++++
 arch/arm/dts/imx93-11x11-evk.dts         | 25 ++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

Comments

Fabio Estevam March 26, 2024, 10:13 p.m. UTC | #1
On Tue, Mar 26, 2024 at 12:30 AM Joy Zou <joy.zou@nxp.com> wrote:

> +&lpi2c3 {
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +       clock-frequency = <400000>;
> +       pinctrl-names = "default", "sleep";
> +       pinctrl-0 = <&pinctrl_lpi2c3>;
> +       pinctrl-1 = <&pinctrl_lpi2c3>;
> +       status = "okay";
> +
> +       pcf2131: rtc@53 {
> +               compatible = "nxp,pcf2131";
> +               reg = <0x53>;
> +               interrupt-parent = <&pcal6524>;
> +               interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> +               status = "okay";

Please submit the RTC support to Linux first, then you can sync the
devicetree with Linux in U-Boot.

In the meantime, you can add the RTC support to the -u-boot.dtsi.

Please consider using OF_UPSTREAM available in the U-Boot next branch.
Joy Zou March 27, 2024, 2:43 a.m. UTC | #2
> -----Original Message-----
> From: Fabio Estevam <festevam@gmail.com>
> Sent: 2024年3月27日 6:14
> To: Joy Zou <joy.zou@nxp.com>
> Cc: Peng Fan <peng.fan@nxp.com>; Ye Li <ye.li@nxp.com>; Jacky Bai
> <ping.bai@nxp.com>; sbabic@denx.de; sjg@chromium.org;
> saproj@gmail.com; judge.packham@gmail.com; dl-uboot-imx
> <uboot-imx@nxp.com>; u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v3 2/3] imx: imx93_evk: add rtc pcf2131
> 
> Caution: This is an external email. Please take care when clicking links or
> opening attachments. When in doubt, report the message using the 'Report
> this email' button
> 
> 
> On Tue, Mar 26, 2024 at 12:30 AM Joy Zou <joy.zou@nxp.com> wrote:
> 
> > +&lpi2c3 {
> > +       #address-cells = <1>;
> > +       #size-cells = <0>;
> > +       clock-frequency = <400000>;
> > +       pinctrl-names = "default", "sleep";
> > +       pinctrl-0 = <&pinctrl_lpi2c3>;
> > +       pinctrl-1 = <&pinctrl_lpi2c3>;
> > +       status = "okay";
> > +
> > +       pcf2131: rtc@53 {
> > +               compatible = "nxp,pcf2131";
> > +               reg = <0x53>;
> > +               interrupt-parent = <&pcal6524>;
> > +               interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
> > +               status = "okay";
> 
> Please submit the RTC support to Linux first, then you can sync the devicetree
> with Linux in U-Boot.
> 
> In the meantime, you can add the RTC support to the -u-boot.dtsi.
> 
> Please consider using OF_UPSTREAM available in the U-Boot next branch.

Will submit the RTC support patch to Linux firstly.
Thanks for your comments!
BR
Joy Zou
diff mbox series

Patch

diff --git a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
index a99ba99bfb..2dbe33f073 100644
--- a/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx93-11x11-evk-u-boot.dtsi
@@ -112,6 +112,10 @@ 
 	bootph-some-ram;
 };
 
+&lpi2c3 {
+	bootph-pre-ram;
+};
+
 &{/soc@0/bus@44000000/i2c@44350000/pmic@25} {
 	bootph-pre-ram;
 	bootph-some-ram;
@@ -127,6 +131,10 @@ 
 	bootph-some-ram;
 };
 
+&pinctrl_lpi2c3 {
+	bootph-pre-ram;
+};
+
 &fec {
 	phy-reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <15>;
diff --git a/arch/arm/dts/imx93-11x11-evk.dts b/arch/arm/dts/imx93-11x11-evk.dts
index 4322cc3e11..8b57de3b4c 100644
--- a/arch/arm/dts/imx93-11x11-evk.dts
+++ b/arch/arm/dts/imx93-11x11-evk.dts
@@ -192,6 +192,24 @@ 
 	};
 };
 
+&lpi2c3 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clock-frequency = <400000>;
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&pinctrl_lpi2c3>;
+	pinctrl-1 = <&pinctrl_lpi2c3>;
+	status = "okay";
+
+	pcf2131: rtc@53 {
+		compatible = "nxp,pcf2131";
+		reg = <0x53>;
+		interrupt-parent = <&pcal6524>;
+		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+		status = "okay";
+	};
+};
+
 &lpuart1 { /* console */
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;
@@ -254,6 +272,13 @@ 
 		>;
 	};
 
+	pinctrl_lpi2c3: lpi2c3grp {
+		fsl,pins = <
+			MX93_PAD_GPIO_IO28__LPI2C3_SDA                  0x40000b9e
+			MX93_PAD_GPIO_IO29__LPI2C3_SCL                  0x40000b9e
+			>;
+	};
+
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX93_PAD_ENET2_MDC__ENET1_MDC			0x57e