diff mbox series

arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8

Message ID 20240310165903.69275-1-aford173@gmail.com
State Accepted
Commit 4484c7b3c38dcb21244a882d0b81d141db1ed162
Delegated to: Fabio Estevam
Headers show
Series arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8 | expand

Commit Message

Adam Ford March 10, 2024, 4:59 p.m. UTC
The device tree has evolved over time, so re-sync.  This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver.  However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.

Signed-off-by: Adam Ford <aford173@gmail.com>

Comments

Peng Fan March 11, 2024, 12:32 a.m. UTC | #1
> Subject: [PATCH] arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
> 
> The device tree has evolved over time, so re-sync.  This also partial reverts
> one change on the PCIe, because U-Boot doesn't have a proper driver.
> However, since the clock is configured to generate a 100MHz reference clock
> by default, a proper driver isn't really necessary.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>

Acked-by: Peng Fan <peng.fan@nxp.com>
> 
> diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> index 393fd8ec2e..ed183f83a7 100644
> --- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> @@ -6,6 +6,13 @@
>  #include "imx8mp-u-boot.dtsi"
> 
>  / {
> +	/* U-Boot does not yet have a proper PCIe clk driver */
> +	pcie0_refclk: clock-pcie {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <100000000>;
> +	};
> +
>  	wdt-reboot {
>  		compatible = "wdt-reboot";
>  		wdt = <&wdog1>;
> @@ -13,6 +20,10 @@
>  	};
>  };
> 
> +&pcie_phy {
> +	clocks = <&pcie0_refclk>;
> +};
> +
>  &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
>  	bootph-pre-ram;
>  };
> diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-
> beacon-kit.dts
> index cdae45a48c..a08057410b 100644
> --- a/arch/arm/dts/imx8mp-beacon-kit.dts
> +++ b/arch/arm/dts/imx8mp-beacon-kit.dts
> @@ -23,6 +23,12 @@
>  		stdout-path = &uart2;
>  	};
> 
> +	clk_xtal25: clock-xtal25 {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +		clock-frequency = <25000000>;
> +	};
> +
>  	connector {
>  		compatible = "usb-c-connector";
>  		label = "USB-C";
> @@ -49,6 +55,12 @@
>  		};
>  	};
> 
> +	dmic_codec: dmic-codec {
> +		compatible = "dmic-codec";
> +		num-channels = <1>;
> +		#sound-dai-cells = <0>;
> +	};
> +
>  	gpio-keys {
>  		compatible = "gpio-keys";
>  		autorepeat;
> @@ -82,6 +94,17 @@
>  		};
>  	};
> 
> +	bridge-connector {
> +		compatible = "hdmi-connector";
> +		type = "a";
> +
> +		port {
> +			hdmi_con: endpoint {
> +				remote-endpoint = <&adv7535_out>;
> +			};
> +		};
> +	};
> +
>  	leds {
>  		compatible = "gpio-leds";
>  		pinctrl-names = "default";
> @@ -112,10 +135,13 @@
>  		};
>  	};
> 
> -	pcie0_refclk: clock-pcie {
> -		compatible = "fixed-clock";
> -		#clock-cells = <0>;
> -		clock-frequency = <100000000>;
> +	reg_audio: regulator-wm8962 {
> +		compatible = "regulator-fixed";
> +		regulator-name = "3v3_aud";
> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
>  	};
> 
>  	reg_usdhc2_vmmc: regulator-usdhc2 {
> @@ -137,6 +163,68 @@
>  		gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
>  		enable-active-high;
>  	};
> +
> +	sound-adv7535 {
> +		compatible = "simple-audio-card";
> +		simple-audio-card,name = "sound-adv7535";
> +		simple-audio-card,format = "i2s";
> +
> +		simple-audio-card,cpu {
> +			sound-dai = <&sai5>;
> +			system-clock-direction-out;
> +		};
> +
> +		simple-audio-card,codec {
> +			sound-dai = <&adv_bridge>;
> +		};
> +	};
> +
> +	sound-dmic {
> +		compatible = "simple-audio-card";
> +		simple-audio-card,name = "sound-pdm";
> +		simple-audio-card,format = "i2s";
> +		simple-audio-card,bitclock-master = <&dailink_master>;
> +		simple-audio-card,frame-master = <&dailink_master>;
> +
> +		dailink_master: simple-audio-card,cpu {
> +			sound-dai = <&micfil>;
> +		};
> +
> +		simple-audio-card,codec {
> +			sound-dai = <&dmic_codec>;
> +		};
> +	};
> +
> +	sound-wm8962 {
> +		compatible = "simple-audio-card";
> +		simple-audio-card,name = "wm8962";
> +		simple-audio-card,format = "i2s";
> +		simple-audio-card,widgets = "Headphone", "Headphones",
> +					    "Microphone", "Headset Mic",
> +					    "Speaker", "Speaker";
> +		simple-audio-card,routing = "Headphones", "HPOUTL",
> +					    "Headphones", "HPOUTR",
> +					    "Speaker", "SPKOUTL",
> +					    "Speaker", "SPKOUTR",
> +					    "Headset Mic", "MICBIAS",
> +					    "IN3R", "Headset Mic";
> +
> +		simple-audio-card,cpu {
> +			sound-dai = <&sai3>;
> +		};
> +
> +		simple-audio-card,codec {
> +			sound-dai = <&wm8962>;
> +			clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> +			frame-master;
> +			bitclock-master;
> +		};
> +	};
> +};
> +
> +&audio_blk_ctrl {
> +	assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk
> IMX8MP_AUDIO_PLL2>;
> +	assigned-clock-rates = <393216000>, <135475200>;
>  };
> 
>  &ecspi2 {
> @@ -146,7 +234,7 @@
>  	status = "okay";
> 
>  	tpm: tpm@0 {
> -		compatible = "infineon,slb9670";
> +		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
>  		reg = <0>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&pinctrl_tpm>;
> @@ -211,6 +299,42 @@
>  		interrupt-controller;
>  		#interrupt-cells = <2>;
>  	};
> +
> +	adv_bridge: hdmi@3d {
> +		compatible = "adi,adv7535";
> +		reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
> +		reg-names = "main", "cec", "edid", "packet";
> +		adi,dsi-lanes = <4>;
> +		#sound-dai-cells = <0>;
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +
> +				adv7535_in: endpoint {
> +					remote-endpoint = <&dsi_out>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +
> +				adv7535_out: endpoint {
> +					remote-endpoint = <&hdmi_con>;
> +				};
> +			};
> +		};
> +	};
> +
> +	pcieclk: clock-generator@68 {
> +		compatible = "renesas,9fgv0241";
> +		reg = <0x68>;
> +		clocks = <&clk_xtal25>;
> +		#clock-cells = <1>;
> +	};
>  };
> 
>  &i2c3 {
> @@ -239,6 +363,34 @@
>  	clock-frequency = <384000>;
>  	status = "okay";
> 
> +	wm8962: audio-codec@1a {
> +		compatible = "wlf,wm8962";
> +		reg = <0x1a>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_wm8962>;
> +		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> +		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
> +		assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> +		assigned-clock-rates = <22576000>;
> +		DCVDD-supply = <&reg_audio>;
> +		DBVDD-supply = <&reg_audio>;
> +		AVDD-supply = <&reg_audio>;
> +		CPVDD-supply = <&reg_audio>;
> +		MICVDD-supply = <&reg_audio>;
> +		PLLVDD-supply = <&reg_audio>;
> +		SPKVDD1-supply = <&reg_audio>;
> +		SPKVDD2-supply = <&reg_audio>;
> +		gpio-cfg = <
> +			0x0000 /* 0:Default */
> +			0x0000 /* 1:Default */
> +			0x0000 /* 2:FN_DMICCLK */
> +			0x0000 /* 3:Default */
> +			0x0000 /* 4:FN_DMICCDAT */
> +			0x0000 /* 5:Default */
> +		>;
> +		#sound-dai-cells = <0>;
> +	};
> +
>  	pca6416: gpio@20 {
>  		compatible = "nxp,pcal6416";
>  		reg = <0x20>;
> @@ -301,6 +453,34 @@
>  	};
>  };
> 
> +&lcdif1 {
> +	status = "okay";
> +};
> +
> +&micfil {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_pdm>;
> +	assigned-clocks = <&clk IMX8MP_CLK_PDM>;
> +	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> +	assigned-clock-rates = <49152000>;
> +	status = "okay";
> +};
> +
> +&mipi_dsi {
> +	samsung,esc-clock-frequency = <10000000>;
> +	status = "okay";
> +
> +	ports {
> +		port@1 {
> +			reg = <1>;
> +
> +			dsi_out: endpoint {
> +				remote-endpoint = <&adv7535_in>;
> +			};
> +		};
> +	};
> +};
> +
>  &pcie {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_pcie>;
> @@ -309,12 +489,34 @@
>  };
> 
>  &pcie_phy {
> +	fsl,clkreq-unsupported;
>  	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
> -	clocks = <&pcie0_refclk>;
> +	clocks = <&pcieclk 1>;
>  	clock-names = "ref";
>  	status = "okay";
>  };
> 
> +&sai3 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_sai3>;
> +	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
> +			  <&clk IMX8MP_AUDIO_PLL2> ;
> +	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
> +	assigned-clock-rates = <12288000>, <361267200>;
> +	fsl,sai-mclk-direction-output;
> +	status = "okay";
> +};
> +
> +&sai5 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_sai5>;
> +	assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
> +	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
> +	assigned-clock-rates = <12288000>;
> +	fsl,sai-mclk-direction-output;
> +	status = "okay";
> +};
> +
>  &snvs_pwrkey {
>  	status = "okay";
>  };
> @@ -471,12 +673,37 @@
>  		>;
>  	};
> 
> +	pinctrl_pdm: pdmgrp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK
> 		0xd6
> +
> 	MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00
> 	0xd6
> +		>;
> +	};
> +
>  	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19
> 	0x40
>  		>;
>  	};
> 
> +	pinctrl_sai3: sai3grp {
> +		fsl,pins = <
> +
> 	MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6
> +
> 	MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6
> +
> 	MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00
> 	0xd6
> +
> 	MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00
> 	0xd6
> +
> 	MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6
> +		>;
> +	};
> +
> +	pinctrl_sai5: sai5grp {
> +		fsl,pins = <
> +
> 	MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00
> 	0xd6
> +
> 	MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK	0xd6
> +
> 	MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC	0xd6
> +		>;
> +	};
> +
>  	pinctrl_tpm: tpmgrp {
>  		fsl,pins = <
>  			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00
> 	0x19 /* Reset */
> @@ -547,4 +774,10 @@
>  			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12
> 	0x1c4
>  		>;
>  	};
> +
> +	pinctrl_wm8962: wm8962grp {
> +		fsl,pins = <
> +			MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1
> 	0x59
> +		>;
> +	};
>  };
> diff --git a/arch/arm/dts/imx8mp-beacon-som.dtsi b/arch/arm/dts/imx8mp-
> beacon-som.dtsi
> index e5da908047..8be251b693 100644
> --- a/arch/arm/dts/imx8mp-beacon-som.dtsi
> +++ b/arch/arm/dts/imx8mp-beacon-som.dtsi
> @@ -50,6 +50,8 @@
>  	phy-mode = "rgmii-id";
>  	phy-handle = <&ethphy0>;
>  	snps,force_thresh_dma_mode;
> +	snps,mtl-rx-config = <&mtl_rx_setup>;
> +	snps,mtl-tx-config = <&mtl_tx_setup>;
>  	status = "okay";
> 
>  	mdio {
> @@ -66,6 +68,71 @@
>  			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
>  		};
>  	};
> +
> +	mtl_rx_setup: rx-queues-config {
> +		snps,rx-queues-to-use = <5>;
> +		snps,rx-sched-sp;
> +
> +		queue0 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x1>;
> +			snps,map-to-dma-channel = <0>;
> +		};
> +
> +		queue1 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x2>;
> +			snps,map-to-dma-channel = <1>;
> +		};
> +
> +		queue2 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x4>;
> +			snps,map-to-dma-channel = <2>;
> +		};
> +
> +		queue3 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x8>;
> +			snps,map-to-dma-channel = <3>;
> +		};
> +
> +		queue4 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0xf0>;
> +			snps,map-to-dma-channel = <4>;
> +		};
> +	};
> +
> +	mtl_tx_setup: tx-queues-config {
> +		snps,tx-queues-to-use = <5>;
> +		snps,tx-sched-sp;
> +
> +		queue0 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x1>;
> +		};
> +
> +		queue1 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x2>;
> +		};
> +
> +		queue2 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x4>;
> +		};
> +
> +		queue3 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0x8>;
> +		};
> +
> +		queue4 {
> +			snps,dcb-algorithm;
> +			snps,priority = <0xf0>;
> +		};
> +	};
>  };
> 
>  &flexspi {
> @@ -206,6 +273,10 @@
>  	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
>  	uart-has-rtscts;
>  	status = "okay";
> +
> +	bluetooth {
> +		compatible = "nxp,88w8997-bt";
> +	};
>  };
> 
>  &usdhc1 {
> --
> 2.43.0
Fabio Estevam March 11, 2024, 1:09 p.m. UTC | #2
On Sun, Mar 10, 2024 at 1:59 PM Adam Ford <aford173@gmail.com> wrote:
>
> The device tree has evolved over time, so re-sync.  This also
> partial reverts one change on the PCIe, because U-Boot doesn't
> have a proper driver.  However, since the clock is configured
> to generate a 100MHz reference clock by default, a proper driver
> isn't really necessary.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
index 393fd8ec2e..ed183f83a7 100644
--- a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -6,6 +6,13 @@ 
 #include "imx8mp-u-boot.dtsi"
 
 / {
+	/* U-Boot does not yet have a proper PCIe clk driver */
+	pcie0_refclk: clock-pcie {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <100000000>;
+	};
+
 	wdt-reboot {
 		compatible = "wdt-reboot";
 		wdt = <&wdog1>;
@@ -13,6 +20,10 @@ 
 	};
 };
 
+&pcie_phy {
+	clocks = <&pcie0_refclk>;
+};
+
 &{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
 	bootph-pre-ram;
 };
diff --git a/arch/arm/dts/imx8mp-beacon-kit.dts b/arch/arm/dts/imx8mp-beacon-kit.dts
index cdae45a48c..a08057410b 100644
--- a/arch/arm/dts/imx8mp-beacon-kit.dts
+++ b/arch/arm/dts/imx8mp-beacon-kit.dts
@@ -23,6 +23,12 @@ 
 		stdout-path = &uart2;
 	};
 
+	clk_xtal25: clock-xtal25 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <25000000>;
+	};
+
 	connector {
 		compatible = "usb-c-connector";
 		label = "USB-C";
@@ -49,6 +55,12 @@ 
 		};
 	};
 
+	dmic_codec: dmic-codec {
+		compatible = "dmic-codec";
+		num-channels = <1>;
+		#sound-dai-cells = <0>;
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 		autorepeat;
@@ -82,6 +94,17 @@ 
 		};
 	};
 
+	bridge-connector {
+		compatible = "hdmi-connector";
+		type = "a";
+
+		port {
+			hdmi_con: endpoint {
+				remote-endpoint = <&adv7535_out>;
+			};
+		};
+	};
+
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
@@ -112,10 +135,13 @@ 
 		};
 	};
 
-	pcie0_refclk: clock-pcie {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <100000000>;
+	reg_audio: regulator-wm8962 {
+		compatible = "regulator-fixed";
+		regulator-name = "3v3_aud";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
 	};
 
 	reg_usdhc2_vmmc: regulator-usdhc2 {
@@ -137,6 +163,68 @@ 
 		gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
+
+	sound-adv7535 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "sound-adv7535";
+		simple-audio-card,format = "i2s";
+
+		simple-audio-card,cpu {
+			sound-dai = <&sai5>;
+			system-clock-direction-out;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&adv_bridge>;
+		};
+	};
+
+	sound-dmic {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "sound-pdm";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,bitclock-master = <&dailink_master>;
+		simple-audio-card,frame-master = <&dailink_master>;
+
+		dailink_master: simple-audio-card,cpu {
+			sound-dai = <&micfil>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&dmic_codec>;
+		};
+	};
+
+	sound-wm8962 {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "wm8962";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,widgets = "Headphone", "Headphones",
+					    "Microphone", "Headset Mic",
+					    "Speaker", "Speaker";
+		simple-audio-card,routing = "Headphones", "HPOUTL",
+					    "Headphones", "HPOUTR",
+					    "Speaker", "SPKOUTL",
+					    "Speaker", "SPKOUTR",
+					    "Headset Mic", "MICBIAS",
+					    "IN3R", "Headset Mic";
+
+		simple-audio-card,cpu {
+			sound-dai = <&sai3>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&wm8962>;
+			clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
+			frame-master;
+			bitclock-master;
+		};
+	};
+};
+
+&audio_blk_ctrl {
+	assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
+	assigned-clock-rates = <393216000>, <135475200>;
 };
 
 &ecspi2 {
@@ -146,7 +234,7 @@ 
 	status = "okay";
 
 	tpm: tpm@0 {
-		compatible = "infineon,slb9670";
+		compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
 		reg = <0>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_tpm>;
@@ -211,6 +299,42 @@ 
 		interrupt-controller;
 		#interrupt-cells = <2>;
 	};
+
+	adv_bridge: hdmi@3d {
+		compatible = "adi,adv7535";
+		reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
+		reg-names = "main", "cec", "edid", "packet";
+		adi,dsi-lanes = <4>;
+		#sound-dai-cells = <0>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+
+				adv7535_in: endpoint {
+					remote-endpoint = <&dsi_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+
+				adv7535_out: endpoint {
+					remote-endpoint = <&hdmi_con>;
+				};
+			};
+		};
+	};
+
+	pcieclk: clock-generator@68 {
+		compatible = "renesas,9fgv0241";
+		reg = <0x68>;
+		clocks = <&clk_xtal25>;
+		#clock-cells = <1>;
+	};
 };
 
 &i2c3 {
@@ -239,6 +363,34 @@ 
 	clock-frequency = <384000>;
 	status = "okay";
 
+	wm8962: audio-codec@1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_wm8962>;
+		clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
+		assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
+		assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
+		assigned-clock-rates = <22576000>;
+		DCVDD-supply = <&reg_audio>;
+		DBVDD-supply = <&reg_audio>;
+		AVDD-supply = <&reg_audio>;
+		CPVDD-supply = <&reg_audio>;
+		MICVDD-supply = <&reg_audio>;
+		PLLVDD-supply = <&reg_audio>;
+		SPKVDD1-supply = <&reg_audio>;
+		SPKVDD2-supply = <&reg_audio>;
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0000 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x0000 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+		#sound-dai-cells = <0>;
+	};
+
 	pca6416: gpio@20 {
 		compatible = "nxp,pcal6416";
 		reg = <0x20>;
@@ -301,6 +453,34 @@ 
 	};
 };
 
+&lcdif1 {
+	status = "okay";
+};
+
+&micfil {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pdm>;
+	assigned-clocks = <&clk IMX8MP_CLK_PDM>;
+	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+	assigned-clock-rates = <49152000>;
+	status = "okay";
+};
+
+&mipi_dsi {
+	samsung,esc-clock-frequency = <10000000>;
+	status = "okay";
+
+	ports {
+		port@1 {
+			reg = <1>;
+
+			dsi_out: endpoint {
+				remote-endpoint = <&adv7535_in>;
+			};
+		};
+	};
+};
+
 &pcie {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pcie>;
@@ -309,12 +489,34 @@ 
 };
 
 &pcie_phy {
+	fsl,clkreq-unsupported;
 	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
-	clocks = <&pcie0_refclk>;
+	clocks = <&pcieclk 1>;
 	clock-names = "ref";
 	status = "okay";
 };
 
+&sai3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai3>;
+	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
+			  <&clk IMX8MP_AUDIO_PLL2> ;
+	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
+	assigned-clock-rates = <12288000>, <361267200>;
+	fsl,sai-mclk-direction-output;
+	status = "okay";
+};
+
+&sai5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai5>;
+	assigned-clocks = <&clk IMX8MP_CLK_SAI5>;
+	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+	assigned-clock-rates = <12288000>;
+	fsl,sai-mclk-direction-output;
+	status = "okay";
+};
+
 &snvs_pwrkey {
 	status = "okay";
 };
@@ -471,12 +673,37 @@ 
 		>;
 	};
 
+	pinctrl_pdm: pdmgrp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK		0xd6
+			MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00	0xd6
+		>;
+	};
+
 	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19	0x40
 		>;
 	};
 
+	pinctrl_sai3: sai3grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC	0xd6
+			MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK	0xd6
+			MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00	0xd6
+			MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00	0xd6
+			MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK	0xd6
+		>;
+	};
+
+	pinctrl_sai5: sai5grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_SAI5_RXD3__AUDIOMIX_SAI5_TX_DATA00	0xd6
+			MX8MP_IOMUXC_SAI5_RXD2__AUDIOMIX_SAI5_TX_BCLK	0xd6
+			MX8MP_IOMUXC_SAI5_RXD1__AUDIOMIX_SAI5_TX_SYNC	0xd6
+		>;
+	};
+
 	pinctrl_tpm: tpmgrp {
 		fsl,pins = <
 			MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00	0x19 /* Reset */
@@ -547,4 +774,10 @@ 
 			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12	0x1c4
 		>;
 	};
+
+	pinctrl_wm8962: wm8962grp {
+		fsl,pins = <
+			MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1	0x59
+		>;
+	};
 };
diff --git a/arch/arm/dts/imx8mp-beacon-som.dtsi b/arch/arm/dts/imx8mp-beacon-som.dtsi
index e5da908047..8be251b693 100644
--- a/arch/arm/dts/imx8mp-beacon-som.dtsi
+++ b/arch/arm/dts/imx8mp-beacon-som.dtsi
@@ -50,6 +50,8 @@ 
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
 	snps,force_thresh_dma_mode;
+	snps,mtl-rx-config = <&mtl_rx_setup>;
+	snps,mtl-tx-config = <&mtl_tx_setup>;
 	status = "okay";
 
 	mdio {
@@ -66,6 +68,71 @@ 
 			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
 		};
 	};
+
+	mtl_rx_setup: rx-queues-config {
+		snps,rx-queues-to-use = <5>;
+		snps,rx-sched-sp;
+
+		queue0 {
+			snps,dcb-algorithm;
+			snps,priority = <0x1>;
+			snps,map-to-dma-channel = <0>;
+		};
+
+		queue1 {
+			snps,dcb-algorithm;
+			snps,priority = <0x2>;
+			snps,map-to-dma-channel = <1>;
+		};
+
+		queue2 {
+			snps,dcb-algorithm;
+			snps,priority = <0x4>;
+			snps,map-to-dma-channel = <2>;
+		};
+
+		queue3 {
+			snps,dcb-algorithm;
+			snps,priority = <0x8>;
+			snps,map-to-dma-channel = <3>;
+		};
+
+		queue4 {
+			snps,dcb-algorithm;
+			snps,priority = <0xf0>;
+			snps,map-to-dma-channel = <4>;
+		};
+	};
+
+	mtl_tx_setup: tx-queues-config {
+		snps,tx-queues-to-use = <5>;
+		snps,tx-sched-sp;
+
+		queue0 {
+			snps,dcb-algorithm;
+			snps,priority = <0x1>;
+		};
+
+		queue1 {
+			snps,dcb-algorithm;
+			snps,priority = <0x2>;
+		};
+
+		queue2 {
+			snps,dcb-algorithm;
+			snps,priority = <0x4>;
+		};
+
+		queue3 {
+			snps,dcb-algorithm;
+			snps,priority = <0x8>;
+		};
+
+		queue4 {
+			snps,dcb-algorithm;
+			snps,priority = <0xf0>;
+		};
+	};
 };
 
 &flexspi {
@@ -206,6 +273,10 @@ 
 	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
 	uart-has-rtscts;
 	status = "okay";
+
+	bluetooth {
+		compatible = "nxp,88w8997-bt";
+	};
 };
 
 &usdhc1 {