Message ID | 20240308171251.106144-2-barnas@google.com |
---|---|
State | Superseded |
Delegated to: | TIEN FONG CHEE |
Headers | show |
Series | arm: socfpga: arria10: allow to reprogram FPGA with warm reboot | expand |
On 3/8/24 6:12 PM, Michał Barnaś wrote: > Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10. > This option allows to change the bitstream on the filesystem and apply > changes with warm reboot without the need for a power cycle. > > Signed-off-by: Michał Barnaś <barnas@google.com> > --- > > Changes in v2: > - Rebase on current master branch > > arch/arm/mach-socfpga/Kconfig | 8 ++++++++ > arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++ > 2 files changed, 16 insertions(+) > > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig > index 114d243812..89303f1f16 100644 > --- a/arch/arm/mach-socfpga/Kconfig > +++ b/arch/arm/mach-socfpga/Kconfig > @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10 > imply FPGA_SOCFPGA > imply SPL_USE_TINY_PRINTF > > +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM This is not TARGET (as in SoC), but a regular config option, so please drop the TARGET_ prefix . > + bool "Always reprogram Arria 10 FPGA" > + depends on TARGET_SOCFPGA_ARRIA10 > + help > + Arria 10 FPGA is only programmed during the cold boot. > + This option forces the FPGA to be reprogrammed every reboot, > + allowing to change the bitstream and apply it with warm reboot. > + > config TARGET_SOCFPGA_CYCLONE5 > bool > select TARGET_SOCFPGA_GEN5 > diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c > index 9edbbf4a29..d5d3327a42 100644 > --- a/arch/arm/mach-socfpga/spl_a10.c > +++ b/arch/arm/mach-socfpga/spl_a10.c > @@ -122,7 +122,11 @@ void spl_board_init(void) > arch_early_init_r(); > > /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ > +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM > + if (is_regular_boot_valid()) { > +#else > if (is_fpgamgr_user_mode()) { > +#endif Use CONFIG_IS_ENABLED() or IS_ENABLED() macro please .
On Fri, Mar 8, 2024 at 8:01 PM Marek Vasut <marex@denx.de> wrote: > > On 3/8/24 6:12 PM, Michał Barnaś wrote: > > Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10. > > This option allows to change the bitstream on the filesystem and apply > > changes with warm reboot without the need for a power cycle. > > > > Signed-off-by: Michał Barnaś <barnas@google.com> > > --- > > > > Changes in v2: > > - Rebase on current master branch > > > > arch/arm/mach-socfpga/Kconfig | 8 ++++++++ > > arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++ > > 2 files changed, 16 insertions(+) > > > > diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig > > index 114d243812..89303f1f16 100644 > > --- a/arch/arm/mach-socfpga/Kconfig > > +++ b/arch/arm/mach-socfpga/Kconfig > > @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10 > > imply FPGA_SOCFPGA > > imply SPL_USE_TINY_PRINTF > > > > +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM > > This is not TARGET (as in SoC), but a regular config option, so please > drop the TARGET_ prefix . > > > + bool "Always reprogram Arria 10 FPGA" > > + depends on TARGET_SOCFPGA_ARRIA10 > > + help > > + Arria 10 FPGA is only programmed during the cold boot. > > + This option forces the FPGA to be reprogrammed every reboot, > > + allowing to change the bitstream and apply it with warm reboot. > > + > > config TARGET_SOCFPGA_CYCLONE5 > > bool > > select TARGET_SOCFPGA_GEN5 > > diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c > > index 9edbbf4a29..d5d3327a42 100644 > > --- a/arch/arm/mach-socfpga/spl_a10.c > > +++ b/arch/arm/mach-socfpga/spl_a10.c > > @@ -122,7 +122,11 @@ void spl_board_init(void) > > arch_early_init_r(); > > > > /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ > > +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM > > + if (is_regular_boot_valid()) { > > +#else > > if (is_fpgamgr_user_mode()) { > > +#endif > > Use CONFIG_IS_ENABLED() or IS_ENABLED() macro please . I used the ifdefs because I thought that it would be more readable, but changed as you requested. Thank you for your response.
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 114d243812..89303f1f16 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -80,6 +80,14 @@ config TARGET_SOCFPGA_ARRIA10 imply FPGA_SOCFPGA imply SPL_USE_TINY_PRINTF +config TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM + bool "Always reprogram Arria 10 FPGA" + depends on TARGET_SOCFPGA_ARRIA10 + help + Arria 10 FPGA is only programmed during the cold boot. + This option forces the FPGA to be reprogrammed every reboot, + allowing to change the bitstream and apply it with warm reboot. + config TARGET_SOCFPGA_CYCLONE5 bool select TARGET_SOCFPGA_GEN5 diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c index 9edbbf4a29..d5d3327a42 100644 --- a/arch/arm/mach-socfpga/spl_a10.c +++ b/arch/arm/mach-socfpga/spl_a10.c @@ -122,7 +122,11 @@ void spl_board_init(void) arch_early_init_r(); /* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */ +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM + if (is_regular_boot_valid()) { +#else if (is_fpgamgr_user_mode()) { +#endif ret = config_pins(gd->fdt_blob, "shared"); if (ret) return; @@ -130,7 +134,11 @@ void spl_board_init(void) ret = config_pins(gd->fdt_blob, "fpga"); if (ret) return; +#ifdef CONFIG_TARGET_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM + } else { +#else } else if (!is_fpgamgr_early_user_mode()) { +#endif /* Program IOSSM(early IO release) or full FPGA */ fpgamgr_program(buf, FPGA_BUFSIZ, 0);
Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10. This option allows to change the bitstream on the filesystem and apply changes with warm reboot without the need for a power cycle. Signed-off-by: Michał Barnaś <barnas@google.com> --- Changes in v2: - Rebase on current master branch arch/arm/mach-socfpga/Kconfig | 8 ++++++++ arch/arm/mach-socfpga/spl_a10.c | 8 ++++++++ 2 files changed, 16 insertions(+)