| Message ID | 20240222145203.2659671-1-thomas.perrot@bootlin.com |
|---|---|
| State | Accepted |
| Commit | 7480282eca70c737d123b076a80395dd3bdd9818 |
| Delegated to: | Andes |
| Headers | show |
| Series | riscv: sifive: fu740: reduce DDR speed from 1866MT/s to 1600MT/s | expand |
On Thu, Feb 22, 2024 at 03:52:03PM +0100, thomas.perrot@bootlin.com wrote: > From: Thomas Perrot <thomas.perrot@bootlin.com> > > It appears that there is some timing marginality either in the > board layout or the SoC that results in occasional data corruption > on some boards. > We observed this issue on some of the new HiFive Unmatched RevB > boards during volume production as well as some of the original > HiFive Unmatched boards from 2021 in our possession. This means > that there are other boards out there that might have the issue > too. > > We have done some limited testing with DDR4 at 1600MT/s and > faulty boards (failing at 1866MT/s) passed. > We plan further testing after we procure a temperature chamber. > > Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com> > --- > arch/riscv/dts/fu740-c000-u-boot.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi index 706224b384d2..956237c3218e 100644 --- a/arch/riscv/dts/fu740-c000-u-boot.dtsi +++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi @@ -77,7 +77,7 @@ 0x0 0x100b2000 0x0 0x2000 0x0 0x100b8000 0x0 0x1000>; clocks = <&prci FU740_PRCI_CLK_DDRPLL>; - clock-frequency = <933333324>; + clock-frequency = <800000004>; bootph-pre-ram; }; };