diff mbox series

[11/11] rockchip: google: gru: Migrate to use IO-domain driver

Message ID 20240217183610.2621132-12-jonas@kwiboo.se
State Superseded
Delegated to: Kever Yang
Headers show
Series rockchip: rk3399: Migrate to use IO-domain driver | expand

Commit Message

Jonas Karlman Feb. 17, 2024, 6:35 p.m. UTC
Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
This should be runtime tested by someone with a gru device. All DT props
and driver seem to be enabled and I expect the io_vsel and soc_con0 to
be configured with correct value.
---
 board/google/gru/gru.c             | 35 ------------------------------
 configs/chromebook_bob_defconfig   |  1 +
 configs/chromebook_kevin_defconfig |  1 +
 3 files changed, 2 insertions(+), 35 deletions(-)

Comments

Kever Yang March 11, 2024, 9:39 a.m. UTC | #1
On 2024/2/18 02:35, Jonas Karlman wrote:
> Switch to use the IO-domain driver to configure IO-domain based on
> device tree instead of a setup_iodomain() function.
>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
> This should be runtime tested by someone with a gru device. All DT props
> and driver seem to be enabled and I expect the io_vsel and soc_con0 to
> be configured with correct value.
> ---
>   board/google/gru/gru.c             | 35 ------------------------------
>   configs/chromebook_bob_defconfig   |  1 +
>   configs/chromebook_kevin_defconfig |  1 +
>   3 files changed, 2 insertions(+), 35 deletions(-)
>
> diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
> index 9cb3a5252047..e08cb42c27ed 100644
> --- a/board/google/gru/gru.c
> +++ b/board/google/gru/gru.c
> @@ -3,18 +3,9 @@
>    * Copyright 2018 Google
>    */
>   
> -#include <common.h>
>   #include <dm.h>
>   #include <init.h>
> -#include <syscon.h>
>   #include <asm/arch-rockchip/clock.h>
> -#include <asm/arch-rockchip/grf_rk3399.h>
> -#include <asm/arch-rockchip/hardware.h>
> -
> -#define GRF_IO_VSEL_BT656_SHIFT 0
> -#define GRF_IO_VSEL_AUDIO_SHIFT 1
> -#define PMUGRF_CON0_VSEL_SHIFT 8
> -#define PMUGRF_CON0_VOL_SHIFT 9
>   
>   #ifdef CONFIG_SPL_BUILD
>   /* provided to defeat compiler optimisation in board_init_f() */
> @@ -63,29 +54,3 @@ int board_early_init_r(void)
>   	return 0;
>   }
>   #endif
> -
> -static void setup_iodomain(void)
> -{
> -	struct rk3399_grf_regs *grf =
> -	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> -	struct rk3399_pmugrf_regs *pmugrf =
> -	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
> -
> -	/* BT656 and audio is in 1.8v domain */
> -	rk_setreg(&grf->io_vsel, (1 << GRF_IO_VSEL_BT656_SHIFT |
> -				  1 << GRF_IO_VSEL_AUDIO_SHIFT));
> -
> -	/*
> -	 * Set GPIO1 1.8v/3.0v source select to PMU1830_VOL
> -	 * and explicitly configure that PMU1830_VOL to be 1.8V
> -	 */
> -	rk_setreg(&pmugrf->soc_con0, (1 << PMUGRF_CON0_VSEL_SHIFT |
> -				      1 << PMUGRF_CON0_VOL_SHIFT));
> -}
> -
> -int rockchip_early_misc_init_r(void)
> -{
> -	setup_iodomain();
> -
> -	return 0;
> -}
> diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
> index 28697b174a05..9e13b3544d05 100644
> --- a/configs/chromebook_bob_defconfig
> +++ b/configs/chromebook_bob_defconfig
> @@ -66,6 +66,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
>   CONFIG_SYS_I2C_ROCKCHIP=y
>   CONFIG_I2C_MUX=y
>   CONFIG_CROS_EC_KEYB=y
> +CONFIG_ROCKCHIP_IODOMAIN=y
>   CONFIG_CROS_EC=y
>   CONFIG_CROS_EC_SPI=y
>   CONFIG_PWRSEQ=y
> diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
> index aab938014e38..e1e80447de3c 100644
> --- a/configs/chromebook_kevin_defconfig
> +++ b/configs/chromebook_kevin_defconfig
> @@ -67,6 +67,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
>   CONFIG_SYS_I2C_ROCKCHIP=y
>   CONFIG_I2C_MUX=y
>   CONFIG_CROS_EC_KEYB=y
> +CONFIG_ROCKCHIP_IODOMAIN=y
>   CONFIG_CROS_EC=y
>   CONFIG_CROS_EC_SPI=y
>   CONFIG_PWRSEQ=y
diff mbox series

Patch

diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index 9cb3a5252047..e08cb42c27ed 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -3,18 +3,9 @@ 
  * Copyright 2018 Google
  */
 
-#include <common.h>
 #include <dm.h>
 #include <init.h>
-#include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
-#include <asm/arch-rockchip/hardware.h>
-
-#define GRF_IO_VSEL_BT656_SHIFT 0
-#define GRF_IO_VSEL_AUDIO_SHIFT 1
-#define PMUGRF_CON0_VSEL_SHIFT 8
-#define PMUGRF_CON0_VOL_SHIFT 9
 
 #ifdef CONFIG_SPL_BUILD
 /* provided to defeat compiler optimisation in board_init_f() */
@@ -63,29 +54,3 @@  int board_early_init_r(void)
 	return 0;
 }
 #endif
-
-static void setup_iodomain(void)
-{
-	struct rk3399_grf_regs *grf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-	struct rk3399_pmugrf_regs *pmugrf =
-	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-	/* BT656 and audio is in 1.8v domain */
-	rk_setreg(&grf->io_vsel, (1 << GRF_IO_VSEL_BT656_SHIFT |
-				  1 << GRF_IO_VSEL_AUDIO_SHIFT));
-
-	/*
-	 * Set GPIO1 1.8v/3.0v source select to PMU1830_VOL
-	 * and explicitly configure that PMU1830_VOL to be 1.8V
-	 */
-	rk_setreg(&pmugrf->soc_con0, (1 << PMUGRF_CON0_VSEL_SHIFT |
-				      1 << PMUGRF_CON0_VOL_SHIFT));
-}
-
-int rockchip_early_misc_init_r(void)
-{
-	setup_iodomain();
-
-	return 0;
-}
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 28697b174a05..9e13b3544d05 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -66,6 +66,7 @@  CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_I2C_MUX=y
 CONFIG_CROS_EC_KEYB=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig
index aab938014e38..e1e80447de3c 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -67,6 +67,7 @@  CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_I2C_MUX=y
 CONFIG_CROS_EC_KEYB=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y