| Message ID | 20231010085155.31027-2-zhangqing@rock-chips.com |
|---|---|
| State | Superseded |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | clk : rockchip: update rk3568 and rk3588 clk driver | expand |
Hi Elaine, On 2023-10-10 10:51, Elaine Zhang wrote: > Resync from kernel-4.19: > (a6cf6aca12c0 drivers: rkflash: Ajudst the dll strategy) bindings should be synced from mainline linux, not vendor kernel. > > Change-Id: I7b7134946b76dbd8963cfaafdc5b56750622855e > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> > --- > include/dt-bindings/clock/rk3568-cru.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h > index c1942422a438..251445cf7632 100644 > --- a/include/dt-bindings/clock/rk3568-cru.h > +++ b/include/dt-bindings/clock/rk3568-cru.h > @@ -478,6 +478,13 @@ > #define CPLL_50M 415 > #define CPLL_25M 416 > #define CPLL_100M 417 > +#define SCLK_DDRCLK 418 This is the only missing clock that is defined in mainline linux. > +#define I2S1_MCLKOUT 419 > +#define I2S3_MCLKOUT 420 > +#define I2S1_MCLK_RX_IOE 421 > +#define I2S1_MCLK_TX_IOE 422 > +#define I2S2_MCLK_IOE 423 > +#define I2S3_MCLK_IOE 424 These are missing in mainline linux, please upstream to linux. Regards, Jonas > > #define PCLK_CORE_PVTM 450 >
> From: Elaine Zhang <zhangqing@rock-chips.com> > Date: Tue, 10 Oct 2023 16:51:49 +0800 > > Resync from kernel-4.19: > (a6cf6aca12c0 drivers: rkflash: Ajudst the dll strategy) Linux 4.19 is ancient; why are you not synching from 6.5 or a 6.6 release candidate? > Change-Id: I7b7134946b76dbd8963cfaafdc5b56750622855e > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> > --- > include/dt-bindings/clock/rk3568-cru.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h > index c1942422a438..251445cf7632 100644 > --- a/include/dt-bindings/clock/rk3568-cru.h > +++ b/include/dt-bindings/clock/rk3568-cru.h > @@ -478,6 +478,13 @@ > #define CPLL_50M 415 > #define CPLL_25M 416 > #define CPLL_100M 417 > +#define SCLK_DDRCLK 418 > +#define I2S1_MCLKOUT 419 > +#define I2S3_MCLKOUT 420 > +#define I2S1_MCLK_RX_IOE 421 > +#define I2S1_MCLK_TX_IOE 422 > +#define I2S2_MCLK_IOE 423 > +#define I2S3_MCLK_IOE 424 > > #define PCLK_CORE_PVTM 450 > > -- > 2.17.1 > >
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h index c1942422a438..251445cf7632 100644 --- a/include/dt-bindings/clock/rk3568-cru.h +++ b/include/dt-bindings/clock/rk3568-cru.h @@ -478,6 +478,13 @@ #define CPLL_50M 415 #define CPLL_25M 416 #define CPLL_100M 417 +#define SCLK_DDRCLK 418 +#define I2S1_MCLKOUT 419 +#define I2S3_MCLKOUT 420 +#define I2S1_MCLK_RX_IOE 421 +#define I2S1_MCLK_TX_IOE 422 +#define I2S2_MCLK_IOE 423 +#define I2S3_MCLK_IOE 424 #define PCLK_CORE_PVTM 450
Resync from kernel-4.19: (a6cf6aca12c0 drivers: rkflash: Ajudst the dll strategy) Change-Id: I7b7134946b76dbd8963cfaafdc5b56750622855e Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> --- include/dt-bindings/clock/rk3568-cru.h | 7 +++++++ 1 file changed, 7 insertions(+)