| Message ID | 20221012163458.1968900-6-andre.przywara@arm.com |
|---|---|
| State | Superseded |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | sunxi: improve F1C200s support | expand |
Hi Andre, Dne sreda, 12. oktober 2022 ob 18:34:57 CEST je Andre Przywara napisal(a): > The F1Cx00 SoCs connect the first PortA pins to UART1. > > Add this to the SoC .dtsi, so boards can reference UART1 pins. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > --- > arch/arm/dts/suniv-f1c100s.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/dts/suniv-f1c100s.dtsi > b/arch/arm/dts/suniv-f1c100s.dtsi index 0edc1724407..bc563c12e95 100644 > --- a/arch/arm/dts/suniv-f1c100s.dtsi > +++ b/arch/arm/dts/suniv-f1c100s.dtsi > @@ -175,6 +175,11 @@ > pins = "PE0", "PE1"; > function = "uart0"; > }; > + > + uart1_pa_pins: uart1-pa-pins { > + pins = "PA2", "PA3"; > + function = "uart1"; > + }; > }; > > timer@1c20c00 { > -- > 2.25.1
diff --git a/arch/arm/dts/suniv-f1c100s.dtsi b/arch/arm/dts/suniv-f1c100s.dtsi index 0edc1724407..bc563c12e95 100644 --- a/arch/arm/dts/suniv-f1c100s.dtsi +++ b/arch/arm/dts/suniv-f1c100s.dtsi @@ -175,6 +175,11 @@ pins = "PE0", "PE1"; function = "uart0"; }; + + uart1_pa_pins: uart1-pa-pins { + pins = "PA2", "PA3"; + function = "uart1"; + }; }; timer@1c20c00 {
The F1Cx00 SoCs connect the first PortA pins to UART1. Add this to the SoC .dtsi, so boards can reference UART1 pins. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/dts/suniv-f1c100s.dtsi | 5 +++++ 1 file changed, 5 insertions(+)