| Message ID | 20220509052937.42283-6-samuel@sholland.org |
|---|---|
| State | Accepted |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | clk: sunxi: Out-of-bounds access fix and driver cleanup | expand |
On Mon, 9 May 2022 00:29:35 -0500 Samuel Holland <samuel@sholland.org> wrote: > All of the driver private data should really be platform data since it > is determined statically (selected by the compatible string or extracted > from the devicetree). Move everything to platform data, so it can be > provided when binding the driver. This is useful for SPL, or for > instantiating the driver as part of an MFD. Indeed, nothing in struct ccu_priv is private to the instance (of where there is really only one anyway). Confirmed to be mostly s/priv/plat/, the rest looks fine as well. Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > drivers/clk/sunxi/clk_sunxi.c | 41 ++++++++++++++++++++--------------- > include/clk/sunxi.h | 4 ++-- > 2 files changed, 26 insertions(+), 19 deletions(-) > > diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c > index 7d9e6029ff..cadfca767b 100644 > --- a/drivers/clk/sunxi/clk_sunxi.c > +++ b/drivers/clk/sunxi/clk_sunxi.c > @@ -15,19 +15,19 @@ > #include <linux/bitops.h> > #include <linux/log2.h> > > -static const struct ccu_clk_gate *priv_to_gate(struct ccu_priv *priv, > +static const struct ccu_clk_gate *plat_to_gate(struct ccu_plat *plat, > unsigned long id) > { > - if (id >= priv->desc->num_gates) > + if (id >= plat->desc->num_gates) > return NULL; > > - return &priv->desc->gates[id]; > + return &plat->desc->gates[id]; > } > > static int sunxi_set_gate(struct clk *clk, bool on) > { > - struct ccu_priv *priv = dev_get_priv(clk->dev); > - const struct ccu_clk_gate *gate = priv_to_gate(priv, clk->id); > + struct ccu_plat *plat = dev_get_plat(clk->dev); > + const struct ccu_clk_gate *gate = plat_to_gate(plat, clk->id); > u32 reg; > > if (!gate || !(gate->flags & CCU_CLK_F_IS_VALID)) { > @@ -38,13 +38,13 @@ static int sunxi_set_gate(struct clk *clk, bool on) > debug("%s: (CLK#%ld) off#0x%x, BIT(%d)\n", __func__, > clk->id, gate->off, ilog2(gate->bit)); > > - reg = readl(priv->base + gate->off); > + reg = readl(plat->base + gate->off); > if (on) > reg |= gate->bit; > else > reg &= ~gate->bit; > > - writel(reg, priv->base + gate->off); > + writel(reg, plat->base + gate->off); > > return 0; > } > @@ -71,19 +71,10 @@ static int sunxi_clk_bind(struct udevice *dev) > > static int sunxi_clk_probe(struct udevice *dev) > { > - struct ccu_priv *priv = dev_get_priv(dev); > struct clk_bulk clk_bulk; > struct reset_ctl_bulk rst_bulk; > int ret; > > - priv->base = dev_read_addr_ptr(dev); > - if (!priv->base) > - return -ENOMEM; > - > - priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); > - if (!priv->desc) > - return -EINVAL; > - > ret = clk_get_bulk(dev, &clk_bulk); > if (!ret) > clk_enable_bulk(&clk_bulk); > @@ -95,6 +86,21 @@ static int sunxi_clk_probe(struct udevice *dev) > return 0; > } > > +static int sunxi_clk_of_to_plat(struct udevice *dev) > +{ > + struct ccu_plat *plat = dev_get_plat(dev); > + > + plat->base = dev_read_addr_ptr(dev); > + if (!plat->base) > + return -ENOMEM; > + > + plat->desc = (const struct ccu_desc *)dev_get_driver_data(dev); > + if (!plat->desc) > + return -EINVAL; > + > + return 0; > +} > + > extern const struct ccu_desc a10_ccu_desc; > extern const struct ccu_desc a10s_ccu_desc; > extern const struct ccu_desc a23_ccu_desc; > @@ -205,6 +211,7 @@ U_BOOT_DRIVER(sunxi_clk) = { > .of_match = sunxi_clk_ids, > .bind = sunxi_clk_bind, > .probe = sunxi_clk_probe, > - .priv_auto = sizeof(struct ccu_priv), > + .of_to_plat = sunxi_clk_of_to_plat, > + .plat_auto = sizeof(struct ccu_plat), > .ops = &sunxi_clk_ops, > }; > diff --git a/include/clk/sunxi.h b/include/clk/sunxi.h > index 11caf12b17..e90e078972 100644 > --- a/include/clk/sunxi.h > +++ b/include/clk/sunxi.h > @@ -70,12 +70,12 @@ struct ccu_desc { > }; > > /** > - * struct ccu_priv - sunxi clock control unit > + * struct ccu_plat - sunxi clock control unit platform data > * > * @base: base address > * @desc: ccu descriptor > */ > -struct ccu_priv { > +struct ccu_plat { > void *base; > const struct ccu_desc *desc; > };
diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c index 7d9e6029ff..cadfca767b 100644 --- a/drivers/clk/sunxi/clk_sunxi.c +++ b/drivers/clk/sunxi/clk_sunxi.c @@ -15,19 +15,19 @@ #include <linux/bitops.h> #include <linux/log2.h> -static const struct ccu_clk_gate *priv_to_gate(struct ccu_priv *priv, +static const struct ccu_clk_gate *plat_to_gate(struct ccu_plat *plat, unsigned long id) { - if (id >= priv->desc->num_gates) + if (id >= plat->desc->num_gates) return NULL; - return &priv->desc->gates[id]; + return &plat->desc->gates[id]; } static int sunxi_set_gate(struct clk *clk, bool on) { - struct ccu_priv *priv = dev_get_priv(clk->dev); - const struct ccu_clk_gate *gate = priv_to_gate(priv, clk->id); + struct ccu_plat *plat = dev_get_plat(clk->dev); + const struct ccu_clk_gate *gate = plat_to_gate(plat, clk->id); u32 reg; if (!gate || !(gate->flags & CCU_CLK_F_IS_VALID)) { @@ -38,13 +38,13 @@ static int sunxi_set_gate(struct clk *clk, bool on) debug("%s: (CLK#%ld) off#0x%x, BIT(%d)\n", __func__, clk->id, gate->off, ilog2(gate->bit)); - reg = readl(priv->base + gate->off); + reg = readl(plat->base + gate->off); if (on) reg |= gate->bit; else reg &= ~gate->bit; - writel(reg, priv->base + gate->off); + writel(reg, plat->base + gate->off); return 0; } @@ -71,19 +71,10 @@ static int sunxi_clk_bind(struct udevice *dev) static int sunxi_clk_probe(struct udevice *dev) { - struct ccu_priv *priv = dev_get_priv(dev); struct clk_bulk clk_bulk; struct reset_ctl_bulk rst_bulk; int ret; - priv->base = dev_read_addr_ptr(dev); - if (!priv->base) - return -ENOMEM; - - priv->desc = (const struct ccu_desc *)dev_get_driver_data(dev); - if (!priv->desc) - return -EINVAL; - ret = clk_get_bulk(dev, &clk_bulk); if (!ret) clk_enable_bulk(&clk_bulk); @@ -95,6 +86,21 @@ static int sunxi_clk_probe(struct udevice *dev) return 0; } +static int sunxi_clk_of_to_plat(struct udevice *dev) +{ + struct ccu_plat *plat = dev_get_plat(dev); + + plat->base = dev_read_addr_ptr(dev); + if (!plat->base) + return -ENOMEM; + + plat->desc = (const struct ccu_desc *)dev_get_driver_data(dev); + if (!plat->desc) + return -EINVAL; + + return 0; +} + extern const struct ccu_desc a10_ccu_desc; extern const struct ccu_desc a10s_ccu_desc; extern const struct ccu_desc a23_ccu_desc; @@ -205,6 +211,7 @@ U_BOOT_DRIVER(sunxi_clk) = { .of_match = sunxi_clk_ids, .bind = sunxi_clk_bind, .probe = sunxi_clk_probe, - .priv_auto = sizeof(struct ccu_priv), + .of_to_plat = sunxi_clk_of_to_plat, + .plat_auto = sizeof(struct ccu_plat), .ops = &sunxi_clk_ops, }; diff --git a/include/clk/sunxi.h b/include/clk/sunxi.h index 11caf12b17..e90e078972 100644 --- a/include/clk/sunxi.h +++ b/include/clk/sunxi.h @@ -70,12 +70,12 @@ struct ccu_desc { }; /** - * struct ccu_priv - sunxi clock control unit + * struct ccu_plat - sunxi clock control unit platform data * * @base: base address * @desc: ccu descriptor */ -struct ccu_priv { +struct ccu_plat { void *base; const struct ccu_desc *desc; };
All of the driver private data should really be platform data since it is determined statically (selected by the compatible string or extracted from the devicetree). Move everything to platform data, so it can be provided when binding the driver. This is useful for SPL, or for instantiating the driver as part of an MFD. Signed-off-by: Samuel Holland <samuel@sholland.org> --- drivers/clk/sunxi/clk_sunxi.c | 41 ++++++++++++++++++++--------------- include/clk/sunxi.h | 4 ++-- 2 files changed, 26 insertions(+), 19 deletions(-)