diff mbox series

imx: imx8m: drop uneeded check

Message ID 20220429081849.29965-1-peng.fan@oss.nxp.com
State Accepted
Commit a1d675ac7726bd2cc979be7d615c732667edf8e5
Delegated to: Stefano Babic
Headers show
Series imx: imx8m: drop uneeded check | expand

Commit Message

Peng Fan (OSS) April 29, 2022, 8:18 a.m. UTC 
From: Peng Fan <peng.fan@nxp.com>

All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
waste cpu cycles.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

Comments

ZHIZHIKIN Andrey May 16, 2022, 7:21 a.m. UTC | #1 
Hello Peng,

> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Peng Fan (OSS)
> Sent: Friday, April 29, 2022 10:19 AM
> To: sbabic@denx.de; festevam@gmail.com; NXP i.MX U-Boot Team <uboot-imx@nxp.com>
> Cc: u-boot@lists.denx.de; Peng Fan <peng.fan@nxp.com>
> Subject: [PATCH] imx: imx8m: drop uneeded check
> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
> waste cpu cycles.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  arch/arm/mach-imx/imx8m/soc.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
> index 8e23e6da326..5240dc11363 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -72,15 +72,13 @@ void enable_tzc380(void)
>  	 * According to TRM, TZASC_ID_SWAP_BYPASS should be set in
>  	 * order to avoid AXI Bus errors when GPU is in use
>  	 */
> -	if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
> -		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
> +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);

Since you've dropped the SoC-specific check, perhaps you can combine
bits set that are done by setbits_le32 together with one below?

> 
>  	/*
>  	 * imx8mn and imx8mp implements the lock bit for
>  	 * TZASC_ID_SWAP_BYPASS, enable it to lock settings
>  	 */
> -	if (is_imx8mn() || is_imx8mp())
> -		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
> +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);

BYPASS_LOCK is not present in i.MX8MM TRM, but I guess you've checked
that it is implemented already, right?

> 
>  	/*
>  	 * set Region 0 attribute to allow secure and non-secure
> --
> 2.36.0

-- andrey
Peng Fan May 16, 2022, 7:24 a.m. UTC | #2 
> Subject: RE: [PATCH] imx: imx8m: drop uneeded check
> 
> Hello Peng,
> 
> > -----Original Message-----
> > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Peng Fan
> > (OSS)
> > Sent: Friday, April 29, 2022 10:19 AM
> > To: sbabic@denx.de; festevam@gmail.com; NXP i.MX U-Boot Team
> > <uboot-imx@nxp.com>
> > Cc: u-boot@lists.denx.de; Peng Fan <peng.fan@nxp.com>
> > Subject: [PATCH] imx: imx8m: drop uneeded check
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
> > waste cpu cycles.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm/mach-imx/imx8m/soc.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/mach-imx/imx8m/soc.c
> > b/arch/arm/mach-imx/imx8m/soc.c index 8e23e6da326..5240dc11363
> 100644
> > --- a/arch/arm/mach-imx/imx8m/soc.c
> > +++ b/arch/arm/mach-imx/imx8m/soc.c
> > @@ -72,15 +72,13 @@ void enable_tzc380(void)
> >  	 * According to TRM, TZASC_ID_SWAP_BYPASS should be set in
> >  	 * order to avoid AXI Bus errors when GPU is in use
> >  	 */
> > -	if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
> > -		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
> > +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
> 
> Since you've dropped the SoC-specific check, perhaps you can combine bits set
> that are done by setbits_le32 together with one below?

Let’s separate them, first set, then lock.
> 
> >
> >  	/*
> >  	 * imx8mn and imx8mp implements the lock bit for
> >  	 * TZASC_ID_SWAP_BYPASS, enable it to lock settings
> >  	 */
> > -	if (is_imx8mn() || is_imx8mp())
> > -		setbits_le32(&gpr->gpr[10],
> GPR_TZASC_ID_SWAP_BYPASS_LOCK);
> > +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
> 
> BYPASS_LOCK is not present in i.MX8MM TRM, but I guess you've checked that it
> is implemented already, right?

Yes. It is implemented. RM needs update.

Regards,
Peng.

> 
> >
> >  	/*
> >  	 * set Region 0 attribute to allow secure and non-secure
> > --
> > 2.36.0
> 
> -- andrey
ZHIZHIKIN Andrey May 16, 2022, 7:30 a.m. UTC | #3 
> -----Original Message-----
> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Peng Fan
> Sent: Monday, May 16, 2022 9:25 AM
> To: ZHIZHIKIN Andrey <andrey.zhizhikin@leica-geosystems.com>; Peng Fan (OSS)
> <peng.fan@oss.nxp.com>; sbabic@denx.de; festevam@gmail.com; dl-uboot-imx <uboot-
> imx@nxp.com>
> Cc: u-boot@lists.denx.de
> Subject: RE: [PATCH] imx: imx8m: drop uneeded check
> 
> > Subject: RE: [PATCH] imx: imx8m: drop uneeded check
> >
> > Hello Peng,
> >
> > > -----Original Message-----
> > > From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Peng Fan
> > > (OSS)
> > > Sent: Friday, April 29, 2022 10:19 AM
> > > To: sbabic@denx.de; festevam@gmail.com; NXP i.MX U-Boot Team
> > > <uboot-imx@nxp.com>
> > > Cc: u-boot@lists.denx.de; Peng Fan <peng.fan@nxp.com>
> > > Subject: [PATCH] imx: imx8m: drop uneeded check
> > >
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
> > > waste cpu cycles.
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > >  arch/arm/mach-imx/imx8m/soc.c | 6 ++----
> > >  1 file changed, 2 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-imx/imx8m/soc.c
> > > b/arch/arm/mach-imx/imx8m/soc.c index 8e23e6da326..5240dc11363
> > 100644
> > > --- a/arch/arm/mach-imx/imx8m/soc.c
> > > +++ b/arch/arm/mach-imx/imx8m/soc.c
> > > @@ -72,15 +72,13 @@ void enable_tzc380(void)
> > >  	 * According to TRM, TZASC_ID_SWAP_BYPASS should be set in
> > >  	 * order to avoid AXI Bus errors when GPU is in use
> > >  	 */
> > > -	if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
> > > -		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
> > > +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
> >
> > Since you've dropped the SoC-specific check, perhaps you can combine bits set
> > that are done by setbits_le32 together with one below?
> 
> Let’s separate them, first set, then lock.

OK, sounds logical.

> >
> > >
> > >  	/*
> > >  	 * imx8mn and imx8mp implements the lock bit for
> > >  	 * TZASC_ID_SWAP_BYPASS, enable it to lock settings
> > >  	 */
> > > -	if (is_imx8mn() || is_imx8mp())
> > > -		setbits_le32(&gpr->gpr[10],
> > GPR_TZASC_ID_SWAP_BYPASS_LOCK);
> > > +	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
> >
> > BYPASS_LOCK is not present in i.MX8MM TRM, but I guess you've checked that it
> > is implemented already, right?
> 
> Yes. It is implemented. RM needs update.

Understood, thanks for clarifications!

Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>

> 
> Regards,
> Peng.
> 
> >
> > >
> > >  	/*
> > >  	 * set Region 0 attribute to allow secure and non-secure
> > > --
> > > 2.36.0
> >
> > -- andrey

-- andrey
Stefano Babic May 20, 2022, 1:44 p.m. UTC | #4 
> From: Peng Fan <peng.fan@nxp.com>
> All i.MX8M needs TZASC ID SWAP set and locked, no need the check to
> waste cpu cycles.
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 8e23e6da326..5240dc11363 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -72,15 +72,13 @@  void enable_tzc380(void)
 	 * According to TRM, TZASC_ID_SWAP_BYPASS should be set in
 	 * order to avoid AXI Bus errors when GPU is in use
 	 */
-	if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
-		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
+	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
 
 	/*
 	 * imx8mn and imx8mp implements the lock bit for
 	 * TZASC_ID_SWAP_BYPASS, enable it to lock settings
 	 */
-	if (is_imx8mn() || is_imx8mp())
-		setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
+	setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
 
 	/*
 	 * set Region 0 attribute to allow secure and non-secure