diff mbox series

[05/12] ARM: dts: sunxi: A13/A31/A23/A33: Sync from Linux v5.18-rc1

Message ID 20220427203132.47271-6-samuel@sholland.org
State Accepted
Commit 70f24fa02b52b988b852c25b9ded9e86a0ef227a
Delegated to: Andre Przywara
Headers show
Series sunxi: Devicetree sync from Linux v5.18-rc1 | expand

Commit Message

Samuel Holland April 27, 2022, 8:31 p.m. UTC
Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
SoCs and all existing boards from the Linux v5.18-rc1 tag.

These changes are combined into one commit due to interdependencies:
 - The unit addresses were removed from bitbanged I2C buses, which
   drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
   and sun6i-a31-colombus.dts.
 - The pinctrl nodes were renamed, including some used by the shared
   header sunxi-reference-design-tablet.dtsi.

To maintain ABI compatibility with existing LTS kernels, one change
moving some IP blocks to the r_intc interrupt controller is excluded.
This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.

This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.

This commit also adds the following new board devicetrees:
 - sun5i-a13-licheepi-one.dts
 - sun5i-a13-pocketbook-touch-lux-3.dts
 - sun5i-gr8-evb.dts
 - sun8i-a23-ippo-q8h-v1.2.dts
 - sun8i-a23-ippo-q8h-v5.dts
 - sun8i-a33-et-q8-v1.6.dts
 - sun8i-a33-ippo-q8h-v1.2.dts
 - sun8i-r16-nintendo-super-nes-classic.dts

As with the other SoCs, updates of note are conversion of GPIO pull-up
from pinconf to GPIO flags and renaming the detection GPIO properties in
the USB PHY nodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

 arch/arm/dts/Makefile                         |  10 +-
 arch/arm/dts/axp22x.dtsi                      |  11 +-
 arch/arm/dts/sun5i-a10s-auxtek-t003.dts       |  16 +-
 arch/arm/dts/sun5i-a10s-auxtek-t004.dts       |  35 +-
 arch/arm/dts/sun5i-a10s-mk802.dts             |  31 +-
 arch/arm/dts/sun5i-a10s-olinuxino-micro.dts   |  68 +---
 arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts      |  22 +-
 arch/arm/dts/sun5i-a10s-wobo-i5.dts           |  34 +-
 arch/arm/dts/sun5i-a10s.dtsi                  |  30 +-
 arch/arm/dts/sun5i-a13-ampe-a76.dts           |   2 +-
 .../dts/sun5i-a13-empire-electronix-d709.dts  |  41 +--
 arch/arm/dts/sun5i-a13-hsg-h702.dts           |  37 +-
 arch/arm/dts/sun5i-a13-inet-86vs.dts          |   2 +-
 arch/arm/dts/sun5i-a13-licheepi-one.dts       | 214 +++++++++++
 arch/arm/dts/sun5i-a13-olinuxino-micro.dts    |  50 +--
 arch/arm/dts/sun5i-a13-olinuxino.dts          |  56 +--
 .../dts/sun5i-a13-pocketbook-touch-lux-3.dts  | 258 ++++++++++++++
 arch/arm/dts/sun5i-a13-q8-tablet.dts          |  18 +-
 arch/arm/dts/sun5i-a13-utoo-p66.dts           |  26 +-
 arch/arm/dts/sun5i-a13.dtsi                   |  23 +-
 arch/arm/dts/sun5i-gr8-chip-pro.dts           |  38 +-
 arch/arm/dts/sun5i-gr8-evb.dts                | 333 ++++++++++++++++++
 arch/arm/dts/sun5i-gr8.dtsi                   |  12 +-
 arch/arm/dts/sun5i-r8-chip.dts                |  52 +--
 .../dts/sun5i-reference-design-tablet.dtsi    |  57 +--
 arch/arm/dts/sun5i.dtsi                       | 209 +++++++----
 arch/arm/dts/sun6i-a31-app4-evb1.dts          |  10 +-
 arch/arm/dts/sun6i-a31-colombus.dts           |  57 +--
 arch/arm/dts/sun6i-a31-hummingbird.dts        |  75 +---
 arch/arm/dts/sun6i-a31-i7.dts                 |  47 +--
 arch/arm/dts/sun6i-a31-m9.dts                 |  46 +--
 arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts   |  46 +--
 arch/arm/dts/sun6i-a31-mixtile-loftq.dts      |   6 +-
 arch/arm/dts/sun6i-a31.dtsi                   | 218 +++++++-----
 arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts  |   2 +-
 arch/arm/dts/sun6i-a31s-cs908.dts             |  17 +-
 arch/arm/dts/sun6i-a31s-inet-q972.dts         |   8 +-
 arch/arm/dts/sun6i-a31s-primo81.dts           |  32 +-
 arch/arm/dts/sun6i-a31s-sina31s-core.dtsi     |   4 +-
 arch/arm/dts/sun6i-a31s-sina31s.dts           |  39 +-
 arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts   | 144 +++++---
 .../sun6i-a31s-yones-toptech-bs1078-v2.dts    |  22 +-
 .../dts/sun6i-reference-design-tablet.dtsi    |  22 +-
 arch/arm/dts/sun8i-a23-a33.dtsi               | 308 ++++++++++++----
 arch/arm/dts/sun8i-a23-evb.dts                |  20 +-
 arch/arm/dts/sun8i-a23-gt90h-v4.dts           |   2 +-
 arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts      |  73 ++++
 arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts        |  73 ++++
 .../dts/sun8i-a23-polaroid-mid2407pxe03.dts   |  15 +-
 .../dts/sun8i-a23-polaroid-mid2809pxe04.dts   |  15 +-
 arch/arm/dts/sun8i-a23-q8-tablet.dts          |  10 +
 arch/arm/dts/sun8i-a23.dtsi                   |  26 +-
 ...c-edition.dts => sun8i-a33-et-q8-v1.6.dts} |  32 +-
 arch/arm/dts/sun8i-a33-ga10h-v1.1.dts         |   4 +-
 arch/arm/dts/sun8i-a33-inet-d978-rev2.dts     |  14 +-
 arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts      |  57 +++
 arch/arm/dts/sun8i-a33-olinuxino.dts          |  12 +-
 arch/arm/dts/sun8i-a33-q8-tablet.dts          |   7 +
 arch/arm/dts/sun8i-a33-sinlinx-sina33.dts     |  34 +-
 arch/arm/dts/sun8i-a33.dtsi                   | 270 +++++---------
 arch/arm/dts/sun8i-q8-common.dtsi             |  31 +-
 arch/arm/dts/sun8i-r16-bananapi-m2m.dts       |  55 ++-
 .../dts/sun8i-r16-nintendo-nes-classic.dts    |  54 +++
 .../sun8i-r16-nintendo-super-nes-classic.dts  |  11 +
 arch/arm/dts/sun8i-r16-parrot.dts             |  62 +---
 .../dts/sun8i-reference-design-tablet.dtsi    |  33 +-
 arch/arm/dts/sunxi-common-regulators.dtsi     |  39 --
 .../dts/sunxi-reference-design-tablet.dtsi    |  11 +-
 arch/arm/mach-sunxi/Kconfig                   |   2 +-
 .../Nintendo_NES_Classic_Edition_defconfig    |   2 +-
 70 files changed, 2149 insertions(+), 1603 deletions(-)
 create mode 100644 arch/arm/dts/sun5i-a13-licheepi-one.dts
 create mode 100644 arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts
 create mode 100644 arch/arm/dts/sun5i-gr8-evb.dts
 create mode 100644 arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
 create mode 100644 arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
 rename arch/arm/dts/{sun8i-r16-nintendo-nes-classic-edition.dts => sun8i-a33-et-q8-v1.6.dts} (81%)
 create mode 100644 arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
 create mode 100644 arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts
 create mode 100644 arch/arm/dts/sun8i-r16-nintendo-super-nes-classic.dts

Comments

Andre Przywara May 20, 2022, 3:34 p.m. UTC | #1
On Wed, 27 Apr 2022 15:31:24 -0500
Samuel Holland <samuel@sholland.org> wrote:

Hi,

> Copy the devicetree source for the A10s/A13/GR8, A31(s), and A23/A33/R16
> SoCs and all existing boards from the Linux v5.18-rc1 tag.
> 
> These changes are combined into one commit due to interdependencies:
>  - The unit addresses were removed from bitbanged I2C buses, which
>    drives a Kconfig default change. This affects sun5i-a13-utoo-p66.dts
>    and sun6i-a31-colombus.dts.
>  - The pinctrl nodes were renamed, including some used by the shared
>    header sunxi-reference-design-tablet.dtsi.
> 
> To maintain ABI compatibility with existing LTS kernels, one change
> moving some IP blocks to the r_intc interrupt controller is excluded.
> This effectively reverts Linux commits 994e5818392c and 9fdef3c3d8c2.
> 
> This commit renames the file sun8i-r16-nintendo-nes-classic-edition.dts
> to sun8i-r16-nintendo-nes-classic.dts to match the Linux tree.
> 
> This commit also adds the following new board devicetrees:
>  - sun5i-a13-licheepi-one.dts
>  - sun5i-a13-pocketbook-touch-lux-3.dts
>  - sun5i-gr8-evb.dts
>  - sun8i-a23-ippo-q8h-v1.2.dts
>  - sun8i-a23-ippo-q8h-v5.dts
>  - sun8i-a33-et-q8-v1.6.dts
>  - sun8i-a33-ippo-q8h-v1.2.dts
>  - sun8i-r16-nintendo-super-nes-classic.dts
> 
> As with the other SoCs, updates of note are conversion of GPIO pull-up
> from pinconf to GPIO flags and renaming the detection GPIO properties in
> the USB PHY nodes.
> 
> Signed-off-by: Samuel Holland <samuel@sholland.org>

So that's a big one. The sync part looks good, I compared the files
against the kernel, and the r_intc change is the only difference.

Most of the changes are about node names and GPIO / pinctrl usage, which
*should* be fine, especially for U-Boot.

However there are a number of incompatible changes, I marked them below in
the patch, for reference, but enumerate them here for easier discussion:

- "allwinner,sun4i-a10-sram-controller" got replaced with
"allwinner,sun5i-a13-system-control", in sun5i-a13.dtsi. U-Boot doesn't
care, and the Linux driver interestingly doesn't make a difference. So not
sure why the new name wasn't just *added*. This would affect pre v4.19
kernels, only, so I wouldn't consider this a real problem.

- "urt,umsh-8596md-t", "simple-panel" was changed to
"bananapi,s070wv20-ct16", in sun5i-a13-q8-tablet.dts. I think U-Boot
shouldn't be affected, as panel usage is controlled via Kconfig.
For the kernel it seems to be v4.20 adding support.

- A23/A33 suffer from a change in the timer compatible string (in
sun8i-a23-a33.dtsi), requiring Linux v5.4 at least. I am not sure how
fatal this is, since we have the arch timer in those SoCs.

- More problematic seems to be the rtc compatible string change in
sun8i-a23-a33.dtsi, which restricts kernel compatibility to v5.0 and later.
I am not sure if that prevents the CCU and pinctrl to probe (because they
use the first rtc provided clock as one of their input clocks).
I wonder if having the old compatible string as a fallback is feasible: I
don't the second RTC clock used anywhere, and the RTC/clock driver doesn't
seem to make a difference between the two compatibles otherwise.

So overall this might look bad, but the breakages are:
a) only for those older generation of devices, which probably don't use
UEFI boot or otherwise rely on $fdtcontroladdr for the kernel, and
b) will probably work fine with kernel v5.4 onwards, which seems to be
reasonably old and well spread by now.

So for the sake of getting our DTs much closer to the kernel copy, I am
happy with this change.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre

> ---
> 
>  arch/arm/dts/Makefile                         |  10 +-
>  arch/arm/dts/axp22x.dtsi                      |  11 +-
>  arch/arm/dts/sun5i-a10s-auxtek-t003.dts       |  16 +-
>  arch/arm/dts/sun5i-a10s-auxtek-t004.dts       |  35 +-
>  arch/arm/dts/sun5i-a10s-mk802.dts             |  31 +-
>  arch/arm/dts/sun5i-a10s-olinuxino-micro.dts   |  68 +---
>  arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts      |  22 +-
>  arch/arm/dts/sun5i-a10s-wobo-i5.dts           |  34 +-
>  arch/arm/dts/sun5i-a10s.dtsi                  |  30 +-
>  arch/arm/dts/sun5i-a13-ampe-a76.dts           |   2 +-
>  .../dts/sun5i-a13-empire-electronix-d709.dts  |  41 +--
>  arch/arm/dts/sun5i-a13-hsg-h702.dts           |  37 +-
>  arch/arm/dts/sun5i-a13-inet-86vs.dts          |   2 +-
>  arch/arm/dts/sun5i-a13-licheepi-one.dts       | 214 +++++++++++
>  arch/arm/dts/sun5i-a13-olinuxino-micro.dts    |  50 +--
>  arch/arm/dts/sun5i-a13-olinuxino.dts          |  56 +--
>  .../dts/sun5i-a13-pocketbook-touch-lux-3.dts  | 258 ++++++++++++++
>  arch/arm/dts/sun5i-a13-q8-tablet.dts          |  18 +-
>  arch/arm/dts/sun5i-a13-utoo-p66.dts           |  26 +-
>  arch/arm/dts/sun5i-a13.dtsi                   |  23 +-
>  arch/arm/dts/sun5i-gr8-chip-pro.dts           |  38 +-
>  arch/arm/dts/sun5i-gr8-evb.dts                | 333 ++++++++++++++++++
>  arch/arm/dts/sun5i-gr8.dtsi                   |  12 +-
>  arch/arm/dts/sun5i-r8-chip.dts                |  52 +--
>  .../dts/sun5i-reference-design-tablet.dtsi    |  57 +--
>  arch/arm/dts/sun5i.dtsi                       | 209 +++++++----
>  arch/arm/dts/sun6i-a31-app4-evb1.dts          |  10 +-
>  arch/arm/dts/sun6i-a31-colombus.dts           |  57 +--
>  arch/arm/dts/sun6i-a31-hummingbird.dts        |  75 +---
>  arch/arm/dts/sun6i-a31-i7.dts                 |  47 +--
>  arch/arm/dts/sun6i-a31-m9.dts                 |  46 +--
>  arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts   |  46 +--
>  arch/arm/dts/sun6i-a31-mixtile-loftq.dts      |   6 +-
>  arch/arm/dts/sun6i-a31.dtsi                   | 218 +++++++-----
>  arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts  |   2 +-
>  arch/arm/dts/sun6i-a31s-cs908.dts             |  17 +-
>  arch/arm/dts/sun6i-a31s-inet-q972.dts         |   8 +-
>  arch/arm/dts/sun6i-a31s-primo81.dts           |  32 +-
>  arch/arm/dts/sun6i-a31s-sina31s-core.dtsi     |   4 +-
>  arch/arm/dts/sun6i-a31s-sina31s.dts           |  39 +-
>  arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts   | 144 +++++---
>  .../sun6i-a31s-yones-toptech-bs1078-v2.dts    |  22 +-
>  .../dts/sun6i-reference-design-tablet.dtsi    |  22 +-
>  arch/arm/dts/sun8i-a23-a33.dtsi               | 308 ++++++++++++----
>  arch/arm/dts/sun8i-a23-evb.dts                |  20 +-
>  arch/arm/dts/sun8i-a23-gt90h-v4.dts           |   2 +-
>  arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts      |  73 ++++
>  arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts        |  73 ++++
>  .../dts/sun8i-a23-polaroid-mid2407pxe03.dts   |  15 +-
>  .../dts/sun8i-a23-polaroid-mid2809pxe04.dts   |  15 +-
>  arch/arm/dts/sun8i-a23-q8-tablet.dts          |  10 +
>  arch/arm/dts/sun8i-a23.dtsi                   |  26 +-
>  ...c-edition.dts => sun8i-a33-et-q8-v1.6.dts} |  32 +-
>  arch/arm/dts/sun8i-a33-ga10h-v1.1.dts         |   4 +-
>  arch/arm/dts/sun8i-a33-inet-d978-rev2.dts     |  14 +-
>  arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts      |  57 +++
>  arch/arm/dts/sun8i-a33-olinuxino.dts          |  12 +-
>  arch/arm/dts/sun8i-a33-q8-tablet.dts          |   7 +
>  arch/arm/dts/sun8i-a33-sinlinx-sina33.dts     |  34 +-
>  arch/arm/dts/sun8i-a33.dtsi                   | 270 +++++---------
>  arch/arm/dts/sun8i-q8-common.dtsi             |  31 +-
>  arch/arm/dts/sun8i-r16-bananapi-m2m.dts       |  55 ++-
>  .../dts/sun8i-r16-nintendo-nes-classic.dts    |  54 +++
>  .../sun8i-r16-nintendo-super-nes-classic.dts  |  11 +
>  arch/arm/dts/sun8i-r16-parrot.dts             |  62 +---
>  .../dts/sun8i-reference-design-tablet.dtsi    |  33 +-
>  arch/arm/dts/sunxi-common-regulators.dtsi     |  39 --
>  .../dts/sunxi-reference-design-tablet.dtsi    |  11 +-
>  arch/arm/mach-sunxi/Kconfig                   |   2 +-
>  .../Nintendo_NES_Classic_Edition_defconfig    |   2 +-
>  70 files changed, 2149 insertions(+), 1603 deletions(-)
>  create mode 100644 arch/arm/dts/sun5i-a13-licheepi-one.dts
>  create mode 100644 arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts
>  create mode 100644 arch/arm/dts/sun5i-gr8-evb.dts
>  create mode 100644 arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
>  create mode 100644 arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
>  rename arch/arm/dts/{sun8i-r16-nintendo-nes-classic-edition.dts => sun8i-a33-et-q8-v1.6.dts} (81%)
>  create mode 100644 arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
>  create mode 100644 arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts
>  create mode 100644 arch/arm/dts/sun8i-r16-nintendo-super-nes-classic.dts
> 

...

> diff --git a/arch/arm/dts/sun5i-a13-q8-tablet.dts b/arch/arm/dts/sun5i-a13-q8-tablet.dts
> index a89f29fa3e..f9fc1c8b60 100644
> --- a/arch/arm/dts/sun5i-a13-q8-tablet.dts
> +++ b/arch/arm/dts/sun5i-a13-q8-tablet.dts
> @@ -49,19 +49,13 @@
>  	compatible = "allwinner,q8-a13", "allwinner,sun5i-a13";
>  
>  	panel: panel {
> -		compatible = "urt,umsh-8596md-t", "simple-panel";
> -		#address-cells = <1>;
> -		#size-cells = <0>;
> +		compatible = "bananapi,s070wv20-ct16";

This drops the "simple-panel" fallback compatible, and replaces it just a
device specific one. This means you need at least Linux v4.20 to use the
display.

> +		power-supply = <&reg_vcc3v3>;
> +		enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
> +		backlight = <&backlight>;
>  
> -		port@0 {
> -			reg = <0>;
> -			/* TODO: lcd panel uses axp gpio0 as enable pin */
> -			backlight = <&backlight>;
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> -
> -			panel_input: endpoint@0 {
> -				reg = <0>;
> +		port {
> +			panel_input: endpoint {
>  				remote-endpoint = <&tcon0_out_lcd>;
>  			};
>  		};

[ ... ]

> diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
> index 07f2248ed5..250d6b87ab 100644
> --- a/arch/arm/dts/sun5i.dtsi
> +++ b/arch/arm/dts/sun5i.dtsi
> @@ -42,14 +42,14 @@
>   *     OTHER DEALINGS IN THE SOFTWARE.
>   */
>  
> -#include "skeleton.dtsi"
> -
>  #include <dt-bindings/clock/sun5i-ccu.h>
>  #include <dt-bindings/dma/sun4i-a10.h>
>  #include <dt-bindings/reset/sun5i-ccu.h>
>  
>  / {
>  	interrupt-parent = <&intc>;
> +	#address-cells = <1>;
> +	#size-cells = <1>;
>  
>  	cpus {
>  		#address-cells = <1>;
> @@ -68,7 +68,7 @@
>  		#size-cells = <1>;
>  		ranges;
>  
> -		framebuffer@0 {
> +		framebuffer-lcd0 {
>  			compatible = "allwinner,simple-framebuffer",
>  				     "simple-framebuffer";
>  			allwinner,pipeline = "de_be0-lcd0";
> @@ -77,7 +77,7 @@
>  			status = "disabled";
>  		};
>  
> -		framebuffer@1 {
> +		framebuffer-lcd0-tve0 {
>  			compatible = "allwinner,simple-framebuffer",
>  				     "simple-framebuffer";
>  			allwinner,pipeline = "de_be0-lcd0-tve0";
> @@ -93,14 +93,14 @@
>  		#size-cells = <1>;
>  		ranges;
>  
> -		osc24M: clk@1c20050 {
> +		osc24M: clk-24M {
>  			#clock-cells = <0>;
>  			compatible = "fixed-clock";
>  			clock-frequency = <24000000>;
>  			clock-output-names = "osc24M";
>  		};
>  
> -		osc32k: clk@0 {
> +		osc32k: clk-32k {
>  			#clock-cells = <0>;
>  			compatible = "fixed-clock";
>  			clock-frequency = <32768>;
> @@ -108,14 +108,30 @@
>  		};
>  	};
>  
> -	soc@1c00000 {
> +	reserved-memory {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
> +		default-pool {
> +			compatible = "shared-dma-pool";
> +			size = <0x6000000>;
> +			alloc-ranges = <0x40000000 0x10000000>;
> +			reusable;
> +			linux,cma-default;
> +		};
> +	};
> +
> +	soc {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> +		dma-ranges;
>  		ranges;
>  
> -		sram-controller@1c00000 {
> -			compatible = "allwinner,sun4i-a10-sram-controller";
> +		system-control@1c00000 {
> +			compatible = "allwinner,sun5i-a13-system-control";

This is a change in the compatible string. Linux kernels before v4.19 won't
have a driver matching this new string, so will fail to use that device.
This would affect USB OTG and EMAC operation.

>  			reg = <0x01c00000 0x30>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> @@ -127,12 +143,13 @@
>  				#address-cells = <1>;
>  				#size-cells = <1>;
>  				ranges = <0 0x00000000 0xc000>;
> -			};
>  
> -			emac_sram: sram-section@8000 {
> -				compatible = "allwinner,sun4i-a10-sram-a3-a4";
> -				reg = <0x8000 0x4000>;
> -				status = "disabled";
> +				emac_sram: sram-section@8000 {
> +					compatible = "allwinner,sun5i-a13-sram-a3-a4",
> +						     "allwinner,sun4i-a10-sram-a3-a4";
> +					reg = <0x8000 0x4000>;
> +					status = "disabled";
> +				};
>  			};
>  
>  			sram_d: sram@10000 {

[ ... ]

> diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
> index 44f3cad3de..a42fac676b 100644
> --- a/arch/arm/dts/sun8i-a23-a33.dtsi
> +++ b/arch/arm/dts/sun8i-a23-a33.dtsi
> @@ -42,8 +42,6 @@
>   *     OTHER DEALINGS IN THE SOFTWARE.
>   */
>  
> -#include "skeleton.dtsi"
> -
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  
>  #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
> @@ -51,13 +49,15 @@
>  
>  / {
>  	interrupt-parent = <&gic>;
> +	#address-cells = <1>;
> +	#size-cells = <1>;
>  
>  	chosen {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges;
>  
> -		simplefb_lcd: framebuffer@0 {
> +		simplefb_lcd: framebuffer-lcd0 {
>  			compatible = "allwinner,simple-framebuffer",
>  				     "simple-framebuffer";
>  			allwinner,pipeline = "de_be0-lcd0";
> @@ -68,6 +68,12 @@
>  		};
>  	};
>  
> +	de: display-engine {
> +		/* compatible gets set in SoC specific dtsi file */
> +		allwinner,pipelines = <&fe0>;
> +		status = "disabled";
> +	};
> +
>  	timer {
>  		compatible = "arm,armv7-timer";
>  		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> @@ -118,12 +124,34 @@
>  		};
>  	};
>  
> -	soc@1c00000 {
> +	soc {
>  		compatible = "simple-bus";
>  		#address-cells = <1>;
>  		#size-cells = <1>;
>  		ranges;
>  
> +		system-control@1c00000 {
> +			compatible = "allwinner,sun8i-a23-system-control";
> +			reg = <0x01c00000 0x30>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges;
> +
> +			sram_c: sram@1d00000 {
> +				compatible = "mmio-sram";
> +				reg = <0x01d00000 0x80000>;
> +				#address-cells = <1>;
> +				#size-cells = <1>;
> +				ranges = <0 0x01d00000 0x80000>;
> +
> +				ve_sram: sram-section@0 {
> +					compatible = "allwinner,sun8i-a23-sram-c1",
> +						     "allwinner,sun4i-a10-sram-c1";
> +					reg = <0x000000 0x80000>;
> +				};
> +			};
> +		};
> +
>  		dma: dma-controller@1c02000 {
>  			compatible = "allwinner,sun8i-a23-dma";
>  			reg = <0x01c02000 0x1000>;
> @@ -133,6 +161,60 @@
>  			#dma-cells = <1>;
>  		};
>  
> +		nfc: nand-controller@1c03000 {
> +			compatible = "allwinner,sun8i-a23-nand-controller";
> +			reg = <0x01c03000 0x1000>;
> +			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
> +			clock-names = "ahb", "mod";
> +			resets = <&ccu RST_BUS_NAND>;
> +			reset-names = "ahb";
> +			dmas = <&dma 5>;
> +			dma-names = "rxtx";
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
> +		tcon0: lcd-controller@1c0c000 {
> +			/* compatible gets set in SoC specific dtsi file */
> +			reg = <0x01c0c000 0x1000>;
> +			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> +			dmas = <&dma 12>;
> +			clocks = <&ccu CLK_BUS_LCD>,
> +				 <&ccu CLK_LCD_CH0>,
> +				 <&ccu 13>;
> +			clock-names = "ahb",
> +				      "tcon-ch0",
> +				      "lvds-alt";
> +			clock-output-names = "tcon-pixel-clock";
> +			#clock-cells = <0>;
> +			resets = <&ccu RST_BUS_LCD>,
> +				 <&ccu RST_BUS_LVDS>;
> +			reset-names = "lcd",
> +				      "lvds";
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				tcon0_in: port@0 {
> +					reg = <0>;
> +
> +					tcon0_in_drc0: endpoint {
> +						remote-endpoint = <&drc0_out_tcon0>;
> +					};
> +				};
> +
> +				tcon0_out: port@1 {
> +					reg = <1>;
> +				};
> +			};
> +		};
> +
>  		mmc0: mmc@1c0f000 {
>  			compatible = "allwinner,sun7i-a20-mmc";
>  			reg = <0x01c0f000 0x1000>;
> @@ -147,6 +229,8 @@
>  			resets = <&ccu RST_BUS_MMC0>;
>  			reset-names = "ahb";
>  			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&mmc0_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -190,21 +274,6 @@
>  			#size-cells = <0>;
>  		};
>  
> -		nfc: nand@1c03000 {
> -			compatible = "allwinner,sun4i-a10-nand";
> -			reg = <0x01c03000 0x1000>;
> -			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> -			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
> -			clock-names = "ahb", "mod";
> -			resets = <&ccu RST_BUS_NAND>;
> -			reset-names = "ahb";
> -			pinctrl-names = "default";
> -			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
> -			status = "disabled";
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> -		};
> -
>  		usb_otg: usb@1c19000 {
>  			/* compatible gets set in SoC specific dtsi file */
>  			reg = <0x01c19000 0x0400>;
> @@ -215,6 +284,7 @@
>  			phys = <&usbphy 0>;
>  			phy-names = "usb";
>  			extcon = <&usbphy 0>;
> +			dr_mode = "otg";
>  			status = "disabled";
>  		};
>  
> @@ -276,22 +346,30 @@
>  			#interrupt-cells = <3>;
>  			#gpio-cells = <3>;
>  
> -			uart0_pins_a: uart0@0 {
> -				pins = "PF2", "PF4";
> -				function = "uart0";
> +			i2c0_pins: i2c0-pins {
> +				pins = "PH2", "PH3";
> +				function = "i2c0";
>  			};
>  
> -			uart1_pins_a: uart1@0 {
> -				pins = "PG6", "PG7";
> -				function = "uart1";
> +			i2c1_pins: i2c1-pins {
> +				pins = "PH4", "PH5";
> +				function = "i2c1";
>  			};
>  
> -			uart1_pins_cts_rts_a: uart1-cts-rts@0 {
> -				pins = "PG8", "PG9";
> -				function = "uart1";
> +			i2c2_pins: i2c2-pins {
> +				pins = "PE12", "PE13";
> +				function = "i2c2";
>  			};
>  
> -			mmc0_pins_a: mmc0@0 {
> +			lcd_rgb666_pins: lcd-rgb666-pins {
> +				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> +				       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
> +				       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
> +				       "PD24", "PD25", "PD26", "PD27";
> +				function = "lcd0";
> +			};
> +
> +			mmc0_pins: mmc0-pins {
>  				pins = "PF0", "PF1", "PF2",
>  				       "PF3", "PF4", "PF5";
>  				function = "mmc0";
> @@ -299,7 +377,7 @@
>  				bias-pull-up;
>  			};
>  
> -			mmc1_pins_a: mmc1@0 {
> +			mmc1_pg_pins: mmc1-pg-pins {
>  				pins = "PG0", "PG1", "PG2",
>  				       "PG3", "PG4", "PG5";
>  				function = "mmc1";
> @@ -307,7 +385,7 @@
>  				bias-pull-up;
>  			};
>  
> -			mmc2_8bit_pins: mmc2_8bit {
> +			mmc2_8bit_pins: mmc2-8bit-pins {
>  				pins = "PC5", "PC6", "PC8",
>  				       "PC9", "PC10", "PC11",
>  				       "PC12", "PC13", "PC14",
> @@ -324,61 +402,53 @@
>  				function = "nand0";
>  			};
>  
> -			nand_pins_cs0: nand-pins-cs0 {
> +			nand_cs0_pin: nand-cs0-pin {
>  				pins = "PC4";
>  				function = "nand0";
>  				bias-pull-up;
>  			};
>  
> -			nand_pins_cs1: nand-pins-cs1 {
> +			nand_cs1_pin: nand-cs1-pin {
>  				pins = "PC3";
>  				function = "nand0";
>  				bias-pull-up;
>  			};
>  
> -			nand_pins_rb0: nand-pins-rb0 {
> +			nand_rb0_pin: nand-rb0-pin {
>  				pins = "PC6";
>  				function = "nand0";
>  				bias-pull-up;
>  			};
>  
> -			nand_pins_rb1: nand-pins-rb1 {
> +			nand_rb1_pin: nand-rb1-pin {
>  				pins = "PC7";
>  				function = "nand0";
>  				bias-pull-up;
>  			};
>  
> -			pwm0_pins: pwm0 {
> +			pwm0_pin: pwm0-pin {
>  				pins = "PH0";
>  				function = "pwm0";
>  			};
>  
> -			i2c0_pins_a: i2c0@0 {
> -				pins = "PH2", "PH3";
> -				function = "i2c0";
> -			};
> -
> -			i2c1_pins_a: i2c1@0 {
> -				pins = "PH4", "PH5";
> -				function = "i2c1";
> +			uart0_pf_pins: uart0-pf-pins {
> +				pins = "PF2", "PF4";
> +				function = "uart0";
>  			};
>  
> -			i2c2_pins_a: i2c2@0 {
> -				pins = "PE12", "PE13";
> -				function = "i2c2";
> +			uart1_pg_pins: uart1-pg-pins {
> +				pins = "PG6", "PG7";
> +				function = "uart1";
>  			};
>  
> -			lcd_rgb666_pins: lcd-rgb666@0 {
> -				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
> -				       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
> -				       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
> -				       "PD24", "PD25", "PD26", "PD27";
> -				function = "lcd0";
> +			uart1_cts_rts_pg_pins: uart1-cts-rts-pg-pins {
> +				pins = "PG8", "PG9";
> +				function = "uart1";
>  			};
>  		};
>  
>  		timer@1c20c00 {
> -			compatible = "allwinner,sun4i-a10-timer";
> +			compatible = "allwinner,sun8i-a23-timer";

This changes the compatible string, which only started to be supported
with Linux v5.4. Any older kernel would not be able to use that timer, but
with the arch timer stepping up, we don't lose too much, I guess?

>  			reg = <0x01c20c00 0xa0>;
>  			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> @@ -389,6 +459,7 @@
>  			compatible = "allwinner,sun6i-a31-wdt";
>  			reg = <0x01c20ca0 0x20>;
>  			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&osc24M>;
>  		};
>  
>  		pwm: pwm@1c21400 {
> @@ -477,6 +548,8 @@
>  			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C0>;
>  			resets = <&ccu RST_BUS_I2C0>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c0_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -488,6 +561,8 @@
>  			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C1>;
>  			resets = <&ccu RST_BUS_I2C1>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c1_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -499,6 +574,8 @@
>  			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
>  			clocks = <&ccu CLK_BUS_I2C2>;
>  			resets = <&ccu RST_BUS_I2C2>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c2_pins>;
>  			status = "disabled";
>  			#address-cells = <1>;
>  			#size-cells = <0>;
> @@ -532,7 +609,7 @@
>  		};
>  
>  		gic: interrupt-controller@1c81000 {
> -			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
> +			compatible = "arm,gic-400";
>  			reg = <0x01c81000 0x1000>,
>  			      <0x01c82000 0x2000>,
>  			      <0x01c84000 0x2000>,
> @@ -542,17 +619,104 @@
>  			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
>  		};
>  
> +		fe0: display-frontend@1e00000 {
> +			/* compatible gets set in SoC specific dtsi file */
> +			reg = <0x01e00000 0x20000>;
> +			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
> +				 <&ccu CLK_DRAM_DE_FE>;
> +			clock-names = "ahb", "mod",
> +				      "ram";
> +			resets = <&ccu RST_BUS_DE_FE>;
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				fe0_out: port@1 {
> +					reg = <1>;
> +
> +					fe0_out_be0: endpoint {
> +						remote-endpoint = <&be0_in_fe0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		be0: display-backend@1e60000 {
> +			/* compatible gets set in SoC specific dtsi file */
> +			reg = <0x01e60000 0x10000>;
> +			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
> +				 <&ccu CLK_DRAM_DE_BE>;
> +			clock-names = "ahb", "mod",
> +				      "ram";
> +			resets = <&ccu RST_BUS_DE_BE>;
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				be0_in: port@0 {
> +					reg = <0>;
> +
> +					be0_in_fe0: endpoint {
> +						remote-endpoint = <&fe0_out_be0>;
> +					};
> +				};
> +
> +				be0_out: port@1 {
> +					reg = <1>;
> +
> +					be0_out_drc0: endpoint {
> +						remote-endpoint = <&drc0_in_be0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		drc0: drc@1e70000 {
> +			/* compatible gets set in SoC specific dtsi file */
> +			reg = <0x01e70000 0x10000>;
> +			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>,
> +				 <&ccu CLK_DRAM_DRC>;
> +			clock-names = "ahb", "mod", "ram";
> +			resets = <&ccu RST_BUS_DRC>;
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				drc0_in: port@0 {
> +					reg = <0>;
> +
> +					drc0_in_be0: endpoint {
> +						remote-endpoint = <&be0_out_drc0>;
> +					};
> +				};
> +
> +				drc0_out: port@1 {
> +					reg = <1>;
> +
> +					drc0_out_tcon0: endpoint {
> +						remote-endpoint = <&tcon0_in_drc0>;
> +					};
> +				};
> +			};
> +		};
> +
>  		rtc: rtc@1f00000 {
> -			compatible = "allwinner,sun6i-a31-rtc";
> -			reg = <0x01f00000 0x54>;
> +			compatible = "allwinner,sun8i-a23-rtc";

This changes the compatible string, requiring a Linux v5.0 kernel or later
to work. While we can probably get over the loss of the actual real-time
clock, it is also a clock provider, and the provided clock is used by the
CCU and pinctrl drivers.

> +			reg = <0x01f00000 0x400>;
>  			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>  				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> -			clock-output-names = "osc32k";
> +			clock-output-names = "osc32k", "osc32k-out";
>  			clocks = <&ext_osc32k>;
>  			#clock-cells = <1>;
>  		};
>  
> -		nmi_intc: interrupt-controller@1f00c00 {
> +		r_intc: interrupt-controller@1f00c00 {
>  			compatible = "allwinner,sun6i-a31-r-intc";
>  			interrupt-controller;
>  			#interrupt-cells = <2>;
> @@ -624,6 +788,20 @@
>  			status = "disabled";
>  		};
>  
> +		r_i2c: i2c@1f02400 {
> +			compatible = "allwinner,sun8i-a23-i2c",
> +				     "allwinner,sun6i-a31-i2c";
> +			reg = <0x01f02400 0x400>;
> +			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&r_i2c_pins>;
> +			clocks = <&apb0_gates 6>;
> +			resets = <&apb0_rst 6>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};
> +
>  		r_pio: pinctrl@1f02c00 {
>  			compatible = "allwinner,sun8i-a23-r-pinctrl";
>  			reg = <0x01f02c00 0x400>;
> @@ -634,18 +812,22 @@
>  			gpio-controller;
>  			interrupt-controller;
>  			#interrupt-cells = <3>;
> -			#address-cells = <1>;
> -			#size-cells = <0>;
>  			#gpio-cells = <3>;
>  
> -			r_rsb_pins: r_rsb {
> +			r_i2c_pins: r-i2c-pins {
> +				pins = "PL0", "PL1";
> +				function = "s_i2c";
> +				bias-pull-up;
> +			};
> +
> +			r_rsb_pins: r-rsb-pins {
>  				pins = "PL0", "PL1";
>  				function = "s_rsb";
>  				drive-strength = <20>;
>  				bias-pull-up;
>  			};
>  
> -			r_uart_pins_a: r_uart@0 {
> +			r_uart_pins_a: r-uart-pins {
>  				pins = "PL2", "PL3";
>  				function = "s_uart";
>  			};
diff mbox series

Patch

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7120d6a3aa..6433f63455 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -555,11 +555,14 @@  dtb-$(CONFIG_MACH_SUN5I) += \
 	sun5i-a13-hsg-h702.dtb \
 	sun5i-a13-inet-86vs.dtb \
 	sun5i-a13-inet-98v-rev2.dtb \
+	sun5i-a13-licheepi-one.dtb \
 	sun5i-a13-olinuxino.dtb \
 	sun5i-a13-olinuxino-micro.dtb \
+	sun5i-a13-pocketbook-touch-lux-3.dtb \
 	sun5i-a13-q8-tablet.dtb \
 	sun5i-a13-utoo-p66.dtb \
 	sun5i-gr8-chip-pro.dtb \
+	sun5i-gr8-evb.dtb \
 	sun5i-r8-chip.dtb
 dtb-$(CONFIG_MACH_SUN6I) += \
 	sun6i-a31-app4-evb1.dtb \
@@ -614,17 +617,22 @@  dtb-$(CONFIG_MACH_SUN8I_A23) += \
 	sun8i-a23-evb.dtb \
 	sun8i-a23-gt90h-v4.dtb \
 	sun8i-a23-inet86dz.dtb \
+	sun8i-a23-ippo-q8h-v1.2.dtb \
+	sun8i-a23-ippo-q8h-v5.dtb \
 	sun8i-a23-polaroid-mid2407pxe03.dtb \
 	sun8i-a23-polaroid-mid2809pxe04.dtb \
 	sun8i-a23-q8-tablet.dtb
 dtb-$(CONFIG_MACH_SUN8I_A33) += \
+	sun8i-a33-et-q8-v1.6.dtb \
 	sun8i-a33-ga10h-v1.1.dtb \
 	sun8i-a33-inet-d978-rev2.dtb \
+	sun8i-a33-ippo-q8h-v1.2.dtb \
 	sun8i-a33-olinuxino.dtb \
 	sun8i-a33-q8-tablet.dtb \
 	sun8i-a33-sinlinx-sina33.dtb \
 	sun8i-r16-bananapi-m2m.dtb \
-	sun8i-r16-nintendo-nes-classic-edition.dtb \
+	sun8i-r16-nintendo-nes-classic.dtb \
+	sun8i-r16-nintendo-super-nes-classic.dtb \
 	sun8i-r16-parrot.dtb
 dtb-$(CONFIG_MACH_SUN8I_A83T) += \
 	sun8i-a83t-allwinner-h8homlet-v2.dtb \
diff --git a/arch/arm/dts/axp22x.dtsi b/arch/arm/dts/axp22x.dtsi
index 87fb08e812..a020c12b28 100644
--- a/arch/arm/dts/axp22x.dtsi
+++ b/arch/arm/dts/axp22x.dtsi
@@ -52,12 +52,17 @@ 
 	interrupt-controller;
 	#interrupt-cells = <1>;
 
-	ac_power_supply: ac-power-supply {
+	ac_power_supply: ac-power {
 		compatible = "x-powers,axp221-ac-power-supply";
 		status = "disabled";
 	};
 
-	battery_power_supply: battery-power-supply {
+	axp_adc: adc {
+		compatible = "x-powers,axp221-adc";
+		#io-channel-cells = <1>;
+	};
+
+	battery_power_supply: battery-power {
 		compatible = "x-powers,axp221-battery-power-supply";
 		status = "disabled";
 	};
@@ -158,7 +163,7 @@ 
 		};
 	};
 
-	usb_power_supply: usb_power_supply {
+	usb_power_supply: usb-power {
 		compatible = "x-powers,axp221-usb-power-supply";
 		status = "disabled";
 	};
diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts b/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
index 39504d720e..04b0e6d287 100644
--- a/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
+++ b/arch/arm/dts/sun5i-a10s-auxtek-t003.dts
@@ -62,7 +62,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_t003>;
 
-		red {
+		led {
 			label = "t003-tv-dongle:red:usr";
 			gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
 			default-state = "on";
@@ -75,8 +75,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp152: pmic@30 {
@@ -89,8 +87,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t003>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -106,13 +102,7 @@ 
 };
 
 &pio {
-	mmc0_cd_pin_t003: mmc0_cd_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_t003: led_pins@0 {
+	led_pins_t003: led-pin {
 		pins = "PB2";
 		function = "gpio_out";
 		drive-strength = <20>;
@@ -131,7 +121,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
index 8d4fb93312..667bc2dc1e 100644
--- a/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
+++ b/arch/arm/dts/sun5i-a10s-auxtek-t004.dts
@@ -62,7 +62,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_t004>;
 
-		red {
+		led {
 			label = "t004-tv-dongle:red:usr";
 			gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
 			default-state = "on";
@@ -71,8 +71,6 @@ 
 
 	reg_vmmc1: vmmc1 {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&mmc1_vcc_en_pin_t004>;
 		regulator-name = "vmmc1";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
@@ -86,8 +84,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp152: pmic@30 {
@@ -100,8 +96,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_t004>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -109,8 +103,6 @@ 
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vmmc1>;
 	bus-width = <4>;
 	non-removable;
@@ -127,24 +119,7 @@ 
 };
 
 &pio {
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG12";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	mmc0_cd_pin_t004: mmc0_cd_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	mmc1_vcc_en_pin_t004: mmc1_vcc_en_pin@0 {
-		pins = "PB18";
-		function = "gpio_out";
-	};
-
-	led_pins_t004: led_pins@0 {
+	led_pins_t004: led-pin {
 		pins = "PB2";
 		function = "gpio_out";
 		drive-strength = <20>;
@@ -158,7 +133,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
@@ -168,9 +143,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+	usb0_id_det-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
 };
diff --git a/arch/arm/dts/sun5i-a10s-mk802.dts b/arch/arm/dts/sun5i-a10s-mk802.dts
index dd7fd5c3d7..d0219404c2 100644
--- a/arch/arm/dts/sun5i-a10s-mk802.dts
+++ b/arch/arm/dts/sun5i-a10s-mk802.dts
@@ -59,10 +59,8 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_mk802>;
 
-		red {
+		led {
 			label = "mk802:red:usr";
 			gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
 		};
@@ -74,8 +72,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp152: pmic@30 {
@@ -88,8 +84,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mk802>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -97,8 +91,6 @@ 
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	non-removable;
@@ -113,33 +105,14 @@ 
 	status = "okay";
 };
 
-&pio {
-	led_pins_mk802: led_pins@0 {
-		pins = "PB2";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_mk802: mmc0_cd_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb1_vbus_pin_mk802: usb1_vbus_pin@0 {
-		pins = "PB10";
-		function = "gpio_out";
-	};
-};
-
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_mk802>;
 	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
index 2c902ed2c8..5832bb31fc 100644
--- a/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a10s-olinuxino-micro.dts
@@ -79,7 +79,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_olinuxino>;
 
-		green {
+		led {
 			label = "a10s-olinuxino-micro:green:usr";
 			gpios = <&pio 4 3 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -97,8 +97,8 @@ 
 
 &emac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&emac_pins_b>;
-	phy = <&phy1>;
+	pinctrl-0 = <&emac_pa_pins>;
+	phy-handle = <&phy1>;
 	status = "okay";
 };
 
@@ -117,8 +117,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp152: pmic@30 {
@@ -130,11 +128,9 @@ 
 #include "axp152.dtsi"
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
-	at24@50 {
+	eeprom@50 {
 		compatible = "atmel,24c16";
 		pagesize = <16>;
 		reg = <0x50>;
@@ -143,8 +139,6 @@ 
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 };
 
@@ -152,35 +146,35 @@ 
 	vref-supply = <&reg_vcc3v0>;
 	status = "okay";
 
-	button@191 {
+	button-191 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <191274>;
 	};
 
-	button@392 {
+	button-392 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
 		voltage = <392644>;
 	};
 
-	button@601 {
+	button-601 {
 		label = "Menu";
 		linux,code = <KEY_MENU>;
 		channel = <0>;
 		voltage = <601151>;
 	};
 
-	button@795 {
+	button-795 {
 		label = "Enter";
 		linux,code = <KEY_ENTER>;
 		channel = <0>;
 		voltage = <795090>;
 	};
 
-	button@987 {
+	button-987 {
 		label = "Home";
 		linux,code = <KEY_HOMEPAGE>;
 		channel = <0>;
@@ -197,8 +191,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -206,8 +198,6 @@ 
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */
@@ -223,34 +213,11 @@ 
 };
 
 &pio {
-	mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 {
-		pins = "PG13";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_olinuxino: led_pins@0 {
+	led_pins_olinuxino: led-pin {
 		pins = "PE3";
 		function = "gpio_out";
 		drive-strength = <20>;
 	};
-
-	usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 {
-		pins = "PB10";
-		function = "gpio_out";
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG12";
-		function = "gpio_in";
-		bias-pull-up;
-	};
 };
 
 &reg_usb0_vbus {
@@ -259,15 +226,14 @@ 
 };
 
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_olinuxino_m>;
 	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &spi2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&spi2_pins_b>,
-		    <&spi2_cs0_pins_b>;
+	pinctrl-0 = <&spi2_pb_pins>,
+		    <&spi2_cs0_pb_pin>;
 	status = "okay";
 };
 
@@ -277,19 +243,19 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
 &uart2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_pins_b>;
+	pinctrl-0 = <&uart2_pc_pins>;
 	status = "okay";
 };
 
 &uart3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_pins_a>;
+	pinctrl-0 = <&uart3_pg_pins>;
 	status = "okay";
 };
 
@@ -299,9 +265,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+	usb0_id_det-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
diff --git a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
index 034853d1c0..964360f061 100644
--- a/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
+++ b/arch/arm/dts/sun5i-a10s-r7-tv-dongle.dts
@@ -63,7 +63,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_r7>;
 
-		green {
+		led {
 			label = "r7-tv-dongle:green:usr";
 			gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -76,8 +76,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */
@@ -85,8 +83,6 @@ 
 };
 
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	non-removable;
@@ -98,33 +94,21 @@ 
 };
 
 &pio {
-	mmc0_cd_pin_r7: mmc0_cd_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_r7: led_pins@0 {
+	led_pins_r7: led-pin {
 		pins = "PB2";
 		function = "gpio_out";
 		drive-strength = <20>;
 	};
-
-	usb1_vbus_pin_r7: usb1_vbus_pin@0 {
-		pins = "PG13";
-		function = "gpio_out";
-	};
 };
 
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_r7>;
 	gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun5i-a10s-wobo-i5.dts b/arch/arm/dts/sun5i-a10s-wobo-i5.dts
index 3f68ef5d92..ef8baa9926 100644
--- a/arch/arm/dts/sun5i-a10s-wobo-i5.dts
+++ b/arch/arm/dts/sun5i-a10s-wobo-i5.dts
@@ -61,10 +61,8 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_wobo_i5>;
 
-		blue {
+		led {
 			label = "a10s-wobo-i5:blue:usr";
 			gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -73,8 +71,6 @@ 
 
 	reg_emac_3v3: emac-3v3 {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&emac_power_pin_wobo>;
 		regulator-name = "emac-3v3";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
@@ -94,8 +90,8 @@ 
 
 &emac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&emac_pins_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&emac_pd_pins>;
+	phy-handle = <&phy1>;
 	status = "okay";
 };
 
@@ -104,8 +100,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -126,8 +120,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_wobo_i5>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */
@@ -142,24 +134,6 @@ 
 	status = "okay";
 };
 
-&pio {
-	led_pins_wobo_i5: led_pins@0 {
-		pins = "PB2";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_wobo_i5: mmc0_cd_pin@0 {
-		pins = "PB3";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	emac_power_pin_wobo: emac_power_pin@0 {
-		pins = "PA02";
-		function = "gpio_out";
-	};
-};
-
 &reg_dcdc2 {
 	regulator-always-on;
 	regulator-min-microvolt = <1000000>;
@@ -206,7 +180,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun5i-a10s.dtsi b/arch/arm/dts/sun5i-a10s.dtsi
index 316cb8b294..09c486b608 100644
--- a/arch/arm/dts/sun5i-a10s.dtsi
+++ b/arch/arm/dts/sun5i-a10s.dtsi
@@ -42,15 +42,11 @@ 
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
 #include "sun5i.dtsi"
 
 #include <dt-bindings/dma/sun4i-a10.h>
 
 / {
-	interrupt-parent = <&intc>;
-
 	aliases {
 		ethernet0 = &emac;
 	};
@@ -60,7 +56,7 @@ 
 		#size-cells = <1>;
 		ranges;
 
-		framebuffer@2 {
+		framebuffer-lcd0-hdmi {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0-hdmi";
@@ -76,7 +72,7 @@ 
 		allwinner,pipelines = <&fe0>;
 	};
 
-	soc@1c00000 {
+	soc {
 		hdmi: hdmi@1c16000 {
 			compatible = "allwinner,sun5i-a10s-hdmi";
 			reg = <0x01c16000 0x1000>;
@@ -104,8 +100,6 @@ 
 				};
 
 				hdmi_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <1>;
 				};
 			};
@@ -125,20 +119,25 @@ 
 	compatible = "allwinner,sun5i-a10s-ccu";
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+};
+
 &pio {
 	compatible = "allwinner,sun5i-a10s-pinctrl";
 
-	uart0_pins_a: uart0@0 {
+	uart0_pb_pins: uart0-pb-pins {
 		pins = "PB19", "PB20";
 		function = "uart0";
 	};
 
-	uart2_pins_b: uart2@1 {
+	uart2_pc_pins: uart2-pc-pins {
 		pins = "PC18", "PC19";
 		function = "uart2";
 	};
 
-	emac_pins_b: emac0@1 {
+	emac_pa_pins: emac-pa-pins {
 		pins = "PA0", "PA1", "PA2",
 				"PA3", "PA4", "PA5", "PA6",
 				"PA7", "PA8", "PA9", "PA10",
@@ -147,27 +146,24 @@ 
 		function = "emac";
 	};
 
-	mmc1_pins_a: mmc1@0 {
+	mmc1_pins: mmc1-pins {
 		pins = "PG3", "PG4", "PG5",
 				 "PG6", "PG7", "PG8";
 		function = "mmc1";
 		drive-strength = <30>;
 	};
 
-	spi2_pins_b: spi2@1 {
+	spi2_pb_pins: spi2-pb-pins {
 		pins = "PB12", "PB13", "PB14";
 		function = "spi2";
 	};
 
-	spi2_cs0_pins_b: spi2_cs0@1 {
+	spi2_cs0_pb_pin: spi2-cs0-pb-pin {
 		pins = "PB11";
 		function = "spi2";
 	};
 };
 
-&sram_a {
-};
-
 &tcon0_out {
 	tcon0_out_hdmi: endpoint@2 {
 		reg = <2>;
diff --git a/arch/arm/dts/sun5i-a13-ampe-a76.dts b/arch/arm/dts/sun5i-a13-ampe-a76.dts
index 1bf88816c3..7bc35329a5 100644
--- a/arch/arm/dts/sun5i-a13-ampe-a76.dts
+++ b/arch/arm/dts/sun5i-a13-ampe-a76.dts
@@ -23,6 +23,6 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
diff --git a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
index 378214d831..d059388d72 100644
--- a/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
+++ b/arch/arm/dts/sun5i-a13-empire-electronix-d709.dts
@@ -61,6 +61,7 @@ 
 		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
 		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
 		default-brightness-level = <8>;
+		power-supply = <&reg_vcc3v3>;
 		/* TODO: backlight uses axp gpio1 as enable pin */
 	};
 
@@ -78,8 +79,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -91,8 +90,6 @@ 
 #include "axp209.dtsi"
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
 	pcf8563: rtc@51 {
@@ -105,14 +102,14 @@ 
 	vref-supply = <&reg_ldo2>;
 	status = "okay";
 
-	button@200 {
+	button-200 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <200000>;
 	};
 
-	button@400 {
+	button-400 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -121,8 +118,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_d709>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
@@ -133,29 +128,9 @@ 
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_d709: mmc0_cd_pin@0 {
-		pins = "PG0";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-down;
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &pwm {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pwm0_pins>;
+	pinctrl-0 = <&pwm0_pin>;
 	status = "okay";
 };
 
@@ -197,7 +172,7 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
@@ -207,10 +182,8 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
-	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_ldo3>;
 	status = "okay";
diff --git a/arch/arm/dts/sun5i-a13-hsg-h702.dts b/arch/arm/dts/sun5i-a13-hsg-h702.dts
index 7ee0c3f6d7..9b9f2a5748 100644
--- a/arch/arm/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/dts/sun5i-a13-hsg-h702.dts
@@ -69,8 +69,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -80,8 +78,6 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
 	pcf8563: rtc@51 {
@@ -91,8 +87,6 @@ 
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 };
 
@@ -100,14 +94,14 @@ 
 	vref-supply = <&reg_ldo2>;
 	status = "okay";
 
-	button@200 {
+	button-200 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <200000>;
 	};
 
-	button@400 {
+	button-400 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -116,8 +110,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
@@ -132,25 +124,6 @@ 
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_h702: mmc0_cd_pin@0 {
-		pins = "PG0";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-	};
-};
-
 #include "axp209.dtsi"
 
 &reg_dcdc2 {
@@ -191,7 +164,7 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
@@ -201,9 +174,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
-	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
 	usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_ldo3>;
diff --git a/arch/arm/dts/sun5i-a13-inet-86vs.dts b/arch/arm/dts/sun5i-a13-inet-86vs.dts
index aef733b3fe..9c43a34d99 100644
--- a/arch/arm/dts/sun5i-a13-inet-86vs.dts
+++ b/arch/arm/dts/sun5i-a13-inet-86vs.dts
@@ -23,6 +23,6 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
diff --git a/arch/arm/dts/sun5i-a13-licheepi-one.dts b/arch/arm/dts/sun5i-a13-licheepi-one.dts
new file mode 100644
index 0000000000..2ce361f8fe
--- /dev/null
+++ b/arch/arm/dts/sun5i-a13-licheepi-one.dts
@@ -0,0 +1,214 @@ 
+/*
+ * Copyright 2016 Icenowy Zheng <icenowy@aosc.xyz>
+ *
+ * Based on sun5i-a13-olinuxino.dts, which is
+ *   Copyright 2012 Maxime Ripard <maxime.ripard@free-electrons.com>
+ *   Copyright 2013 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Lichee Pi One";
+	compatible = "licheepi,licheepi-one", "allwinner,sun5i-a13";
+
+	aliases {
+		serial0 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led-0 {
+			label ="licheepi:red:usr";
+			gpios = <&pio 2 5 GPIO_ACTIVE_LOW>;
+		};
+
+		led-1 {
+			label ="licheepi:green:usr";
+			gpios = <&pio 2 19 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		led-2 {
+			label ="licheepi:blue:usr";
+			gpios = <&pio 2 4 GPIO_ACTIVE_LOW>;
+		};
+
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp209: pmic@34 {
+		compatible = "x-powers,axp209";
+		reg = <0x34>;
+		interrupts = <0>;
+
+		interrupt-controller;
+		#interrupt-cells = <1>;
+	};
+};
+
+&i2c1 {
+	status = "disabled";
+};
+
+&i2c2 {
+	status = "disabled";
+};
+
+&lradc {
+	vref-supply = <&reg_ldo2>;
+	status = "okay";
+
+	button-984 {
+		label = "Home";
+		linux,code = <KEY_HOMEPAGE>;
+		channel = <0>;
+		voltage = <984126>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	broken-cd;
+	status = "okay";
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_4bit_pc_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	broken-cd;
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&otg_sram {
+	status = "okay";
+};
+
+#include "axp209.dtsi"
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1500000>;
+	regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-name = "csi-1.8v";
+};
+
+&reg_ldo4 {
+	regulator-min-microvolt = <2800000>;
+	regulator-max-microvolt = <2800000>;
+	regulator-name = "csi-2.8v";
+};
+
+&reg_usb0_vbus {
+	gpio = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pg_pins>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_vbus-supply = <&reg_usb0_vbus>;
+	usb1_vbus-supply = <&reg_vcc5v0>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
index aa4b34fd91..bfe1075e62 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino-micro.dts
@@ -64,7 +64,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_olinuxinom>;
 
-		power {
+		led {
 			label = "a13-olinuxino-micro:green:power";
 			gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -77,26 +77,18 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
@@ -112,56 +104,26 @@ 
 };
 
 &pio {
-	mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 {
-		pins = "PG0";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_olinuxinom: led_pins@0 {
+	led_pins_olinuxinom: led-pin {
 		pins = "PG9";
 		function = "gpio_out";
 		drive-strength = <20>;
 	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-down;
-	};
-
-	usb0_vbus_pin_olinuxinom: usb0_vbus_pin@0 {
-		pins = "PG12";
-		function = "gpio_out";
-	};
-
-	usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 {
-		pins = "PG11";
-		function = "gpio_out";
-	};
 };
 
 &reg_usb0_vbus {
-	pinctrl-0 = <&usb0_vbus_pin_olinuxinom>;
 	gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_olinuxinom>;
 	gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
@@ -171,10 +133,8 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
-	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
diff --git a/arch/arm/dts/sun5i-a13-olinuxino.dts b/arch/arm/dts/sun5i-a13-olinuxino.dts
index 437ad913a3..fadeae3cd8 100644
--- a/arch/arm/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/dts/sun5i-a13-olinuxino.dts
@@ -66,7 +66,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pins_olinuxino>;
 
-		power {
+		led {
 			gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
 		};
@@ -74,8 +74,6 @@ 
 
 	bridge {
 		compatible = "dumb-vga-dac";
-		#address-cells = <1>;
-		#size-cells = <0>;
 
 		ports {
 			#address-cells = <1>;
@@ -123,8 +121,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -138,14 +134,10 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 };
 
@@ -153,35 +145,35 @@ 
 	vref-supply = <&reg_vcc3v0>;
 	status = "okay";
 
-	button@191 {
+	button-191 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <191274>;
 	};
 
-	button@392 {
+	button-392 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
 		voltage = <392644>;
 	};
 
-	button@601 {
+	button-601 {
 		label = "Menu";
 		linux,code = <KEY_MENU>;
 		channel = <0>;
 		voltage = <601151>;
 	};
 
-	button@795 {
+	button-795 {
 		label = "Enter";
 		linux,code = <KEY_ENTER>;
 		channel = <0>;
 		voltage = <795090>;
 	};
 
-	button@987 {
+	button-987 {
 		label = "Home";
 		linux,code = <KEY_HOMEPAGE>;
 		channel = <0>;
@@ -190,8 +182,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
@@ -207,34 +197,11 @@ 
 };
 
 &pio {
-	mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 {
-		pins = "PG0";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_olinuxino: led_pins@0 {
+	led_pins_olinuxino: led-pin {
 		pins = "PG9";
 		function = "gpio_out";
 		drive-strength = <20>;
 	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-down;
-	};
-
-	usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 {
-		pins = "PG11";
-		function = "gpio_out";
-	};
 };
 
 &reg_usb0_vbus {
@@ -243,7 +210,6 @@ 
 };
 
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_olinuxino>;
 	gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
@@ -263,7 +229,7 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
@@ -273,10 +239,8 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
-	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 	status = "okay";
diff --git a/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts b/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts
new file mode 100644
index 0000000000..d60407772e
--- /dev/null
+++ b/arch/arm/dts/sun5i-a13-pocketbook-touch-lux-3.dts
@@ -0,0 +1,258 @@ 
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright 2019 Ondrej Jirman <megous@megous.com>
+ */
+
+/dts-v1/;
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+	model = "PocketBook Touch Lux 3";
+	compatible = "pocketbook,touch-lux-3", "allwinner,sun5i-a13";
+
+	aliases {
+		serial0 = &uart1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+	};
+
+	backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+		enable-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
+		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+		default-brightness-level = <8>;
+		power-supply = <&reg_vcc3v3>;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led {
+			gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */
+			default-state = "on";
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		autorepeat;
+		label = "GPIO Keys";
+
+		key-right {
+			label = "Right";
+			linux,code = <KEY_RIGHT>;
+			gpios = <&pio 6 9 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PG9 */
+		};
+
+		key-left {
+			label = "Left";
+			linux,code = <KEY_LEFT>;
+			gpios = <&pio 6 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PG10 */
+		};
+	};
+
+	reg_1v8: regulator-1v8 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-1v8-nor-ctp";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&pio 2 15 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_1v8_nor: regulator-nor {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-nor";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&pio 2 14 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&reg_1v8>;
+		regulator-always-on;
+	};
+
+	reg_1v8_ctp: regulator-ctp {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-ctp";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		gpio = <&pio 2 13 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&reg_1v8>;
+	};
+
+	reg_3v3_mmc0: regulator-mmc0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd-mmc0";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pio 4 4 GPIO_ACTIVE_LOW>; /* PE4 */
+		vin-supply = <&reg_vcc3v3>;
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&reg_dcdc2>;
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp209: pmic@34 {
+		reg = <0x34>;
+		interrupts = <0>;
+	};
+};
+
+#include "axp209.dtsi"
+
+&i2c1 {
+	status = "okay";
+
+	pcf8563: rtc@51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+
+	/* Touchpanel is connected here. */
+};
+
+&lradc {
+	vref-supply = <&reg_ldo2>;
+	status = "okay";
+
+	button-200 {
+		label = "Home";
+		linux,code = <KEY_HOME>;
+		channel = <0>;
+		voltage = <200000>;
+	};
+
+	button-400 {
+		label = "Menu";
+		linux,code = <KEY_MENU>;
+		channel = <0>;
+		voltage = <400000>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_3v3_mmc0>;
+	bus-width = <4>;
+	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
+	status = "okay";
+};
+
+&mmc2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc2_4bit_pc_pins>;
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&otg_sram {
+	status = "okay";
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_pin>;
+	status = "okay";
+};
+
+&reg_dcdc2 {
+	regulator-always-on;
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+	regulator-always-on;
+	regulator-min-microvolt = <1200000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-name = "vdd-int-pll";
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-always-on;
+	regulator-min-microvolt = <3000000>;
+	regulator-max-microvolt = <3000000>;
+	regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "vcc-wifi";
+	/* We need this otherwise the LDO3 would overload */
+	regulator-soft-start;
+	regulator-ramp-delay = <1600>;
+};
+
+&spi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi2_pe_pins>, <&spi2_cs0_pe_pin>;
+	status = "okay";
+
+	epd_flash: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "macronix,mx25u4033", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <4000000>;
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pg_pins>;
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "peripheral";
+	status = "okay";
+};
+
+&battery_power_supply {
+	status = "okay";
+};
+
+&usb_power_supply {
+	status = "okay";
+};
+
+&usbphy {
+	usb1_vbus-supply = <&reg_ldo3>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun5i-a13-q8-tablet.dts b/arch/arm/dts/sun5i-a13-q8-tablet.dts
index a89f29fa3e..f9fc1c8b60 100644
--- a/arch/arm/dts/sun5i-a13-q8-tablet.dts
+++ b/arch/arm/dts/sun5i-a13-q8-tablet.dts
@@ -49,19 +49,13 @@ 
 	compatible = "allwinner,q8-a13", "allwinner,sun5i-a13";
 
 	panel: panel {
-		compatible = "urt,umsh-8596md-t", "simple-panel";
-		#address-cells = <1>;
-		#size-cells = <0>;
+		compatible = "bananapi,s070wv20-ct16";
+		power-supply = <&reg_vcc3v3>;
+		enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
+		backlight = <&backlight>;
 
-		port@0 {
-			reg = <0>;
-			/* TODO: lcd panel uses axp gpio0 as enable pin */
-			backlight = <&backlight>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			panel_input: endpoint@0 {
-				reg = <0>;
+		port {
+			panel_input: endpoint {
 				remote-endpoint = <&tcon0_out_lcd>;
 			};
 		};
diff --git a/arch/arm/dts/sun5i-a13-utoo-p66.dts b/arch/arm/dts/sun5i-a13-utoo-p66.dts
index bfdd38d6bf..be486d28d0 100644
--- a/arch/arm/dts/sun5i-a13-utoo-p66.dts
+++ b/arch/arm/dts/sun5i-a13-utoo-p66.dts
@@ -58,13 +58,11 @@ 
 		/delete-property/stdout-path;
 	};
 
-	i2c_lcd: i2c@0 {
+	i2c_lcd: i2c {
 		/* The lcd panel i2c interface is hooked up via gpios */
 		compatible = "i2c-gpio";
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2c_lcd_pins>;
-		gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>, /* PG12, sda */
-			<&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10, scl */
+		sda-gpios = <&pio 6 12 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG12 */
+		scl-gpios = <&pio 6 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG10 */
 		i2c-gpio,delay-us = <5>;
 	};
 };
@@ -79,13 +77,9 @@ 
 	allwinner,pa-gpios = <&pio 6 3 GPIO_ACTIVE_HIGH>; /* PG3 */
 };
 
-&codec_pa_pin {
-	pins = "PG3";
-};
-
 &mmc2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_a>;
+	pinctrl-0 = <&mmc2_8bit_pins>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <8>;
 	non-removable;
@@ -98,14 +92,6 @@ 
 	};
 };
 
-&pio {
-	i2c_lcd_pins: i2c_lcd_pin@0 {
-		pins = "PG10", "PG12";
-		function = "gpio_out";
-		bias-pull-up;
-	};
-};
-
 &reg_usb0_vbus {
 	gpio = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */
 };
@@ -128,7 +114,3 @@ 
 	/* The P66 uses the uart pins as gpios */
 	status = "disabled";
 };
-
-&usb0_vbus_pin_a {
-	pins = "PB4";
-};
diff --git a/arch/arm/dts/sun5i-a13.dtsi b/arch/arm/dts/sun5i-a13.dtsi
index b1d8277655..3325ab0709 100644
--- a/arch/arm/dts/sun5i-a13.dtsi
+++ b/arch/arm/dts/sun5i-a13.dtsi
@@ -42,17 +42,13 @@ 
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
 #include "sun5i.dtsi"
 
 #include <dt-bindings/thermal/thermal.h>
 
 / {
-	interrupt-parent = <&intc>;
-
 	thermal-zones {
-		cpu_thermal {
+		cpu-thermal {
 			/* milliseconds */
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
@@ -88,7 +84,7 @@ 
 		allwinner,pipelines = <&fe0>;
 	};
 
-	soc@1c00000 {
+	soc {
 		pwm: pwm@1c20e00 {
 			compatible = "allwinner,sun5i-a13-pwm";
 			reg = <0x01c20e00 0xc>;
@@ -106,15 +102,14 @@ 
 
 &cpu0 {
 	clock-latency = <244144>; /* 8 32k periods */
-	operating-points = <
+	operating-points =
 		/* kHz	  uV */
-		1008000 1400000
-		912000	1350000
-		864000	1300000
-		624000	1200000
-		576000	1200000
-		432000	1200000
-		>;
+		<1008000 1400000>,
+		<912000 1350000>,
+		<864000 1300000>,
+		<624000 1200000>,
+		<576000 1200000>,
+		<432000 1200000>;
 	#cooling-cells = <2>;
 };
 
diff --git a/arch/arm/dts/sun5i-gr8-chip-pro.dts b/arch/arm/dts/sun5i-gr8-chip-pro.dts
index c55b11a4d3..a32cde3e32 100644
--- a/arch/arm/dts/sun5i-gr8-chip-pro.dts
+++ b/arch/arm/dts/sun5i-gr8-chip-pro.dts
@@ -79,8 +79,6 @@ 
 
 	mmc0_pwrseq: mmc0_pwrseq {
 		compatible = "mmc-pwrseq-simple";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_reg_on_pin_chip_pro>;
 		reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
 	};
 };
@@ -94,8 +92,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -114,20 +110,16 @@ 
 #include "axp209.dtsi"
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "disabled";
 };
 
 &i2s0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>;
+	pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>;
 	status = "disabled";
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	mmc-pwrseq = <&mmc0_pwrseq>;
 	bus-width = <4>;
@@ -137,12 +129,10 @@ 
 
 &nfc {
 	pinctrl-names = "default";
-	pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>;
+	pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
 	status = "okay";
 
 	nand@0 {
-		#address-cells = <2>;
-		#size-cells = <2>;
 		reg = <0>;
 		allwinner,rb = <0>;
 		nand-ecc-mode = "hw";
@@ -157,21 +147,9 @@ 
 	status = "okay";
 };
 
-&pio {
-	usb0_id_pin_chip_pro: usb0-id-pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-	};
-
-	wifi_reg_on_pin_chip_pro: wifi-reg-on-pin@0 {
-		pins = "PB10";
-		function = "gpio_out";
-	};
-};
-
 &pwm {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
+	pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>;
 	status = "disabled";
 };
 
@@ -220,19 +198,19 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
+	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>;
 	status = "okay";
 };
 
 &uart2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart2_pins_a>, <&uart2_cts_rts_pins_a>;
+	pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>;
 	status = "disabled";
 };
 
 &uart3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_pins_a>, <&uart3_cts_rts_pins_a>;
+	pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>;
 	status = "okay";
 };
 
@@ -253,9 +231,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_pin_chip_pro>;
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb1_vbus-supply = <&reg_vcc5v0>;
 	status = "okay";
diff --git a/arch/arm/dts/sun5i-gr8-evb.dts b/arch/arm/dts/sun5i-gr8-evb.dts
new file mode 100644
index 0000000000..f4fe258ef0
--- /dev/null
+++ b/arch/arm/dts/sun5i-gr8-evb.dts
@@ -0,0 +1,333 @@ 
+/*
+ * Copyright 2016 Free Electrons
+ * Copyright 2016 NextThing Co
+ *
+ * Mylène Josserand <mylene.josserand@free-electrons.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun5i-gr8.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	model = "NextThing GR8-EVB";
+	compatible = "nextthing,gr8-evb", "nextthing,gr8";
+
+	aliases {
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		serial0 = &uart1;
+		serial1 = &uart2;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm 0 10000 0>;
+		enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
+		power-supply = <&reg_vcc3v3>;
+		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+		default-brightness-level = <8>;
+	};
+
+	sound-analog {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "gr8-evb-wm8978";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <512>;
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s0>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&wm8978>;
+		};
+	};
+
+	sound-spdif {
+		compatible = "simple-audio-card";
+		simple-audio-card,name = "On-board SPDIF";
+
+		simple-audio-card,cpu {
+			sound-dai = <&spdif>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&spdif_out>;
+		};
+	};
+
+	spdif_out: spdif-out {
+		#sound-dai-cells = <0>;
+		compatible = "linux,spdif-dit";
+	};
+};
+
+&be0 {
+	status = "okay";
+};
+
+&codec {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+
+	axp209: pmic@34 {
+		reg = <0x34>;
+
+		/*
+		* The interrupt is routed through the "External Fast
+		* Interrupt Request" pin (ball G13 of the module)
+		* directly to the main interrupt controller, without
+		* any other controller interfering.
+		*/
+		interrupts = <0>;
+	};
+};
+
+#include "axp209.dtsi"
+
+&i2c1 {
+	status = "okay";
+
+	wm8978: codec@1a {
+		#sound-dai-cells = <0>;
+		compatible = "wlf,wm8978";
+		reg = <0x1a>;
+	};
+
+	pcf8563: rtc@51 {
+		compatible = "nxp,pcf8563";
+		reg = <0x51>;
+	};
+};
+
+&i2c2 {
+	status = "okay";
+};
+
+&i2s0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>;
+	status = "okay";
+};
+
+&ir0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&ir0_rx_pin>;
+	status = "okay";
+};
+
+&lradc {
+	vref-supply = <&reg_ldo2>;
+	status = "okay";
+
+	button-190 {
+		label = "Volume Up";
+		linux,code = <KEY_VOLUMEUP>;
+		channel = <0>;
+		voltage = <190000>;
+	};
+
+	button-390 {
+		label = "Volume Down";
+		linux,code = <KEY_VOLUMEDOWN>;
+		channel = <0>;
+		voltage = <390000>;
+	};
+
+	button-600 {
+		label = "Menu";
+		linux,code = <KEY_MENU>;
+		channel = <0>;
+		voltage = <600000>;
+	};
+
+	button-800 {
+		label = "Search";
+		linux,code = <KEY_SEARCH>;
+		channel = <0>;
+		voltage = <800000>;
+	};
+
+	button-980 {
+		label = "Home";
+		linux,code = <KEY_HOMEPAGE>;
+		channel = <0>;
+		voltage = <980000>;
+	};
+
+	button-1180 {
+		label = "Esc";
+		linux,code = <KEY_ESC>;
+		channel = <0>;
+		voltage = <1180000>;
+	};
+
+	button-1400 {
+		label = "Enter";
+		linux,code = <KEY_ENTER>;
+		channel = <0>;
+		voltage = <1400000>;
+	};
+};
+
+&mmc0 {
+	vmmc-supply = <&reg_vcc3v3>;
+	bus-width = <4>;
+	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
+	status = "okay";
+};
+
+&nfc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
+
+	/* MLC Support sucks for now */
+	status = "disabled";
+};
+
+&ohci0 {
+	status = "okay";
+};
+
+&otg_sram {
+	status = "okay";
+};
+
+&pwm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pwm0_pin>;
+	status = "okay";
+};
+
+&reg_dcdc2 {
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1400000>;
+	regulator-name = "vdd-cpu";
+	regulator-always-on;
+};
+
+&reg_dcdc3 {
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1300000>;
+	regulator-name = "vdd-sys";
+	regulator-always-on;
+};
+
+&reg_ldo1 {
+	regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+	regulator-min-microvolt = <2700000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-name = "avcc";
+	regulator-always-on;
+};
+
+&reg_usb1_vbus {
+	gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
+&rtp {
+	allwinner,ts-attached;
+};
+
+&spdif {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spdif_tx_pin>;
+	status = "okay";
+};
+
+&tve0 {
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>;
+	status = "okay";
+};
+
+&usb_otg {
+	/*
+	 * The GR8-EVB has a somewhat interesting design. There's a
+	 * pin supposed to control VBUS, an ID pin, a VBUS detect pin,
+	 * so everything should work just fine.
+	 *
+	 * Except that the pin supposed to control VBUS is not
+	 * connected to any controllable output, neither to the SoC
+	 * through a GPIO or to the PMIC, and it is pulled down,
+	 * meaning that we will never be able to enable VBUS on this
+	 * board.
+	 */
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usb_power_supply {
+	status = "okay";
+};
+
+&usbphy {
+	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_vbus_power-supply = <&usb_power_supply>;
+	usb1_vbus-supply = <&reg_usb1_vbus>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun5i-gr8.dtsi b/arch/arm/dts/sun5i-gr8.dtsi
index ef0b7446a9..98a8fd5e89 100644
--- a/arch/arm/dts/sun5i-gr8.dtsi
+++ b/arch/arm/dts/sun5i-gr8.dtsi
@@ -54,7 +54,7 @@ 
 		allwinner,pipelines = <&fe0>;
 	};
 
-	soc@1c00000 {
+	soc {
 		pwm: pwm@1c20e00 {
 			compatible = "allwinner,sun5i-a10s-pwm";
 			reg = <0x01c20e00 0xc>;
@@ -98,28 +98,28 @@ 
 &pio {
 	compatible = "nextthing,gr8-pinctrl";
 
-	i2s0_data_pins_a: i2s0-data@0 {
+	i2s0_data_pins: i2s0-data-pins {
 		pins = "PB6", "PB7", "PB8", "PB9";
 		function = "i2s0";
 	};
 
-	i2s0_mclk_pins_a: i2s0-mclk@0 {
+	i2s0_mclk_pin: i2s0-mclk-pin {
 		pins = "PB5";
 		function = "i2s0";
 	};
 
-	pwm1_pins: pwm1 {
+	pwm1_pins: pwm1-pin {
 		pins = "PG13";
 		function = "pwm1";
 	};
 
-	spdif_tx_pins_a: spdif@0 {
+	spdif_tx_pin: spdif-tx-pin {
 		pins = "PB10";
 		function = "spdif";
 		bias-pull-up;
 	};
 
-	uart1_cts_rts_pins_a: uart1-cts-rts@0 {
+	uart1_cts_rts_pins: uart1-cts-rts-pins {
 		pins = "PG5", "PG6";
 		function = "uart1";
 	};
diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts
index 879a4b0f3b..4bf4943d4e 100644
--- a/arch/arm/dts/sun5i-r8-chip.dts
+++ b/arch/arm/dts/sun5i-r8-chip.dts
@@ -79,16 +79,12 @@ 
 
 	mmc0_pwrseq: mmc0_pwrseq {
 		compatible = "mmc-pwrseq-simple";
-		pinctrl-names = "default";
-		pinctrl-0 = <&chip_wifi_reg_on_pin>;
 		reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
 	};
 
 	onewire {
 		compatible = "w1-gpio";
-		gpios = <&pio 3 2 GPIO_ACTIVE_HIGH>; /* PD2 */
-		pinctrl-names = "default";
-		pinctrl-0 = <&chip_w1_pin>;
+		gpios = <&pio 3 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PD2 */
 	};
 };
 
@@ -109,8 +105,6 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 
 	axp209: pmic@34 {
@@ -137,14 +131,10 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "disabled";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 
 	xio: gpio@38 {
@@ -161,13 +151,11 @@ 
 	};
 };
 
-&mmc0_pins_a {
+&mmc0_pins {
 	bias-pull-up;
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>;
 	vmmc-supply = <&reg_vcc3v3>;
 	mmc-pwrseq = <&mmc0_pwrseq>;
 	bus-width = <4>;
@@ -183,29 +171,6 @@ 
 	status = "okay";
 };
 
-&pio {
-	chip_vbus_pin: chip_vbus_pin@0 {
-		pins = "PB10";
-		function = "gpio_out";
-	};
-
-	chip_wifi_reg_on_pin: chip_wifi_reg_on_pin@0 {
-	        pins = "PC19";
-	        function = "gpio_out";
-	};
-
-	chip_id_det_pin: chip_id_det_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-	};
-
-	chip_w1_pin: chip_w1_pin@0 {
-		pins = "PD2";
-		function = "gpio_in";
-	        bias-pull-up;
-	};
-};
-
 &reg_dcdc2 {
 	regulator-min-microvolt = <1000000>;
 	regulator-max-microvolt = <1400000>;
@@ -260,7 +225,6 @@ 
 };
 
 &reg_usb0_vbus {
-	pinctrl-0 = <&chip_vbus_pin>;
 	vin-supply = <&reg_vcc5v0>;
 	gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
 	status = "okay";
@@ -268,7 +232,7 @@ 
 
 &spi2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&spi2_pins_a>;
+	pinctrl-0 = <&spi2_pe_pins>;
 	status = "disabled";
 };
 
@@ -282,14 +246,14 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
 &uart3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart3_pins_a>,
-		    <&uart3_cts_rts_pins_a>;
+	pinctrl-0 = <&uart3_pg_pins>,
+		    <&uart3_cts_rts_pg_pins>;
 	status = "okay";
 };
 
@@ -303,11 +267,9 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&chip_id_det_pin>;
 	status = "okay";
 
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
+	usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_vcc5v0>;
diff --git a/arch/arm/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/dts/sun5i-reference-design-tablet.dtsi
index 8acbaab14f..6847f66699 100644
--- a/arch/arm/dts/sun5i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun5i-reference-design-tablet.dtsi
@@ -54,7 +54,8 @@ 
 		pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
 		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
 		default-brightness-level = <8>;
-		/* TODO: backlight uses axp gpio1 as enable pin */
+		enable-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>; /* AXP GPIO1 */
+		power-supply = <&reg_vcc3v0>;
 	};
 
 	chosen {
@@ -63,8 +64,6 @@ 
 };
 
 &codec {
-	pinctrl-names = "default";
-	pinctrl-0 = <&codec_pa_pin>;
 	allwinner,pa-gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */
 	status = "okay";
 };
@@ -92,11 +91,10 @@ 
 	 */
 	clock-frequency = <400000>;
 
-	touchscreen: touchscreen {
+	touchscreen: touchscreen@40 {
+		reg = <0x40>;
 		interrupt-parent = <&pio>;
 		interrupts = <6 11 IRQ_TYPE_EDGE_FALLING>; /* EINT11 (PG11) */
-		pinctrl-names = "default";
-		pinctrl-0 = <&ts_power_pin>;
 		power-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
 		/* Tablet dts must provide reg and compatible */
 		status = "disabled";
@@ -124,7 +122,7 @@ 
 
 &mmc0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_vcc3v0>;
 	bus-width = <4>;
 	cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
@@ -135,43 +133,6 @@ 
 	status = "okay";
 };
 
-&pio {
-	codec_pa_pin: codec_pa_pin@0 {
-		pins = "PG10";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin: mmc0_cd_pin@0 {
-		pins = "PG0";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	ts_power_pin: ts_power_pin {
-		pins = "PB3";
-		function = "gpio_out";
-		drive-strength = <10>;
-		bias-disable;
-	};
-
-	usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
-		pins = "PG1";
-		function = "gpio_in";
-		bias-pull-down;
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PG2";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_vbus_pin_a: usb0_vbus_pin@0 {
-		pins = "PG12";
-		function = "gpio_out";
-	};
-};
-
 &reg_dcdc2 {
 	regulator-always-on;
 	regulator-min-microvolt = <1000000>;
@@ -210,7 +171,7 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_b>;
+	pinctrl-0 = <&uart1_pg_pins>;
 	status = "okay";
 };
 
@@ -224,10 +185,8 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
-	usb0_id_det-gpio = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
-	usb0_vbus_det-gpio = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
+	usb0_id_det-gpios = <&pio 6 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PG2 */
+	usb0_vbus_det-gpios = <&pio 6 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* PG1 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_usb0_vbus>;
 	usb1_vbus-supply = <&reg_ldo3>;
diff --git a/arch/arm/dts/sun5i.dtsi b/arch/arm/dts/sun5i.dtsi
index 07f2248ed5..250d6b87ab 100644
--- a/arch/arm/dts/sun5i.dtsi
+++ b/arch/arm/dts/sun5i.dtsi
@@ -42,14 +42,14 @@ 
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
 #include <dt-bindings/clock/sun5i-ccu.h>
 #include <dt-bindings/dma/sun4i-a10.h>
 #include <dt-bindings/reset/sun5i-ccu.h>
 
 / {
 	interrupt-parent = <&intc>;
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	cpus {
 		#address-cells = <1>;
@@ -68,7 +68,7 @@ 
 		#size-cells = <1>;
 		ranges;
 
-		framebuffer@0 {
+		framebuffer-lcd0 {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0";
@@ -77,7 +77,7 @@ 
 			status = "disabled";
 		};
 
-		framebuffer@1 {
+		framebuffer-lcd0-tve0 {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0-tve0";
@@ -93,14 +93,14 @@ 
 		#size-cells = <1>;
 		ranges;
 
-		osc24M: clk@1c20050 {
+		osc24M: clk-24M {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <24000000>;
 			clock-output-names = "osc24M";
 		};
 
-		osc32k: clk@0 {
+		osc32k: clk-32k {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <32768>;
@@ -108,14 +108,30 @@ 
 		};
 	};
 
-	soc@1c00000 {
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		/* Address must be kept in the lower 256 MiBs of DRAM for VE. */
+		default-pool {
+			compatible = "shared-dma-pool";
+			size = <0x6000000>;
+			alloc-ranges = <0x40000000 0x10000000>;
+			reusable;
+			linux,cma-default;
+		};
+	};
+
+	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
+		dma-ranges;
 		ranges;
 
-		sram-controller@1c00000 {
-			compatible = "allwinner,sun4i-a10-sram-controller";
+		system-control@1c00000 {
+			compatible = "allwinner,sun5i-a13-system-control";
 			reg = <0x01c00000 0x30>;
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -127,12 +143,13 @@ 
 				#address-cells = <1>;
 				#size-cells = <1>;
 				ranges = <0 0x00000000 0xc000>;
-			};
 
-			emac_sram: sram-section@8000 {
-				compatible = "allwinner,sun4i-a10-sram-a3-a4";
-				reg = <0x8000 0x4000>;
-				status = "disabled";
+				emac_sram: sram-section@8000 {
+					compatible = "allwinner,sun5i-a13-sram-a3-a4",
+						     "allwinner,sun4i-a10-sram-a3-a4";
+					reg = <0x8000 0x4000>;
+					status = "disabled";
+				};
 			};
 
 			sram_d: sram@10000 {
@@ -143,11 +160,36 @@ 
 				ranges = <0 0x00010000 0x1000>;
 
 				otg_sram: sram-section@0 {
-					compatible = "allwinner,sun4i-a10-sram-d";
+					compatible = "allwinner,sun5i-a13-sram-d",
+						     "allwinner,sun4i-a10-sram-d";
 					reg = <0x0000 0x1000>;
 					status = "disabled";
 				};
 			};
+
+			sram_c: sram@1d00000 {
+				compatible = "mmio-sram";
+				reg = <0x01d00000 0xd0000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x01d00000 0xd0000>;
+
+				ve_sram: sram-section@0 {
+					compatible = "allwinner,sun5i-a13-sram-c1",
+						     "allwinner,sun4i-a10-sram-c1";
+					reg = <0x000000 0x80000>;
+				};
+			};
+		};
+
+		mbus: dram-controller@1c01000 {
+			compatible = "allwinner,sun5i-a13-mbus";
+			reg = <0x01c01000 0x1000>;
+			clocks = <&ccu CLK_MBUS>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			dma-ranges = <0x00000000 0x40000000 0x20000000>;
+			#interconnect-cells = <1>;
 		};
 
 		dma: dma-controller@1c02000 {
@@ -158,7 +200,7 @@ 
 			#dma-cells = <2>;
 		};
 
-		nfc: nand@1c03000 {
+		nfc: nand-controller@1c03000 {
 			compatible = "allwinner,sun4i-a10-nand";
 			reg = <0x01c03000 0x1000>;
 			interrupts = <37>;
@@ -207,11 +249,8 @@ 
 			status = "disabled";
 
 			port {
-				#address-cells = <1>;
-				#size-cells = <0>;
 
-				tve0_in_tcon0: endpoint@0 {
-					reg = <0>;
+				tve0_in_tcon0: endpoint {
 					remote-endpoint = <&tcon0_out_tve0>;
 				};
 			};
@@ -238,6 +277,7 @@ 
 			compatible = "allwinner,sun5i-a13-tcon";
 			reg = <0x01c0c000 0x1000>;
 			interrupts = <44>;
+			dmas = <&dma SUN4I_DMA_DEDICATED 14>;
 			resets = <&ccu RST_LCD>;
 			reset-names = "lcd";
 			clocks = <&ccu CLK_AHB_LCD>,
@@ -247,6 +287,7 @@ 
 				      "tcon-ch0",
 				      "tcon-ch1";
 			clock-output-names = "tcon-pixel-clock";
+			#clock-cells = <0>;
 			status = "disabled";
 
 			ports {
@@ -254,12 +295,9 @@ 
 				#size-cells = <0>;
 
 				tcon0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <0>;
 
-					tcon0_in_be0: endpoint@0 {
-						reg = <0>;
+					tcon0_in_be0: endpoint {
 						remote-endpoint = <&be0_out_tcon0>;
 					};
 				};
@@ -278,12 +316,25 @@ 
 			};
 		};
 
+		video-codec@1c0e000 {
+			compatible = "allwinner,sun5i-a13-video-engine";
+			reg = <0x01c0e000 0x1000>;
+			clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
+				 <&ccu CLK_DRAM_VE>;
+			clock-names = "ahb", "mod", "ram";
+			resets = <&ccu RST_VE>;
+			interrupts = <53>;
+			allwinner,sram = <&ve_sram 1>;
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun5i-a13-mmc";
 			reg = <0x01c0f000 0x1000>;
 			clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
 			clock-names = "ahb", "mmc";
 			interrupts = <32>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -321,13 +372,14 @@ 
 			phy-names = "usb";
 			extcon = <&usbphy 0>;
 			allwinner,sram = <&otg_sram 1>;
+			dr_mode = "otg";
 			status = "disabled";
 		};
 
 		usbphy: phy@1c13400 {
 			#phy-cells = <1>;
 			compatible = "allwinner,sun5i-a13-usb-phy";
-			reg = <0x01c13400 0x10 0x01c14800 0x4>;
+			reg = <0x01c13400 0x10>, <0x01c14800 0x4>;
 			reg-names = "phy_ctrl", "pmu1";
 			clocks = <&ccu CLK_USB_PHY0>;
 			clock-names = "usb_phy";
@@ -404,7 +456,7 @@ 
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
-			emac_pins_a: emac0@0 {
+			emac_pd_pins: emac-pd-pins {
 				pins = "PD6", "PD7", "PD10",
 				       "PD11", "PD12", "PD13", "PD14",
 				       "PD15", "PD18", "PD19", "PD20",
@@ -413,27 +465,27 @@ 
 				function = "emac";
 			};
 
-			i2c0_pins_a: i2c0@0 {
+			i2c0_pins: i2c0-pins {
 				pins = "PB0", "PB1";
 				function = "i2c0";
 			};
 
-			i2c1_pins_a: i2c1@0 {
+			i2c1_pins: i2c1-pins {
 				pins = "PB15", "PB16";
 				function = "i2c1";
 			};
 
-			i2c2_pins_a: i2c2@0 {
+			i2c2_pins: i2c2-pins {
 				pins = "PB17", "PB18";
 				function = "i2c2";
 			};
 
-			ir0_rx_pins_a: ir0@0 {
+			ir0_rx_pin: ir0-rx-pin {
 				pins = "PB4";
 				function = "ir0";
 			};
 
-			lcd_rgb565_pins: lcd_rgb565@0 {
+			lcd_rgb565_pins: lcd-rgb565-pins {
 				pins = "PD3", "PD4", "PD5", "PD6", "PD7",
 						 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
 						 "PD19", "PD20", "PD21", "PD22", "PD23",
@@ -441,7 +493,7 @@ 
 				function = "lcd0";
 			};
 
-			lcd_rgb666_pins: lcd_rgb666@0 {
+			lcd_rgb666_pins: lcd-rgb666-pins {
 				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
 				       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
 				       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
@@ -449,7 +501,7 @@ 
 				function = "lcd0";
 			};
 
-			mmc0_pins_a: mmc0@0 {
+			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2", "PF3",
 				       "PF4", "PF5";
 				function = "mmc0";
@@ -457,24 +509,24 @@ 
 				bias-pull-up;
 			};
 
-			mmc2_pins_a: mmc2@0 {
+			mmc2_4bit_pc_pins: mmc2-4bit-pc-pins {
 				pins = "PC6", "PC7", "PC8", "PC9",
-				       "PC10", "PC11", "PC12", "PC13",
-				       "PC14", "PC15";
+				       "PC10", "PC11";
 				function = "mmc2";
 				drive-strength = <30>;
 				bias-pull-up;
 			};
 
-			mmc2_4bit_pins_a: mmc2-4bit@0 {
+			mmc2_8bit_pins: mmc2-8bit-pins {
 				pins = "PC6", "PC7", "PC8", "PC9",
-				       "PC10", "PC11";
+				       "PC10", "PC11", "PC12", "PC13",
+				       "PC14", "PC15";
 				function = "mmc2";
 				drive-strength = <30>;
 				bias-pull-up;
 			};
 
-			nand_pins_a: nand-base0@0 {
+			nand_pins: nand-pins {
 				pins = "PC0", "PC1", "PC2",
 				       "PC5", "PC8", "PC9", "PC10",
 				       "PC11", "PC12", "PC13", "PC14",
@@ -482,72 +534,79 @@ 
 				function = "nand0";
 			};
 
-			nand_cs0_pins_a: nand-cs@0 {
+			nand_cs0_pin: nand-cs0-pin {
 				pins = "PC4";
 				function = "nand0";
 			};
 
-			nand_rb0_pins_a: nand-rb@0 {
+			nand_rb0_pin: nand-rb0-pin {
 				pins = "PC6";
 				function = "nand0";
 			};
 
-			spi2_pins_a: spi2@0 {
+			pwm0_pin: pwm0-pin {
+				pins = "PB2";
+				function = "pwm";
+			};
+
+			spi2_pe_pins: spi2-pe-pins {
 				pins = "PE1", "PE2", "PE3";
 				function = "spi2";
 			};
 
-			spi2_cs0_pins_a: spi2-cs0@0 {
+			spi2_cs0_pe_pin: spi2-cs0-pe-pin {
 				pins = "PE0";
 				function = "spi2";
 			};
 
-			uart1_pins_a: uart1@0 {
+			uart1_pe_pins: uart1-pe-pins {
 				pins = "PE10", "PE11";
 				function = "uart1";
 			};
 
-			uart1_pins_b: uart1@1 {
+			uart1_pg_pins: uart1-pg-pins {
 				pins = "PG3", "PG4";
 				function = "uart1";
 			};
 
-			uart2_pins_a: uart2@0 {
+			uart2_pd_pins: uart2-pd-pins {
 				pins = "PD2", "PD3";
 				function = "uart2";
 			};
 
-			uart2_cts_rts_pins_a: uart2-cts-rts@0 {
+			uart2_cts_rts_pd_pins: uart2-cts-rts-pd-pins {
 				pins = "PD4", "PD5";
 				function = "uart2";
 			};
 
-			uart3_pins_a: uart3@0 {
+			uart3_pg_pins: uart3-pg-pins {
 				pins = "PG9", "PG10";
 				function = "uart3";
 			};
 
-			uart3_cts_rts_pins_a: uart3-cts-rts@0 {
+			uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins {
 				pins = "PG11", "PG12";
 				function = "uart3";
 			};
-
-			pwm0_pins: pwm0 {
-				pins = "PB2";
-				function = "pwm";
-			};
 		};
 
 		timer@1c20c00 {
 			compatible = "allwinner,sun4i-a10-timer";
 			reg = <0x01c20c00 0x90>;
-			interrupts = <22>;
+			interrupts = <22>,
+				     <23>,
+				     <24>,
+				     <25>,
+				     <67>,
+				     <68>;
 			clocks = <&ccu CLK_HOSC>;
 		};
 
 		wdt: watchdog@1c20c90 {
 			compatible = "allwinner,sun4i-a10-wdt";
 			reg = <0x01c20c90 0x10>;
+			interrupts = <24>;
+			clocks = <&osc24M>;
 		};
 
 		ir0: ir@1c21800 {
@@ -636,6 +695,8 @@ 
 			reg = <0x01c2ac00 0x400>;
 			interrupts = <7>;
 			clocks = <&ccu CLK_APB1_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -646,6 +707,8 @@ 
 			reg = <0x01c2b000 0x400>;
 			interrupts = <8>;
 			clocks = <&ccu CLK_APB1_I2C1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -656,11 +719,25 @@ 
 			reg = <0x01c2b400 0x400>;
 			interrupts = <9>;
 			clocks = <&ccu CLK_APB1_I2C2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
 		};
 
+		mali: gpu@1c40000 {
+			compatible = "allwinner,sun4i-a10-mali", "arm,mali-400";
+			reg = <0x01c40000 0x10000>;
+			interrupts = <69>, <70>, <71>, <72>,  <73>;
+			interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pmu";
+			clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
+			clock-names = "bus", "core";
+			resets = <&ccu RST_GPU>;
+			assigned-clocks = <&ccu CLK_GPU>;
+			assigned-clock-rates = <320000000>;
+		};
+
 		timer@1c60000 {
 			compatible = "allwinner,sun5i-a13-hstimer";
 			reg = <0x01c60000 0x1000>;
@@ -677,6 +754,8 @@ 
 			clock-names = "ahb", "mod",
 				      "ram";
 			resets = <&ccu RST_DE_FE>;
+			interconnects = <&mbus 19>;
+			interconnect-names = "dma-mem";
 			status = "disabled";
 
 			ports {
@@ -684,12 +763,9 @@ 
 				#size-cells = <0>;
 
 				fe0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <1>;
 
-					fe0_out_be0: endpoint@0 {
-						reg = <0>;
+					fe0_out_be0: endpoint {
 						remote-endpoint = <&be0_in_fe0>;
 					};
 				};
@@ -705,33 +781,26 @@ 
 			clock-names = "ahb", "mod",
 				      "ram";
 			resets = <&ccu RST_DE_BE>;
+			interconnects = <&mbus 18>;
+			interconnect-names = "dma-mem";
 			status = "disabled";
 
-			assigned-clocks = <&ccu CLK_DE_BE>;
-			assigned-clock-rates = <300000000>;
-
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
 
 				be0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <0>;
 
-					be0_in_fe0: endpoint@0 {
-						reg = <0>;
+					be0_in_fe0: endpoint {
 						remote-endpoint = <&fe0_out_be0>;
 					};
 				};
 
 				be0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <1>;
 
-					be0_out_tcon0: endpoint@0 {
-						reg = <0>;
+					be0_out_tcon0: endpoint {
 						remote-endpoint = <&tcon0_in_be0>;
 					};
 				};
diff --git a/arch/arm/dts/sun6i-a31-app4-evb1.dts b/arch/arm/dts/sun6i-a31-app4-evb1.dts
index 7f34323a66..32d22025ac 100644
--- a/arch/arm/dts/sun6i-a31-app4-evb1.dts
+++ b/arch/arm/dts/sun6i-a31-app4-evb1.dts
@@ -65,22 +65,14 @@ 
 	status = "okay";
 };
 
-&pio {
-	usb1_vbus_pin_a: usb1_vbus_pin@0 {
-		pins = "PH27";
-		function = "gpio_out";
-	};
-};
-
 &reg_usb1_vbus {
-	pinctrl-0 = <&usb1_vbus_pin_a>;
 	gpio = <&pio 7 27 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31-colombus.dts b/arch/arm/dts/sun6i-a31-colombus.dts
index 939c497a6f..93a15eaaa8 100644
--- a/arch/arm/dts/sun6i-a31-colombus.dts
+++ b/arch/arm/dts/sun6i-a31-colombus.dts
@@ -60,13 +60,11 @@ 
 		stdout-path = "serial0:115200n8";
 	};
 
-	i2c_lcd: i2c@0 {
+	i2c_lcd: i2c {
 		/* The lcd panel i2c interface is hooked up via gpios */
 		compatible = "i2c-gpio";
-		pinctrl-names = "default";
-		pinctrl-0 = <&i2c_lcd_pins>;
-		gpios = <&pio 0 23 GPIO_ACTIVE_HIGH>, /* PA23, sda */
-			<&pio 0 24 GPIO_ACTIVE_HIGH>; /* PA24, scl */
+		sda-gpios = <&pio 0 23 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PA23 */
+		scl-gpios = <&pio 0 24 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PA24 */
 		i2c-gpio,delay-us = <5>;
 	};
 };
@@ -77,31 +75,21 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_rgmii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_rgmii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "rgmii";
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "fail";
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 
 	mma8452: mma8452@1d {
@@ -112,48 +100,27 @@ 
 	};
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_colombus>;
 	vmmc-supply = <&reg_vcc3v0>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
 	status = "okay";
 };
 
-&mmc0_pins_a {
-	bias-pull-up;
-};
-
-&pio {
-	mmc0_cd_pin_colombus: mmc0_cd_pin@0 {
-		pins = "PA8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb2_vbus_pin_colombus: usb2_vbus_pin@0 {
-		pins = "PH24";
-		function = "gpio_out";
-	};
-
-	i2c_lcd_pins: i2c_lcd_pin@0 {
-		pins = "PA23", "PA24";
-		function = "gpio_out";
-		bias-pull-up;
-	};
-};
-
 &reg_usb2_vbus {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb2_vbus_pin_colombus>;
 	gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31-hummingbird.dts b/arch/arm/dts/sun6i-a31-hummingbird.dts
index 2c14358035..486cec6f71 100644
--- a/arch/arm/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/dts/sun6i-a31-hummingbird.dts
@@ -86,31 +86,23 @@ 
 	vga-dac {
 		compatible = "dumb-vga-dac";
 		vdd-supply = <&reg_vga_3v3>;
-		#address-cells = <1>;
-		#size-cells = <0>;
 
 		ports {
 			#address-cells = <1>;
 			#size-cells = <0>;
 
 			port@0 {
-				#address-cells = <1>;
-				#size-cells = <0>;
 				reg = <0>;
 
-				vga_dac_in: endpoint@0 {
-					reg = <0>;
+				vga_dac_in: endpoint {
 					remote-endpoint = <&tcon0_out_vga>;
 				};
 			};
 
 			port@1 {
-				#address-cells = <1>;
-				#size-cells = <0>;
 				reg = <1>;
 
-				vga_dac_out: endpoint@0 {
-					reg = <0>;
+				vga_dac_out: endpoint {
 					remote-endpoint = <&vga_con_in>;
 				};
 			};
@@ -160,17 +152,10 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_hummingbird>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_rgmii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "rgmii-id";
-	snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 30000>;
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &hdmi {
@@ -184,21 +169,15 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	/* pull-ups and devices require AXP221 DLDO3 */
 	status = "failed";
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 
 	pcf8563: rtc@51 {
@@ -209,27 +188,27 @@ 
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+		reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
+		reset-deassert-us = <30000>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
 	status = "okay";
 };
 
-&mmc0_pins_a {
-	/* external pull-ups missing for some pins */
-	bias-pull-up;
-};
-
 &mmc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_hummingbird>;
 	vmmc-supply = <&reg_aldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -241,31 +220,13 @@ 
 	status = "okay";
 };
 
-&pio {
-	gmac_phy_reset_pin_hummingbird: gmac_phy_reset_pin@0 {
-		pins = "PA21";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 {
-		pins = "PA8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	wifi_reset_pin_hummingbird: wifi_reset_pin@0 {
-		pins = "PG10";
-		function = "gpio_out";
-	};
-};
-
 &p2wi {
 	status = "okay";
 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		x-powers,drive-vbus-en;
 	};
@@ -354,7 +315,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
@@ -368,8 +329,8 @@ 
 };
 
 &usbphy {
-	usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
-	usb0_vbus_det-gpio = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
+	usb0_id_det-gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+	usb0_vbus_det-gpios = <&pio 0 16 GPIO_ACTIVE_HIGH>; /* PA16 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_drivevbus>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
diff --git a/arch/arm/dts/sun6i-a31-i7.dts b/arch/arm/dts/sun6i-a31-i7.dts
index d659be9dbc..744723d956 100644
--- a/arch/arm/dts/sun6i-a31-i7.dts
+++ b/arch/arm/dts/sun6i-a31-i7.dts
@@ -71,10 +71,8 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_i7>;
 
-		blue {
+		led {
 			label = "i7:blue:usr";
 			gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
 		};
@@ -118,14 +116,10 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "mii";
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &hdmi {
@@ -140,48 +134,31 @@ 
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_i7>;
 	vmmc-supply = <&reg_vcc3v3>;
 	bus-width = <4>;
 	cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
 	status = "okay";
 };
 
-&pio {
-	led_pins_i7: led_pins@0 {
-		pins = "PH13";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_i7: mmc0_cd_pin@0 {
-		pins = "PH22";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb1_vbus_pin_i7: usb1_vbus_pin@0 {
-		pins = "PC27";
-		function = "gpio_out";
-	};
-};
-
 &reg_usb1_vbus {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb1_vbus_pin_i7>;
 	gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &spdif {
 	pinctrl-names = "default";
-	pinctrl-0 = <&spdif_pins_a>;
-	spdif-out = "okay";
+	pinctrl-0 = <&spdif_tx_pin>;
 	status = "okay";
 };
 
@@ -191,7 +168,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31-m9.dts b/arch/arm/dts/sun6i-a31-m9.dts
index 9698f6d38d..e4f3415e61 100644
--- a/arch/arm/dts/sun6i-a31-m9.dts
+++ b/arch/arm/dts/sun6i-a31-m9.dts
@@ -60,10 +60,8 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_m9>;
 
-		blue {
+		led {
 			label = "m9:blue:pwr";
 			gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -85,26 +83,26 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "mii";
 	phy-supply = <&reg_dldo1>;
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
@@ -117,31 +115,13 @@ 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
 #include "axp22x.dtsi"
 
-&pio {
-	led_pins_m9: led_pins@0 {
-		pins = "PH13";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_m9: mmc0_cd_pin@0 {
-		pins = "PH22";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb1_vbus_pin_m9: usb1_vbus_pin@0 {
-		pins = "PC27";
-		function = "gpio_out";
-	};
-};
-
 &reg_aldo1 {
 	regulator-min-microvolt = <3300000>;
 	regulator-max-microvolt = <3300000>;
@@ -215,15 +195,13 @@ 
 };
 
 &reg_usb1_vbus {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb1_vbus_pin_m9>;
 	gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
index bb14b171b1..7bd4bdd66a 100644
--- a/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
+++ b/arch/arm/dts/sun6i-a31-mele-a1000g-quad.dts
@@ -60,10 +60,8 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_m9>;
 
-		blue {
+		led {
 			label = "a1000g:blue:pwr";
 			gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>;
 			default-state = "on";
@@ -85,26 +83,26 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "mii";
 	phy-supply = <&reg_dldo1>;
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 */
@@ -117,31 +115,13 @@ 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
 
 #include "axp22x.dtsi"
 
-&pio {
-	led_pins_m9: led_pins@0 {
-		pins = "PH13";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_m9: mmc0_cd_pin@0 {
-		pins = "PH22";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb1_vbus_pin_m9: usb1_vbus_pin@0 {
-		pins = "PC27";
-		function = "gpio_out";
-	};
-};
-
 &reg_aldo1 {
 	regulator-min-microvolt = <3300000>;
 	regulator-max-microvolt = <3300000>;
@@ -215,15 +195,13 @@ 
 };
 
 &reg_usb1_vbus {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb1_vbus_pin_m9>;
 	gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31-mixtile-loftq.dts b/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
index 32ab9751c6..dde9bdf2f9 100644
--- a/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
+++ b/arch/arm/dts/sun6i-a31-mixtile-loftq.dts
@@ -31,11 +31,13 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_rgmii_a>;
+	pinctrl-0 = <&gmac_rgmii_pins>;
 	phy = <&phy1>;
 	phy-mode = "rgmii";
 	status = "okay";
+};
 
+&mdio {
 	phy1: ethernet-phy@1 {
 		reg = <1>;
 	};
@@ -51,6 +53,6 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi
index c72992556a..d7d920e9e4 100644
--- a/arch/arm/dts/sun6i-a31.dtsi
+++ b/arch/arm/dts/sun6i-a31.dtsi
@@ -42,8 +42,6 @@ 
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -52,6 +50,8 @@ 
 
 / {
 	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	aliases {
 		ethernet0 = &gmac;
@@ -62,7 +62,7 @@ 
 		#size-cells = <1>;
 		ranges;
 
-		simplefb_hdmi: framebuffer@0 {
+		simplefb_hdmi: framebuffer-lcd0-hdmi {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0-hdmi";
@@ -73,7 +73,7 @@ 
 			status = "disabled";
 		};
 
-		simplefb_lcd: framebuffer@1 {
+		simplefb_lcd: framebuffer-lcd0 {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0";
@@ -105,37 +105,63 @@ 
 			reg = <0>;
 			clocks = <&ccu CLK_CPU>;
 			clock-latency = <244144>; /* 8 32k periods */
-			operating-points = <
+			operating-points =
 				/* kHz	  uV */
-				1008000	1200000
-				864000	1200000
-				720000	1100000
-				480000	1000000
-				>;
+				<1008000 1200000>,
+				<864000 1200000>,
+				<720000 1100000>,
+				<480000 1000000>;
 			#cooling-cells = <2>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <1>;
+			clocks = <&ccu CLK_CPU>;
+			clock-latency = <244144>; /* 8 32k periods */
+			operating-points =
+				/* kHz	  uV */
+				<1008000 1200000>,
+				<864000 1200000>,
+				<720000 1100000>,
+				<480000 1000000>;
+			#cooling-cells = <2>;
 		};
 
-		cpu@2 {
+		cpu2: cpu@2 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&ccu CLK_CPU>;
+			clock-latency = <244144>; /* 8 32k periods */
+			operating-points =
+				/* kHz	  uV */
+				<1008000 1200000>,
+				<864000 1200000>,
+				<720000 1100000>,
+				<480000 1000000>;
+			#cooling-cells = <2>;
 		};
 
-		cpu@3 {
+		cpu3: cpu@3 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&ccu CLK_CPU>;
+			clock-latency = <244144>; /* 8 32k periods */
+			operating-points =
+				/* kHz	  uV */
+				<1008000 1200000>,
+				<864000 1200000>,
+				<720000 1100000>,
+				<480000 1000000>;
+			#cooling-cells = <2>;
 		};
 	};
 
 	thermal-zones {
-		cpu_thermal {
+		cpu-thermal {
 			/* milliseconds */
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
@@ -144,7 +170,10 @@ 
 			cooling-maps {
 				map0 {
 					trip = <&cpu_alert0>;
-					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 			};
 
@@ -166,12 +195,8 @@ 
 		};
 	};
 
-	memory {
-		reg = <0x40000000 0x80000000>;
-	};
-
 	pmu {
-		compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu";
+		compatible = "arm,cortex-a7-pmu";
 		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
@@ -183,17 +208,20 @@ 
 		#size-cells = <1>;
 		ranges;
 
-		osc24M: osc24M {
+		osc24M: clk-24M {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <24000000>;
+			clock-accuracy = <50000>;
+			clock-output-names = "osc24M";
 		};
 
-		osc32k: clk@0 {
+		osc32k: clk-32k {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <32768>;
-			clock-output-names = "osc32k";
+			clock-accuracy = <50000>;
+			clock-output-names = "ext_osc32k";
 		};
 
 		/*
@@ -205,14 +233,14 @@ 
 		 * The actual TX clock rate is not controlled by the
 		 * gmac_tx clock.
 		 */
-		mii_phy_tx_clk: clk@1 {
+		mii_phy_tx_clk: clk-mii-phy-tx {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <25000000>;
 			clock-output-names = "mii_phy_tx";
 		};
 
-		gmac_int_tx_clk: clk@2 {
+		gmac_int_tx_clk: clk-gmac-int-tx {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <125000000>;
@@ -234,7 +262,7 @@ 
 		status = "disabled";
 	};
 
-	soc@1c00000 {
+	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -253,15 +281,21 @@ 
 			compatible = "allwinner,sun6i-a31-tcon";
 			reg = <0x01c0c000 0x1000>;
 			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-			resets = <&ccu RST_AHB1_LCD0>;
-			reset-names = "lcd";
+			dmas = <&dma 11>;
+			resets = <&ccu RST_AHB1_LCD0>,
+				 <&ccu RST_AHB1_LVDS>;
+			reset-names = "lcd",
+				      "lvds";
 			clocks = <&ccu CLK_AHB1_LCD0>,
 				 <&ccu CLK_LCD0_CH0>,
-				 <&ccu CLK_LCD0_CH1>;
+				 <&ccu CLK_LCD0_CH1>,
+				 <&ccu 15>;
 			clock-names = "ahb",
 				      "tcon-ch0",
-				      "tcon-ch1";
+				      "tcon-ch1",
+				      "lvds-alt";
 			clock-output-names = "tcon0-pixel-clock";
+			#clock-cells = <0>;
 
 			ports {
 				#address-cells = <1>;
@@ -301,15 +335,20 @@ 
 			compatible = "allwinner,sun6i-a31-tcon";
 			reg = <0x01c0d000 0x1000>;
 			interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
-			resets = <&ccu RST_AHB1_LCD1>;
-			reset-names = "lcd";
+			dmas = <&dma 12>;
+			resets = <&ccu RST_AHB1_LCD1>,
+				 <&ccu RST_AHB1_LVDS>;
+			reset-names = "lcd", "lvds";
 			clocks = <&ccu CLK_AHB1_LCD1>,
 				 <&ccu CLK_LCD1_CH0>,
-				 <&ccu CLK_LCD1_CH1>;
+				 <&ccu CLK_LCD1_CH1>,
+				 <&ccu 15>;
 			clock-names = "ahb",
 				      "tcon-ch0",
-				      "tcon-ch1";
+				      "tcon-ch1",
+				      "lvds-alt";
 			clock-output-names = "tcon1-pixel-clock";
+			#clock-cells = <0>;
 
 			ports {
 				#address-cells = <1>;
@@ -359,6 +398,8 @@ 
 			resets = <&ccu RST_AHB1_MMC0>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -378,6 +419,8 @@ 
 			resets = <&ccu RST_AHB1_MMC1>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc1_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -431,7 +474,6 @@ 
 				 <&ccu CLK_PLL_VIDEO1_2X>;
 			clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
 			resets = <&ccu RST_AHB1_HDMI>;
-			reset-names = "ahb";
 			dma-names = "ddc-tx", "ddc-rx", "audio-tx";
 			dmas = <&dma 13>, <&dma 13>, <&dma 14>;
 			status = "disabled";
@@ -457,8 +499,6 @@ 
 				};
 
 				hdmi_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <1>;
 				};
 			};
@@ -474,6 +514,7 @@ 
 			phys = <&usbphy 0>;
 			phy-names = "usb";
 			extcon = <&usbphy 0>;
+			dr_mode = "otg";
 			status = "disabled";
 		};
 
@@ -557,7 +598,7 @@ 
 		ccu: clock@1c20000 {
 			compatible = "allwinner,sun6i-a31-ccu";
 			reg = <0x01c20000 0x400>;
-			clocks = <&osc24M>, <&osc32k>;
+			clocks = <&osc24M>, <&rtc 0>;
 			clock-names = "hosc", "losc";
 			#clock-cells = <1>;
 			#reset-cells = <1>;
@@ -570,14 +611,14 @@ 
 				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&osc32k>;
+			clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
 			clock-names = "apb", "hosc", "losc";
 			gpio-controller;
 			interrupt-controller;
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
-			gmac_pins_gmii_a: gmac_gmii@0 {
+			gmac_gmii_pins: gmac-gmii-pins {
 				pins = "PA0", "PA1", "PA2", "PA3",
 						"PA4", "PA5", "PA6", "PA7",
 						"PA8", "PA9", "PA10", "PA11",
@@ -593,7 +634,7 @@ 
 				drive-strength = <30>;
 			};
 
-			gmac_pins_mii_a: gmac_mii@0 {
+			gmac_mii_pins: gmac-mii-pins {
 				pins = "PA0", "PA1", "PA2", "PA3",
 						"PA8", "PA9", "PA11",
 						"PA12", "PA13", "PA14", "PA19",
@@ -602,7 +643,7 @@ 
 				function = "gmac";
 			};
 
-			gmac_pins_rgmii_a: gmac_rgmii@0 {
+			gmac_rgmii_pins: gmac-rgmii-pins {
 				pins = "PA0", "PA1", "PA2", "PA3",
 						"PA9", "PA10", "PA11",
 						"PA12", "PA13", "PA14", "PA19",
@@ -615,22 +656,22 @@ 
 				drive-strength = <40>;
 			};
 
-			i2c0_pins_a: i2c0@0 {
+			i2c0_pins: i2c0-pins {
 				pins = "PH14", "PH15";
 				function = "i2c0";
 			};
 
-			i2c1_pins_a: i2c1@0 {
+			i2c1_pins: i2c1-pins {
 				pins = "PH16", "PH17";
 				function = "i2c1";
 			};
 
-			i2c2_pins_a: i2c2@0 {
+			i2c2_pins: i2c2-pins {
 				pins = "PH18", "PH19";
 				function = "i2c2";
 			};
 
-			lcd0_rgb888_pins: lcd0_rgb888 {
+			lcd0_rgb888_pins: lcd0-rgb888-pins {
 				pins = "PD0", "PD1", "PD2", "PD3",
 						 "PD4", "PD5", "PD6", "PD7",
 						 "PD8", "PD9", "PD10", "PD11",
@@ -641,7 +682,7 @@ 
 				function = "lcd0";
 			};
 
-			mmc0_pins_a: mmc0@0 {
+			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 						 "PF3", "PF4", "PF5";
 				function = "mmc0";
@@ -649,7 +690,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc1_pins_a: mmc1@0 {
+			mmc1_pins: mmc1-pins {
 				pins = "PG0", "PG1", "PG2", "PG3",
 						 "PG4", "PG5";
 				function = "mmc1";
@@ -657,7 +698,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc2_pins_a: mmc2@0 {
+			mmc2_4bit_pins: mmc2-4bit-pins {
 				pins = "PC6", "PC7", "PC8", "PC9",
 						 "PC10", "PC11";
 				function = "mmc2";
@@ -665,7 +706,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc2_8bit_emmc_pins: mmc2@1 {
+			mmc2_8bit_emmc_pins: mmc2-8bit-emmc-pins {
 				pins = "PC6", "PC7", "PC8", "PC9",
 						 "PC10", "PC11", "PC12",
 						 "PC13", "PC14", "PC15",
@@ -675,7 +716,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc3_8bit_emmc_pins: mmc3@1 {
+			mmc3_8bit_emmc_pins: mmc3-8bit-emmc-pins {
 				pins = "PC6", "PC7", "PC8", "PC9",
 						 "PC10", "PC11", "PC12",
 						 "PC13", "PC14", "PC15",
@@ -685,12 +726,12 @@ 
 				bias-pull-up;
 			};
 
-			spdif_pins_a: spdif@0 {
+			spdif_tx_pin: spdif-tx-pin {
 				pins = "PH28";
 				function = "spdif";
 			};
 
-			uart0_pins_a: uart0@0 {
+			uart0_ph_pins: uart0-ph-pins {
 				pins = "PH20", "PH21";
 				function = "uart0";
 			};
@@ -703,13 +744,16 @@ 
 				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&osc24M>;
 		};
 
 		wdt1: watchdog@1c20ca0 {
 			compatible = "allwinner,sun6i-a31-wdt";
 			reg = <0x01c20ca0 0x20>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc24M>;
 		};
 
 		spdif: spdif@1c21000 {
@@ -849,6 +893,8 @@ 
 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_APB2_I2C0>;
 			resets = <&ccu RST_APB2_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -860,6 +906,8 @@ 
 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_APB2_I2C1>;
 			resets = <&ccu RST_APB2_I2C1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -871,6 +919,8 @@ 
 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_APB2_I2C2>;
 			resets = <&ccu RST_APB2_I2C2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -900,8 +950,12 @@ 
 			snps,fixed-burst;
 			snps,force_sf_dma_mode;
 			status = "disabled";
-			#address-cells = <1>;
-			#size-cells = <0>;
+
+			mdio: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		crypto: crypto-engine@1c15000 {
@@ -950,6 +1004,8 @@ 
 			dma-names = "rx", "tx";
 			resets = <&ccu RST_AHB1_SPI0>;
 			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 
 		spi1: spi@1c69000 {
@@ -962,6 +1018,8 @@ 
 			dma-names = "rx", "tx";
 			resets = <&ccu RST_AHB1_SPI1>;
 			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 
 		spi2: spi@1c6a000 {
@@ -974,6 +1032,8 @@ 
 			dma-names = "rx", "tx";
 			resets = <&ccu RST_AHB1_SPI2>;
 			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 
 		spi3: spi@1c6b000 {
@@ -986,10 +1046,12 @@ 
 			dma-names = "rx", "tx";
 			resets = <&ccu RST_AHB1_SPI3>;
 			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 		};
 
 		gic: interrupt-controller@1c81000 {
-			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+			compatible = "arm,gic-400";
 			reg = <0x01c81000 0x1000>,
 			      <0x01c82000 0x2000>,
 			      <0x01c84000 0x2000>,
@@ -1073,9 +1135,6 @@ 
 				      "ram";
 			resets = <&ccu RST_AHB1_BE1>;
 
-			assigned-clocks = <&ccu CLK_BE1>;
-			assigned-clock-rates = <300000000>;
-
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -1119,9 +1178,6 @@ 
 				      "ram";
 			resets = <&ccu RST_AHB1_DRC1>;
 
-			assigned-clocks = <&ccu CLK_IEP_DRC1>;
-			assigned-clock-rates = <300000000>;
-
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -1165,9 +1221,6 @@ 
 				      "ram";
 			resets = <&ccu RST_AHB1_BE0>;
 
-			assigned-clocks = <&ccu CLK_BE0>;
-			assigned-clock-rates = <300000000>;
-
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -1189,12 +1242,9 @@ 
 				};
 
 				be0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <1>;
 
-					be0_out_drc0: endpoint@0 {
-						reg = <0>;
+					be0_out_drc0: endpoint {
 						remote-endpoint = <&drc0_in_be0>;
 					};
 				};
@@ -1211,20 +1261,14 @@ 
 				      "ram";
 			resets = <&ccu RST_AHB1_DRC0>;
 
-			assigned-clocks = <&ccu CLK_IEP_DRC0>;
-			assigned-clock-rates = <300000000>;
-
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
 
 				drc0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
 					reg = <0>;
 
-					drc0_in_be0: endpoint@0 {
-						reg = <0>;
+					drc0_in_be0: endpoint {
 						remote-endpoint = <&be0_out_drc0>;
 					};
 				};
@@ -1248,13 +1292,16 @@ 
 		};
 
 		rtc: rtc@1f00000 {
+			#clock-cells = <1>;
 			compatible = "allwinner,sun6i-a31-rtc";
 			reg = <0x01f00000 0x54>;
 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc32k>;
+			clock-output-names = "osc32k";
 		};
 
-		nmi_intc: interrupt-controller@1f00c00 {
+		r_intc: interrupt-controller@1f00c00 {
 			compatible = "allwinner,sun6i-a31-r-intc";
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -1269,7 +1316,7 @@ 
 			ar100: ar100_clk {
 				compatible = "allwinner,sun6i-a31-ar100-clk";
 				#clock-cells = <0>;
-				clocks = <&osc32k>, <&osc24M>,
+				clocks = <&rtc 0>, <&osc24M>,
 					 <&ccu CLK_PLL_PERIPH>,
 					 <&ccu CLK_PLL_PERIPH>;
 				clock-output-names = "ar100";
@@ -1304,7 +1351,7 @@ 
 			ir_clk: ir_clk {
 				#clock-cells = <0>;
 				compatible = "allwinner,sun4i-a10-mod0-clk";
-				clocks = <&osc32k>, <&osc24M>;
+				clocks = <&rtc 0>, <&osc24M>;
 				clock-output-names = "ir";
 			};
 
@@ -1320,7 +1367,7 @@ 
 		};
 
 		ir: ir@1f02000 {
-			compatible = "allwinner,sun5i-a13-ir";
+			compatible = "allwinner,sun6i-a31-ir";
 			clocks = <&apb0_gates 1>, <&ir_clk>;
 			clock-names = "apb", "ir";
 			resets = <&apb0_rst 1>;
@@ -1334,21 +1381,20 @@ 
 			reg = <0x01f02c00 0x400>;
 			interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
 			clock-names = "apb", "hosc", "losc";
 			resets = <&apb0_rst 0>;
 			gpio-controller;
 			interrupt-controller;
 			#interrupt-cells = <3>;
-			#size-cells = <0>;
 			#gpio-cells = <3>;
 
-			ir_pins_a: ir@0 {
+			s_ir_rx_pin: s-ir-rx-pin {
 				pins = "PL4";
 				function = "s_ir";
 			};
 
-			p2wi_pins: p2wi {
+			s_p2wi_pins: s-p2wi-pins {
 				pins = "PL0", "PL1";
 				function = "s_p2wi";
 			};
@@ -1362,7 +1408,7 @@ 
 			clock-frequency = <100000>;
 			resets = <&apb0_rst 3>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&p2wi_pins>;
+			pinctrl-0 = <&s_p2wi_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts b/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts
index 882a4d89fa..a2ef7846e2 100644
--- a/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts
+++ b/arch/arm/dts/sun6i-a31s-colorfly-e708-q1.dts
@@ -53,7 +53,7 @@ 
 	vref-supply = <&reg_aldo3>;
 	status = "okay";
 
-	button@1000 {
+	button-1000 {
 		label = "Home";
 		linux,code = <KEY_HOMEPAGE>;
 		channel = <0>;
diff --git a/arch/arm/dts/sun6i-a31s-cs908.dts b/arch/arm/dts/sun6i-a31s-cs908.dts
index 75e578159c..1d15e15011 100644
--- a/arch/arm/dts/sun6i-a31s-cs908.dts
+++ b/arch/arm/dts/sun6i-a31s-cs908.dts
@@ -66,28 +66,31 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "mii";
 	status = "okay";
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &ohci1 {
 	status = "okay";
 };
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31s-inet-q972.dts b/arch/arm/dts/sun6i-a31s-inet-q972.dts
index e584e6b186..c5e2c55cdc 100644
--- a/arch/arm/dts/sun6i-a31s-inet-q972.dts
+++ b/arch/arm/dts/sun6i-a31s-inet-q972.dts
@@ -54,8 +54,6 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
 	ft5406ee8: touchscreen@38 {
@@ -73,21 +71,21 @@ 
 	vref-supply = <&reg_aldo3>;
 	status = "okay";
 
-	button@200 {
+	button-200 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
 		voltage = <200000>;
 	};
 
-	button@900 {
+	button-900 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <900000>;
 	};
 
-	button@1200 {
+	button-1200 {
 		label = "Back";
 		linux,code = <KEY_BACK>;
 		channel = <0>;
diff --git a/arch/arm/dts/sun6i-a31s-primo81.dts b/arch/arm/dts/sun6i-a31s-primo81.dts
index 4cb9664cdb..66bc6ca77a 100644
--- a/arch/arm/dts/sun6i-a31s-primo81.dts
+++ b/arch/arm/dts/sun6i-a31s-primo81.dts
@@ -90,19 +90,13 @@ 
 
 &i2c0 {
 	/* pull-ups and device VDDIO use AXP221 DLDO3 */
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "failed";
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
 	ctp@5d {
-		pinctrl-names = "default";
-		pinctrl-0 = <&gt911_int_primo81>;
 		compatible = "goodix,gt911";
 		reg = <0x5d>;
 		interrupt-parent = <&pio>;
@@ -112,8 +106,6 @@ 
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 
 	accelerometer@1c {
@@ -123,7 +115,6 @@ 
 		reg = <0x1c>;
 		interrupt-parent = <&pio>;
 		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>; /* PA9 */
-		#io-channel-cells = <1>;
 	};
 };
 
@@ -131,14 +122,14 @@ 
 	vref-supply = <&reg_aldo3>;
 	status = "okay";
 
-	button@158 {
+	button-158 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <158730>;
 	};
 
-	button@349 {
+	button-349 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -147,8 +138,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_primo81>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
@@ -156,22 +145,11 @@ 
 };
 
 &pio {
-	gt911_int_primo81: gt911_int_pin@0 {
-		pins = "PA3";
-		function = "gpio_in";
-	};
-
-	mma8452_int_primo81: mma8452_int_pin@0 {
+	mma8452_int_primo81: mma8452-int-pin {
 		pins = "PA9";
 		function = "gpio_in";
 		bias-pull-up;
 	};
-
-	mmc0_cd_pin_primo81: mmc0_cd_pin@0 {
-		pins = "PA8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
 };
 
 &p2wi {
@@ -180,7 +158,7 @@ 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		x-powers,drive-vbus-en;
 	};
@@ -281,7 +259,7 @@ 
 };
 
 &usbphy {
-	usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+	usb0_id_det-gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_drivevbus>;
 	usb1_vbus-supply = <&reg_dldo1>;
diff --git a/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
index d7325bc4ee..7455c0db4a 100644
--- a/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
+++ b/arch/arm/dts/sun6i-a31s-sina31s-core.dtsi
@@ -78,7 +78,7 @@ 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
@@ -135,7 +135,7 @@ 
 /* UART0 pads available on core board */
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31s-sina31s.dts b/arch/arm/dts/sun6i-a31s-sina31s.dts
index da0ccf5a2c..0af48e143b 100644
--- a/arch/arm/dts/sun6i-a31s-sina31s.dts
+++ b/arch/arm/dts/sun6i-a31s-sina31s.dts
@@ -66,8 +66,6 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pin_sina31s>;
 
 		status {
 			label = "sina31s:status:usr";
@@ -116,15 +114,11 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_mii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "mii";
 	phy-supply = <&reg_dldo1>;
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &hdmi {
@@ -139,7 +133,7 @@ 
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
@@ -147,14 +141,14 @@ 
 	vref-supply = <&reg_aldo3>;
 	status = "okay";
 
-	button@158 {
+	button-158 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <158730>;
 	};
 
-	button@349 {
+	button-349 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -162,9 +156,13 @@ 
 	};
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina31s>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
@@ -175,19 +173,6 @@ 
 	status = "okay";
 };
 
-&pio {
-	led_pin_sina31s: led_pin@0 {
-		pins = "PH13";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_sina31s: mmc0_cd_pin@0 {
-		pins = "PA4";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &reg_dldo1 {
 	regulator-min-microvolt = <3300000>;
 	regulator-max-microvolt = <3300000>;
@@ -196,7 +181,7 @@ 
 
 &spdif {
 	pinctrl-names = "default";
-	pinctrl-0 = <&spdif_pins_a>;
+	pinctrl-0 = <&spdif_tx_pin>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
index b8b79c0e9e..efb25b949f 100644
--- a/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
+++ b/arch/arm/dts/sun6i-a31s-sinovoip-bpi-m2.dts
@@ -58,20 +58,18 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_bpi_m2>;
 
-		blue {
+		led-0 {
 			label = "bpi-m2:blue:usr";
 			gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
 		};
 
-		green {
+		led-1 {
 			label = "bpi-m2:green:usr";
 			gpios = <&pio 6 10 GPIO_ACTIVE_HIGH>; /* PG10 */
 		};
 
-		red {
+		led-2 {
 			label = "bpi-m2:red:usr";
 			gpios = <&pio 6 5 GPIO_ACTIVE_HIGH>; /* PG5 */
 		};
@@ -79,8 +77,6 @@ 
 
 	mmc2_pwrseq: mmc2_pwrseq {
 		compatible = "mmc-pwrseq-simple";
-		pinctrl-names = "default";
-		pinctrl-0 = <&mmc2_pwrseq_pin_bpi_m2>;
 		reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
 	};
 };
@@ -95,42 +91,38 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_bpi_m2>;
-	phy = <&phy1>;
+	pinctrl-0 = <&gmac_rgmii_pins>;
+	phy-handle = <&phy1>;
 	phy-mode = "rgmii";
 	phy-supply = <&reg_dldo1>;
-	snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 30000>;
 	status = "okay";
-
-	phy1: ethernet-phy@1 {
-		reg = <1>;
-	};
 };
 
 &ir {
 	pinctrl-names = "default";
-	pinctrl-0 = <&ir_pins_a>;
+	pinctrl-0 = <&s_ir_rx_pin>;
 	status = "okay";
 };
 
+&mdio {
+	phy1: ethernet-phy@1 {
+		reg = <1>;
+		reset-gpios = <&pio 0 21 GPIO_ACTIVE_LOW>; /* PA21 */
+		reset-assert-us = <10000>;
+		reset-deassert-us = <30000>;
+	};
+};
+
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 4 GPIO_ACTIVE_LOW>; /* PA4 */
 	status = "okay";
 };
 
-&mmc0_pins_a {
-	bias-pull-up;
-};
-
 &mmc2 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc2_pins_a>;
+	pinctrl-0 = <&mmc2_4bit_pins>;
 	vmmc-supply = <&reg_aldo1>;
 	mmc-pwrseq = <&mmc2_pwrseq>;
 	bus-width = <4>;
@@ -146,10 +138,6 @@ 
 	};
 };
 
-&mmc2_pins_a {
-	bias-pull-up;
-};
-
 &ohci0 {
 	status = "okay";
 };
@@ -160,38 +148,13 @@ 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		eldoin-supply = <&reg_dcdc1>;
 		x-powers,drive-vbus-en;
 	};
 };
 
-&pio {
-	gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin@0 {
-		pins = "PA21";
-		function = "gpio_out";
-	};
-
-	led_pins_bpi_m2: led_pins@0 {
-		pins = "PG5", "PG10", "PG11";
-		function = "gpio_out";
-	};
-
-	mmc0_cd_pin_bpi_m2: mmc0_cd_pin@0 {
-		pins = "PA4";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
-&r_pio {
-	mmc2_pwrseq_pin_bpi_m2: mmc2_pwrseq_pin@0 {
-		pins = "PL8";
-		function = "gpio_out";
-	};
-};
-
 #include "axp22x.dtsi"
 
 &reg_aldo1 {
@@ -291,10 +254,81 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
 &usbphy {
 	status = "okay";
 };
+
+&pio {
+	gpio-line-names =
+		/* PA */
+		"ETXD0", "ETXD1", "ETXD2", "ETXD3", "SDC0-DET", "", "",
+		"", "ETXCLK", "ETXEN", "EGTXCLK", "ERXD0", "ERXD1",
+		"ERXD2", "ERXD3", "", "", "", "", "ERXDV", "ERXCK",
+		"ETXERR", "ERXERR", "ECOL", "ECRS", "ECLKIN", "EMDC",
+		"EMDIO", "", "", "", "",
+
+		/* PB */
+		"CN7-P29", "CN7-P31", "CN7-P33", "CN7-P35", "CN7-P37",
+		"CN7-P28", "CN7-P27", "CN7-P32", "", "", "", "", "", "",
+		"", "", "", "", "", "", "", "", "", "", "", "", "", "",
+		"", "", "", "",
+
+		/* PC */
+		"", "", "", "", "", "", "WL-SDIO-CMD", "WL-SDIO-CLK",
+		"WL-SDIO-D0", "WL-SDIO-D2", "WL-SDIO-D2", "WL-SDIO-D3",
+		"", "", "", "", "", "", "", "", "", "", "", "", "", "",
+		"", "USB-DRV", "", "", "", "",
+
+		/* PD */
+		"CN9-P09", "CN9-P11", "CN9-P13", "CN9-P15", "CN9-P17",
+		"CN9-P19", "CN9-P21", "CN9-P23", "CN9-P25", "CN9-P27",
+		"CN9-P29", "CN9-P31", "CN9-P33", "CN9-P35", "CN9-P37",
+		"CN9-P39", "CN9-P40", "CN9-P38", "CN9-P36", "CN9-P34",
+		"CN9-P32", "CN9-P30", "CN9-P28", "CN9-P26", "CN9-P22",
+		"CN9-P14", "CN9-P18", "CN9-P16", "", "", "", "",
+
+		/* PE */
+		"CN6-P20", "CN6-P24", "CN6-P30", "CN6-P28", "CN7-P08",
+		"CN7-P10", "CN7-P36", "CN7-P38", "CN6-P17", "CN6-P19",
+		"CN6-P21", "CN6-P23", "CN6-P25", "CN6-P27", "CN6-P29",
+		"CN6-P31", "", "", "", "", "", "", "", "", "", "", "",
+		"", "", "", "", "",
+
+		/* PF */
+		"SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
+		"SDC0-D2", "", "", "", "", "", "", "", "", "", "", "",
+		"", "", "", "", "", "", "", "", "", "", "", "", "", "",
+		"",
+
+		/* PG */
+		"CN9-P06", "CN9-P08", "CN9-P20", "CN9-P12", "CN9-P07",
+		"LED-PWR", "CN7-P13", "CN7-P11", "CN7-P22", "CN7-P15",
+		"LED-G", "LED-B", "CN7-P26", "CN7-P24", "CN7-P23",
+		"CN7-P19", "CN7-P21", "HCEC", "CN6-P22", "", "", "", "",
+		"", "", "", "", "", "", "", "", "",
+
+		/* PH */
+		"", "", "", "", "", "", "", "", "", "CN7-P07",
+		"CN7-P12", "CN7-P16", "CN7-P18", "CN9-P10", "CN6-P16",
+		"CN6-P14", "CN9-P04", "CN9-P02", "CN7-P05", "CN7-P03",
+		"CN8-P03", "CN8-P02", "", "", "CN6-P34", "CN6-P32",
+		"CN6-P26", "CN6-P18", "", "", "", "";
+};
+
+&r_pio {
+	gpio-line-names =
+		/* PL */
+		"PMU-SCK", "PMU-SDA", "VBAT-EN", "", "IR-RX",
+		"WL-WAKE-HOST", "BT-WAKE_HOST", "BT-ENABLE",
+		"WL-PMU-EN", "", "", "", "", "", "", "", "", "", "", "",
+		"", "", "", "", "", "", "", "", "", "", "", "",
+
+		/* PM */
+		"CN6-P12", "CN6-P35", "CN7-P40", "", "", "", "", "", "",
+		"", "", "", "", "", "", "", "", "", "", "", "", "", "",
+		"", "", "", "", "", "", "", "", "";
+};
diff --git a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
index aab6c1720e..cadc45255d 100644
--- a/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
+++ b/arch/arm/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
@@ -62,14 +62,10 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
 &i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
 	status = "okay";
 };
 
@@ -89,34 +85,20 @@ 
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_bs1078v2: mmc0_cd_pin@0 {
-		pins = "PA8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bs1078v2>;
 	vmmc-supply = <&reg_vcc3v0>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
 	status = "okay";
 };
 
-&mmc0_pins_a {
-	bias-pull-up;
-};
-
 &p2wi {
 	status = "okay";
 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
@@ -189,7 +171,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
+	pinctrl-0 = <&uart0_ph_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun6i-reference-design-tablet.dtsi b/arch/arm/dts/sun6i-reference-design-tablet.dtsi
index 4e72e4f3ef..6bf3fbdd73 100644
--- a/arch/arm/dts/sun6i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun6i-reference-design-tablet.dtsi
@@ -66,34 +66,20 @@ 
 
 &mmc0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_e708_q1>;
+	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 0 8 GPIO_ACTIVE_LOW>; /* PA8 */
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_e708_q1: mmc0_cd_pin@0 {
-		pins = "PA8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PA15";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &p2wi {
 	status = "okay";
 
 	axp22x: pmic@68 {
 		compatible = "x-powers,axp221";
 		reg = <0x68>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		drivevbus-supply = <&reg_vcc5v0>;
 		x-powers,drive-vbus-en;
@@ -179,9 +165,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>;
-	usb0_id_det-gpio = <&pio 0 15 GPIO_ACTIVE_HIGH>; /* PA15 */
+	usb0_id_det-gpios = <&pio 0 15 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PA15 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_drivevbus>;
 	usb1_vbus-supply = <&reg_dldo1>;
diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi
index 44f3cad3de..a42fac676b 100644
--- a/arch/arm/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/dts/sun8i-a23-a33.dtsi
@@ -42,8 +42,6 @@ 
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
@@ -51,13 +49,15 @@ 
 
 / {
 	interrupt-parent = <&gic>;
+	#address-cells = <1>;
+	#size-cells = <1>;
 
 	chosen {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
-		simplefb_lcd: framebuffer@0 {
+		simplefb_lcd: framebuffer-lcd0 {
 			compatible = "allwinner,simple-framebuffer",
 				     "simple-framebuffer";
 			allwinner,pipeline = "de_be0-lcd0";
@@ -68,6 +68,12 @@ 
 		};
 	};
 
+	de: display-engine {
+		/* compatible gets set in SoC specific dtsi file */
+		allwinner,pipelines = <&fe0>;
+		status = "disabled";
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -118,12 +124,34 @@ 
 		};
 	};
 
-	soc@1c00000 {
+	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges;
 
+		system-control@1c00000 {
+			compatible = "allwinner,sun8i-a23-system-control";
+			reg = <0x01c00000 0x30>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			sram_c: sram@1d00000 {
+				compatible = "mmio-sram";
+				reg = <0x01d00000 0x80000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0 0x01d00000 0x80000>;
+
+				ve_sram: sram-section@0 {
+					compatible = "allwinner,sun8i-a23-sram-c1",
+						     "allwinner,sun4i-a10-sram-c1";
+					reg = <0x000000 0x80000>;
+				};
+			};
+		};
+
 		dma: dma-controller@1c02000 {
 			compatible = "allwinner,sun8i-a23-dma";
 			reg = <0x01c02000 0x1000>;
@@ -133,6 +161,60 @@ 
 			#dma-cells = <1>;
 		};
 
+		nfc: nand-controller@1c03000 {
+			compatible = "allwinner,sun8i-a23-nand-controller";
+			reg = <0x01c03000 0x1000>;
+			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
+			clock-names = "ahb", "mod";
+			resets = <&ccu RST_BUS_NAND>;
+			reset-names = "ahb";
+			dmas = <&dma 5>;
+			dma-names = "rxtx";
+			pinctrl-names = "default";
+			pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		tcon0: lcd-controller@1c0c000 {
+			/* compatible gets set in SoC specific dtsi file */
+			reg = <0x01c0c000 0x1000>;
+			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+			dmas = <&dma 12>;
+			clocks = <&ccu CLK_BUS_LCD>,
+				 <&ccu CLK_LCD_CH0>,
+				 <&ccu 13>;
+			clock-names = "ahb",
+				      "tcon-ch0",
+				      "lvds-alt";
+			clock-output-names = "tcon-pixel-clock";
+			#clock-cells = <0>;
+			resets = <&ccu RST_BUS_LCD>,
+				 <&ccu RST_BUS_LVDS>;
+			reset-names = "lcd",
+				      "lvds";
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				tcon0_in: port@0 {
+					reg = <0>;
+
+					tcon0_in_drc0: endpoint {
+						remote-endpoint = <&drc0_out_tcon0>;
+					};
+				};
+
+				tcon0_out: port@1 {
+					reg = <1>;
+				};
+			};
+		};
+
 		mmc0: mmc@1c0f000 {
 			compatible = "allwinner,sun7i-a20-mmc";
 			reg = <0x01c0f000 0x1000>;
@@ -147,6 +229,8 @@ 
 			resets = <&ccu RST_BUS_MMC0>;
 			reset-names = "ahb";
 			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&mmc0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -190,21 +274,6 @@ 
 			#size-cells = <0>;
 		};
 
-		nfc: nand@1c03000 {
-			compatible = "allwinner,sun4i-a10-nand";
-			reg = <0x01c03000 0x1000>;
-			interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
-			clock-names = "ahb", "mod";
-			resets = <&ccu RST_BUS_NAND>;
-			reset-names = "ahb";
-			pinctrl-names = "default";
-			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
-			status = "disabled";
-			#address-cells = <1>;
-			#size-cells = <0>;
-		};
-
 		usb_otg: usb@1c19000 {
 			/* compatible gets set in SoC specific dtsi file */
 			reg = <0x01c19000 0x0400>;
@@ -215,6 +284,7 @@ 
 			phys = <&usbphy 0>;
 			phy-names = "usb";
 			extcon = <&usbphy 0>;
+			dr_mode = "otg";
 			status = "disabled";
 		};
 
@@ -276,22 +346,30 @@ 
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
-			uart0_pins_a: uart0@0 {
-				pins = "PF2", "PF4";
-				function = "uart0";
+			i2c0_pins: i2c0-pins {
+				pins = "PH2", "PH3";
+				function = "i2c0";
 			};
 
-			uart1_pins_a: uart1@0 {
-				pins = "PG6", "PG7";
-				function = "uart1";
+			i2c1_pins: i2c1-pins {
+				pins = "PH4", "PH5";
+				function = "i2c1";
 			};
 
-			uart1_pins_cts_rts_a: uart1-cts-rts@0 {
-				pins = "PG8", "PG9";
-				function = "uart1";
+			i2c2_pins: i2c2-pins {
+				pins = "PE12", "PE13";
+				function = "i2c2";
 			};
 
-			mmc0_pins_a: mmc0@0 {
+			lcd_rgb666_pins: lcd-rgb666-pins {
+				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+				       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
+				       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
+				       "PD24", "PD25", "PD26", "PD27";
+				function = "lcd0";
+			};
+
+			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 				       "PF3", "PF4", "PF5";
 				function = "mmc0";
@@ -299,7 +377,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc1_pins_a: mmc1@0 {
+			mmc1_pg_pins: mmc1-pg-pins {
 				pins = "PG0", "PG1", "PG2",
 				       "PG3", "PG4", "PG5";
 				function = "mmc1";
@@ -307,7 +385,7 @@ 
 				bias-pull-up;
 			};
 
-			mmc2_8bit_pins: mmc2_8bit {
+			mmc2_8bit_pins: mmc2-8bit-pins {
 				pins = "PC5", "PC6", "PC8",
 				       "PC9", "PC10", "PC11",
 				       "PC12", "PC13", "PC14",
@@ -324,61 +402,53 @@ 
 				function = "nand0";
 			};
 
-			nand_pins_cs0: nand-pins-cs0 {
+			nand_cs0_pin: nand-cs0-pin {
 				pins = "PC4";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_cs1: nand-pins-cs1 {
+			nand_cs1_pin: nand-cs1-pin {
 				pins = "PC3";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_rb0: nand-pins-rb0 {
+			nand_rb0_pin: nand-rb0-pin {
 				pins = "PC6";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			nand_pins_rb1: nand-pins-rb1 {
+			nand_rb1_pin: nand-rb1-pin {
 				pins = "PC7";
 				function = "nand0";
 				bias-pull-up;
 			};
 
-			pwm0_pins: pwm0 {
+			pwm0_pin: pwm0-pin {
 				pins = "PH0";
 				function = "pwm0";
 			};
 
-			i2c0_pins_a: i2c0@0 {
-				pins = "PH2", "PH3";
-				function = "i2c0";
-			};
-
-			i2c1_pins_a: i2c1@0 {
-				pins = "PH4", "PH5";
-				function = "i2c1";
+			uart0_pf_pins: uart0-pf-pins {
+				pins = "PF2", "PF4";
+				function = "uart0";
 			};
 
-			i2c2_pins_a: i2c2@0 {
-				pins = "PE12", "PE13";
-				function = "i2c2";
+			uart1_pg_pins: uart1-pg-pins {
+				pins = "PG6", "PG7";
+				function = "uart1";
 			};
 
-			lcd_rgb666_pins: lcd-rgb666@0 {
-				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
-				       "PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
-				       "PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
-				       "PD24", "PD25", "PD26", "PD27";
-				function = "lcd0";
+			uart1_cts_rts_pg_pins: uart1-cts-rts-pg-pins {
+				pins = "PG8", "PG9";
+				function = "uart1";
 			};
 		};
 
 		timer@1c20c00 {
-			compatible = "allwinner,sun4i-a10-timer";
+			compatible = "allwinner,sun8i-a23-timer";
 			reg = <0x01c20c00 0xa0>;
 			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -389,6 +459,7 @@ 
 			compatible = "allwinner,sun6i-a31-wdt";
 			reg = <0x01c20ca0 0x20>;
 			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&osc24M>;
 		};
 
 		pwm: pwm@1c21400 {
@@ -477,6 +548,8 @@ 
 			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_I2C0>;
 			resets = <&ccu RST_BUS_I2C0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c0_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -488,6 +561,8 @@ 
 			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_I2C1>;
 			resets = <&ccu RST_BUS_I2C1>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c1_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -499,6 +574,8 @@ 
 			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_I2C2>;
 			resets = <&ccu RST_BUS_I2C2>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2_pins>;
 			status = "disabled";
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -532,7 +609,7 @@ 
 		};
 
 		gic: interrupt-controller@1c81000 {
-			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+			compatible = "arm,gic-400";
 			reg = <0x01c81000 0x1000>,
 			      <0x01c82000 0x2000>,
 			      <0x01c84000 0x2000>,
@@ -542,17 +619,104 @@ 
 			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 		};
 
+		fe0: display-frontend@1e00000 {
+			/* compatible gets set in SoC specific dtsi file */
+			reg = <0x01e00000 0x20000>;
+			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
+				 <&ccu CLK_DRAM_DE_FE>;
+			clock-names = "ahb", "mod",
+				      "ram";
+			resets = <&ccu RST_BUS_DE_FE>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				fe0_out: port@1 {
+					reg = <1>;
+
+					fe0_out_be0: endpoint {
+						remote-endpoint = <&be0_in_fe0>;
+					};
+				};
+			};
+		};
+
+		be0: display-backend@1e60000 {
+			/* compatible gets set in SoC specific dtsi file */
+			reg = <0x01e60000 0x10000>;
+			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
+				 <&ccu CLK_DRAM_DE_BE>;
+			clock-names = "ahb", "mod",
+				      "ram";
+			resets = <&ccu RST_BUS_DE_BE>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				be0_in: port@0 {
+					reg = <0>;
+
+					be0_in_fe0: endpoint {
+						remote-endpoint = <&fe0_out_be0>;
+					};
+				};
+
+				be0_out: port@1 {
+					reg = <1>;
+
+					be0_out_drc0: endpoint {
+						remote-endpoint = <&drc0_in_be0>;
+					};
+				};
+			};
+		};
+
+		drc0: drc@1e70000 {
+			/* compatible gets set in SoC specific dtsi file */
+			reg = <0x01e70000 0x10000>;
+			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>,
+				 <&ccu CLK_DRAM_DRC>;
+			clock-names = "ahb", "mod", "ram";
+			resets = <&ccu RST_BUS_DRC>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				drc0_in: port@0 {
+					reg = <0>;
+
+					drc0_in_be0: endpoint {
+						remote-endpoint = <&be0_out_drc0>;
+					};
+				};
+
+				drc0_out: port@1 {
+					reg = <1>;
+
+					drc0_out_tcon0: endpoint {
+						remote-endpoint = <&tcon0_in_drc0>;
+					};
+				};
+			};
+		};
+
 		rtc: rtc@1f00000 {
-			compatible = "allwinner,sun6i-a31-rtc";
-			reg = <0x01f00000 0x54>;
+			compatible = "allwinner,sun8i-a23-rtc";
+			reg = <0x01f00000 0x400>;
 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-			clock-output-names = "osc32k";
+			clock-output-names = "osc32k", "osc32k-out";
 			clocks = <&ext_osc32k>;
 			#clock-cells = <1>;
 		};
 
-		nmi_intc: interrupt-controller@1f00c00 {
+		r_intc: interrupt-controller@1f00c00 {
 			compatible = "allwinner,sun6i-a31-r-intc";
 			interrupt-controller;
 			#interrupt-cells = <2>;
@@ -624,6 +788,20 @@ 
 			status = "disabled";
 		};
 
+		r_i2c: i2c@1f02400 {
+			compatible = "allwinner,sun8i-a23-i2c",
+				     "allwinner,sun6i-a31-i2c";
+			reg = <0x01f02400 0x400>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&r_i2c_pins>;
+			clocks = <&apb0_gates 6>;
+			resets = <&apb0_rst 6>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		r_pio: pinctrl@1f02c00 {
 			compatible = "allwinner,sun8i-a23-r-pinctrl";
 			reg = <0x01f02c00 0x400>;
@@ -634,18 +812,22 @@ 
 			gpio-controller;
 			interrupt-controller;
 			#interrupt-cells = <3>;
-			#address-cells = <1>;
-			#size-cells = <0>;
 			#gpio-cells = <3>;
 
-			r_rsb_pins: r_rsb {
+			r_i2c_pins: r-i2c-pins {
+				pins = "PL0", "PL1";
+				function = "s_i2c";
+				bias-pull-up;
+			};
+
+			r_rsb_pins: r-rsb-pins {
 				pins = "PL0", "PL1";
 				function = "s_rsb";
 				drive-strength = <20>;
 				bias-pull-up;
 			};
 
-			r_uart_pins_a: r_uart@0 {
+			r_uart_pins_a: r-uart-pins {
 				pins = "PL2", "PL3";
 				function = "s_uart";
 			};
diff --git a/arch/arm/dts/sun8i-a23-evb.dts b/arch/arm/dts/sun8i-a23-evb.dts
index 8a93697df3..53fb1be040 100644
--- a/arch/arm/dts/sun8i-a23-evb.dts
+++ b/arch/arm/dts/sun8i-a23-evb.dts
@@ -65,14 +65,10 @@ 
 };
 
 &i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
 	status = "okay";
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 };
 
@@ -80,21 +76,21 @@ 
 	vref-supply = <&reg_vcc3v0>;
 	status = "okay";
 
-	button@190 {
+	button-190 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <190000>;
 	};
 
-	button@390 {
+	button-390 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
 		voltage = <390000>;
 	};
 
-	button@600 {
+	button-600 {
 		label = "Home";
 		linux,code = <KEY_HOME>;
 		channel = <0>;
@@ -103,22 +99,12 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_evb>;
 	vmmc-supply = <&reg_vcc3v0>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_evb: mmc0_cd_pin@0 {
-		pins = "PB4";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 /*
  * The RX line has a non-populated resistance. In order to use it, you
  * need to solder R207 on the back of the board in order to close the
diff --git a/arch/arm/dts/sun8i-a23-gt90h-v4.dts b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
index e3c7a25ca3..bcbc9b0758 100644
--- a/arch/arm/dts/sun8i-a23-gt90h-v4.dts
+++ b/arch/arm/dts/sun8i-a23-gt90h-v4.dts
@@ -63,7 +63,7 @@ 
 };
 
 &lradc {
-	button@600 {
+	button-600 {
 		label = "Back";
 		linux,code = <KEY_BACK>;
 		channel = <0>;
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
new file mode 100644
index 0000000000..51097c77a1
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v1.2.dts
@@ -0,0 +1,73 @@ 
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a23.dtsi"
+#include "sun8i-q8-common.dtsi"
+
+/ {
+	model = "Q8 A23 Tablet";
+	compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
+};
+
+&codec {
+	allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+	allwinner,audio-routing =
+		"Headphone", "HP",
+		"Headphone", "HPCOM",
+		"Speaker", "HP",
+		"MIC1", "Mic",
+		"MIC2", "Headset Mic",
+		"Mic",  "MBIAS",
+		"Headset Mic", "HBIAS";
+	status = "okay";
+};
+
+&panel {
+	compatible = "bananapi,s070wv20-ct16";
+};
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint {
+		remote-endpoint = <&panel_input>;
+	};
+};
diff --git a/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
new file mode 100644
index 0000000000..51097c77a1
--- /dev/null
+++ b/arch/arm/dts/sun8i-a23-ippo-q8h-v5.dts
@@ -0,0 +1,73 @@ 
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a23.dtsi"
+#include "sun8i-q8-common.dtsi"
+
+/ {
+	model = "Q8 A23 Tablet";
+	compatible = "allwinner,q8-a23", "allwinner,sun8i-a23";
+};
+
+&codec {
+	allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+	allwinner,audio-routing =
+		"Headphone", "HP",
+		"Headphone", "HPCOM",
+		"Speaker", "HP",
+		"MIC1", "Mic",
+		"MIC2", "Headset Mic",
+		"Mic",  "MBIAS",
+		"Headset Mic", "HBIAS";
+	status = "okay";
+};
+
+&panel {
+	compatible = "bananapi,s070wv20-ct16";
+};
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint {
+		remote-endpoint = <&panel_input>;
+	};
+};
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
index 649e313396..d5f6aebd72 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2407pxe03.dts
@@ -54,8 +54,6 @@ 
 
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_pwrseq_pin_mid2407>;
 		reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
 		/* The esp8089 needs 200 ms after driving wifi-en high */
 		post-power-on-delay-ms = <200>;
@@ -71,7 +69,7 @@ 
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_dldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -85,17 +83,6 @@ 
 	};
 };
 
-&mmc1_pins_a {
-	bias-pull-up;
-};
-
-&r_pio {
-	wifi_pwrseq_pin_mid2407: wifi_pwrseq_pin@0 {
-		pins = "PL6";
-		function = "gpio_out";
-	};
-};
-
 &touchscreen {
 	reg = <0x40>;
 	compatible = "silead,gsl1680";
diff --git a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
index 6b3bcae089..9f9232a2fe 100644
--- a/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
+++ b/arch/arm/dts/sun8i-a23-polaroid-mid2809pxe04.dts
@@ -54,8 +54,6 @@ 
 
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_pwrseq_pin_mid2809>;
 		reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
 		/* The esp8089 needs 200 ms after driving wifi-en high */
 		post-power-on-delay-ms = <200>;
@@ -64,7 +62,7 @@ 
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_dldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -78,17 +76,6 @@ 
 	};
 };
 
-&mmc1_pins_a {
-	bias-pull-up;
-};
-
-&r_pio {
-	wifi_pwrseq_pin_mid2809: wifi_pwrseq_pin@0 {
-		pins = "PL6";
-		function = "gpio_out";
-	};
-};
-
 &touchscreen {
 	reg = <0x40>;
 	compatible = "silead,gsl3670";
diff --git a/arch/arm/dts/sun8i-a23-q8-tablet.dts b/arch/arm/dts/sun8i-a23-q8-tablet.dts
index b6958e8f2f..51097c77a1 100644
--- a/arch/arm/dts/sun8i-a23-q8-tablet.dts
+++ b/arch/arm/dts/sun8i-a23-q8-tablet.dts
@@ -61,3 +61,13 @@ 
 		"Headset Mic", "HBIAS";
 	status = "okay";
 };
+
+&panel {
+	compatible = "bananapi,s070wv20-ct16";
+};
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint {
+		remote-endpoint = <&panel_input>;
+	};
+};
diff --git a/arch/arm/dts/sun8i-a23.dtsi b/arch/arm/dts/sun8i-a23.dtsi
index 58e6585b50..a5e884a8b2 100644
--- a/arch/arm/dts/sun8i-a23.dtsi
+++ b/arch/arm/dts/sun8i-a23.dtsi
@@ -45,11 +45,7 @@ 
 #include "sun8i-a23-a33.dtsi"
 
 / {
-	memory {
-		reg = <0x40000000 0x40000000>;
-	};
-
-	soc@1c00000 {
+	soc {
 		codec: codec@1c22c00 {
 			#sound-dai-cells = <0>;
 			compatible = "allwinner,sun8i-a23-codec";
@@ -66,10 +62,26 @@ 
 	};
 };
 
+&be0 {
+	compatible = "allwinner,sun8i-a23-display-backend";
+};
+
 &ccu {
 	compatible = "allwinner,sun8i-a23-ccu";
 };
 
+&de {
+	compatible = "allwinner,sun8i-a23-display-engine";
+};
+
+&drc0 {
+	compatible = "allwinner,sun8i-a23-drc";
+};
+
+&fe0 {
+	compatible = "allwinner,sun8i-a23-display-frontend";
+};
+
 &pio {
 	compatible = "allwinner,sun8i-a23-pinctrl";
 	interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
@@ -77,6 +89,10 @@ 
 		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 };
 
+&tcon0 {
+	compatible = "allwinner,sun8i-a23-tcon";
+};
+
 &usb_otg {
 	compatible = "allwinner,sun6i-a31-musb";
 };
diff --git a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
similarity index 81%
rename from arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
rename to arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
index e5590208ed..9c5750c256 100644
--- a/arch/arm/dts/sun8i-r16-nintendo-nes-classic-edition.dts
+++ b/arch/arm/dts/sun8i-a33-et-q8-v1.6.dts
@@ -1,5 +1,5 @@ 
 /*
- * Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
@@ -42,34 +42,16 @@ 
 
 /dts-v1/;
 #include "sun8i-a33.dtsi"
+#include "sun8i-q8-common.dtsi"
 
 / {
-	model = "Nintendo NES Classic Edition";
-	compatible = "nintendo,nes-classic-edition", "allwinner,sun8i-a33";
-
-	aliases {
-		serial0 = &uart0;
-	};
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-	};
+	model = "Q8 A33 Tablet";
+	compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
 };
 
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_a>;
-	status = "okay";
-};
-
-&nfc {
-	status = "okay";
-
-	nand@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
+&tcon0_out {
+	tcon0_out_lcd: endpoint@0 {
 		reg = <0>;
-		allwinner,rb = <0>;
-		nand-ecc-mode = "hw";
+		remote-endpoint = <&panel_input>;
 	};
 };
diff --git a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
index f71159987c..2dfdd0a315 100644
--- a/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
+++ b/arch/arm/dts/sun8i-a33-ga10h-v1.1.dts
@@ -69,7 +69,7 @@ 
 };
 
 &lradc {
-	button@600 {
+	button-600 {
 		label = "Back";
 		linux,code = <KEY_BACK>;
 		channel = <0>;
@@ -79,7 +79,7 @@ 
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_dldo1>;
 	bus-width = <4>;
 	non-removable;
diff --git a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
index 3e05959104..065cb620aa 100644
--- a/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
+++ b/arch/arm/dts/sun8i-a33-inet-d978-rev2.dts
@@ -63,20 +63,16 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&led_pin_d978>;
 
-		home {
+		led {
 			label = "d978:blue:home";
 			gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
 		};
 	};
 };
 
-&mmc1_pins_a {
-	bias-pull-up;
-};
-
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_dldo1>;
 	bus-width = <4>;
 	non-removable;
@@ -88,7 +84,7 @@ 
 };
 
 &r_pio {
-	led_pin_d978: led_pin_d978@0 {
+	led_pin_d978: led-pin {
 		pins = "PL5";
 		function = "gpio_out";
 		drive-strength = <20>;
@@ -101,7 +97,7 @@ 
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_a>,
-		    <&uart1_pins_cts_rts_a>;
+	pinctrl-0 = <&uart1_pg_pins>,
+		    <&uart1_cts_rts_pg_pins>;
 	status = "okay";
 };
diff --git a/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
new file mode 100644
index 0000000000..9c5750c256
--- /dev/null
+++ b/arch/arm/dts/sun8i-a33-ippo-q8h-v1.2.dts
@@ -0,0 +1,57 @@ 
+/*
+ * Copyright 2015 Hans de Goede <hdegoede@redhat.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sun8i-q8-common.dtsi"
+
+/ {
+	model = "Q8 A33 Tablet";
+	compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
+};
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint@0 {
+		reg = <0>;
+		remote-endpoint = <&panel_input>;
+	};
+};
diff --git a/arch/arm/dts/sun8i-a33-olinuxino.dts b/arch/arm/dts/sun8i-a33-olinuxino.dts
index a1a1eb64ca..8538514c85 100644
--- a/arch/arm/dts/sun8i-a33-olinuxino.dts
+++ b/arch/arm/dts/sun8i-a33-olinuxino.dts
@@ -62,7 +62,7 @@ 
 	leds {
 		compatible = "gpio-leds";
 
-		green {
+		led {
 			label = "a33-olinuxino:green:usr";
 			gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>;
 		};
@@ -82,8 +82,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
@@ -100,7 +98,7 @@ 
 	axp22x: pmic@3a3 {
 		compatible = "x-powers,axp223";
 		reg = <0x3a3>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		eldoin-supply = <&reg_dcdc1>;
 		x-powers,drive-vbus-en;
@@ -196,8 +194,8 @@ 
 				    "Headphone", "Headphone Jack";
 	/* Board level routing. First 2 routes copied from SoC level */
 	simple-audio-card,routing =
-		"Left DAC", "AIF1 Slot 0 Left",
-		"Right DAC", "AIF1 Slot 0 Right",
+		"Left DAC", "DACL",
+		"Right DAC", "DACR",
 		"HP", "HPCOM",
 		"Headphone Jack", "HP",
 		"MIC1", "Microphone Jack",
@@ -207,7 +205,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_b>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun8i-a33-q8-tablet.dts b/arch/arm/dts/sun8i-a33-q8-tablet.dts
index b0bc2360f8..9c5750c256 100644
--- a/arch/arm/dts/sun8i-a33-q8-tablet.dts
+++ b/arch/arm/dts/sun8i-a33-q8-tablet.dts
@@ -48,3 +48,10 @@ 
 	model = "Q8 A33 Tablet";
 	compatible = "allwinner,q8-a33", "allwinner,sun8i-a33";
 };
+
+&tcon0_out {
+	tcon0_out_lcd: endpoint@0 {
+		reg = <0>;
+		remote-endpoint = <&panel_input>;
+	};
+};
diff --git a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
index 541acb4d2b..d54a067fc7 100644
--- a/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/dts/sun8i-a33-sinlinx-sina33.dts
@@ -63,16 +63,10 @@ 
 
 	panel {
 		compatible = "netron-dy,e231732";
-		#address-cells = <1>;
-		#size-cells = <0>;
+		power-supply = <&reg_vcc3v3>;
 
-		port@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			panel_input: endpoint@0 {
-				reg = <0>;
+		port {
+			panel_input: endpoint {
 				remote-endpoint = <&tcon0_out_panel>;
 			};
 		};
@@ -117,21 +111,21 @@ 
 	vref-supply = <&reg_dcdc1>;
 	status = "okay";
 
-	button@200 {
+	button-200 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <191011>;
 	};
 
-	button@400 {
+	button-400 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
 		voltage = <391304>;
 	};
 
-	button@600 {
+	button-600 {
 		label = "Home";
 		linux,code = <KEY_HOME>;
 		channel = <0>;
@@ -140,8 +134,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_sina33>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
@@ -161,29 +153,19 @@ 
 &mmc2_8bit_pins {
 	/* Increase drive strength for DDR modes */
 	drive-strength = <40>;
-	/* eMMC is missing pull-ups */
-	bias-pull-up;
 };
 
 &ohci0 {
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_sina33: mmc0_cd_pin@0 {
-		pins = "PB4";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &r_rsb {
 	status = "okay";
 
 	axp22x: pmic@3a3 {
 		compatible = "x-powers,axp223";
 		reg = <0x3a3>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		eldoin-supply = <&reg_dcdc1>;
 	};
@@ -278,7 +260,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_b>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi
index 8d278ee001..b3d1bdfb51 100644
--- a/arch/arm/dts/sun8i-a33.dtsi
+++ b/arch/arm/dts/sun8i-a33.dtsi
@@ -46,7 +46,7 @@ 
 #include <dt-bindings/thermal/thermal.h>
 
 / {
-	cpu0_opp_table: opp_table0 {
+	cpu0_opp_table: opp-table-cpu {
 		compatible = "operating-points-v2";
 		opp-shared;
 
@@ -131,37 +131,40 @@ 
 			#cooling-cells = <2>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
+			clocks = <&ccu CLK_CPUX>;
+			clock-names = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
+			#cooling-cells = <2>;
 		};
 
-		cpu@2 {
+		cpu2: cpu@2 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <2>;
+			clocks = <&ccu CLK_CPUX>;
+			clock-names = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
+			#cooling-cells = <2>;
 		};
 
-		cpu@3 {
+		cpu3: cpu@3 {
 			compatible = "arm,cortex-a7";
 			device_type = "cpu";
 			reg = <3>;
+			clocks = <&ccu CLK_CPUX>;
+			clock-names = "cpu";
 			operating-points-v2 = <&cpu0_opp_table>;
+			#cooling-cells = <2>;
 		};
 	};
 
-	de: display-engine {
-		compatible = "allwinner,sun8i-a33-display-engine";
-		allwinner,pipelines = <&fe0>;
-		status = "disabled";
-	};
-
 	iio-hwmon {
 		compatible = "iio-hwmon";
 		io-channels = <&ths>;
 	};
 
-	mali_opp_table: gpu-opp-table {
+	mali_opp_table: opp-table-gpu {
 		compatible = "operating-points-v2";
 
 		opp-144000000 {
@@ -177,21 +180,17 @@ 
 		};
 	};
 
-	memory {
-		reg = <0x40000000 0x80000000>;
-	};
-
 	sound: sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,name = "sun8i-a33-audio";
 		simple-audio-card,format = "i2s";
 		simple-audio-card,frame-master = <&link_codec>;
 		simple-audio-card,bitclock-master = <&link_codec>;
-		simple-audio-card,mclk-fs = <512>;
+		simple-audio-card,mclk-fs = <128>;
 		simple-audio-card,aux-devs = <&codec_analog>;
 		simple-audio-card,routing =
-			"Left DAC", "AIF1 Slot 0 Left",
-			"Right DAC", "AIF1 Slot 0 Right";
+			"Left DAC", "DACL",
+			"Right DAC", "DACR";
 		status = "disabled";
 
 		simple-audio-card,cpu {
@@ -199,54 +198,24 @@ 
 		};
 
 		link_codec: simple-audio-card,codec {
-			sound-dai = <&codec>;
+			sound-dai = <&codec 0>;
 		};
 	};
 
-	soc@1c00000 {
-		tcon0: lcd-controller@1c0c000 {
-			compatible = "allwinner,sun8i-a33-tcon";
-			reg = <0x01c0c000 0x1000>;
-			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_LCD>,
-				 <&ccu CLK_LCD_CH0>;
-			clock-names = "ahb",
-				      "tcon-ch0";
-			clock-output-names = "tcon-pixel-clock";
-			resets = <&ccu RST_BUS_LCD>;
-			reset-names = "lcd";
-			status = "disabled";
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				tcon0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <0>;
-
-					tcon0_in_drc0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&drc0_out_tcon0>;
-					};
-				};
-
-				tcon0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <1>;
-
-					tcon0_out_dsi: endpoint@1 {
-						reg = <1>;
-						remote-endpoint = <&dsi_in_tcon0>;
-					};
-				};
-			};
+	soc {
+		video-codec@1c0e000 {
+			compatible = "allwinner,sun8i-a33-video-engine";
+			reg = <0x01c0e000 0x1000>;
+			clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+				 <&ccu CLK_DRAM_VE>;
+			clock-names = "ahb", "mod", "ram";
+			resets = <&ccu RST_BUS_VE>;
+			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+			allwinner,sram = <&ve_sram 1>;
 		};
 
 		crypto: crypto-engine@1c15000 {
-			compatible = "allwinner,sun4i-a10-crypto";
+			compatible = "allwinner,sun8i-a33-crypto";
 			reg = <0x01c15000 0x1000>;
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
@@ -269,7 +238,7 @@ 
 		};
 
 		codec: codec@1c22e00 {
-			#sound-dai-cells = <0>;
+			#sound-dai-cells = <1>;
 			compatible = "allwinner,sun8i-a33-codec";
 			reg = <0x01c22e00 0x400>;
 			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
@@ -296,19 +265,12 @@ 
 			phys = <&dphy>;
 			phy-names = "dphy";
 			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
 
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <0>;
-
-					dsi_in_tcon0: endpoint {
-						remote-endpoint = <&tcon0_out_dsi>;
-					};
+			port {
+				dsi_in_tcon0: endpoint {
+					remote-endpoint = <&tcon0_out_dsi>;
 				};
 			};
 		};
@@ -323,119 +285,10 @@ 
 			status = "disabled";
 			#phy-cells = <0>;
 		};
-
-		fe0: display-frontend@1e00000 {
-			compatible = "allwinner,sun8i-a33-display-frontend";
-			reg = <0x01e00000 0x20000>;
-			interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_DE_FE>, <&ccu CLK_DE_FE>,
-				 <&ccu CLK_DRAM_DE_FE>;
-			clock-names = "ahb", "mod",
-				      "ram";
-			resets = <&ccu RST_BUS_DE_FE>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				fe0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <1>;
-
-					fe0_out_be0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&be0_in_fe0>;
-					};
-				};
-			};
-		};
-
-		be0: display-backend@1e60000 {
-			compatible = "allwinner,sun8i-a33-display-backend";
-			reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
-			reg-names = "be", "sat";
-			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
-				 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
-			clock-names = "ahb", "mod",
-				      "ram", "sat";
-			resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
-			reset-names = "be", "sat";
-			assigned-clocks = <&ccu CLK_DE_BE>;
-			assigned-clock-rates = <300000000>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				be0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <0>;
-
-					be0_in_fe0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&fe0_out_be0>;
-					};
-				};
-
-				be0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <1>;
-
-					be0_out_drc0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&drc0_in_be0>;
-					};
-				};
-			};
-		};
-
-		drc0: drc@1e70000 {
-			compatible = "allwinner,sun8i-a33-drc";
-			reg = <0x01e70000 0x10000>;
-			interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&ccu CLK_BUS_DRC>, <&ccu CLK_DRC>,
-				 <&ccu CLK_DRAM_DRC>;
-			clock-names = "ahb", "mod", "ram";
-			resets = <&ccu RST_BUS_DRC>;
-
-			assigned-clocks = <&ccu CLK_DRC>;
-			assigned-clock-rates = <300000000>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				drc0_in: port@0 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <0>;
-
-					drc0_in_be0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&be0_out_drc0>;
-					};
-				};
-
-				drc0_out: port@1 {
-					#address-cells = <1>;
-					#size-cells = <0>;
-					reg = <1>;
-
-					drc0_out_tcon0: endpoint@0 {
-						reg = <0>;
-						remote-endpoint = <&tcon0_in_drc0>;
-					};
-				};
-			};
-		};
 	};
 
 	thermal-zones {
-		cpu_thermal {
+		cpu-thermal {
 			/* milliseconds */
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
@@ -444,11 +297,17 @@ 
 			cooling-maps {
 				map0 {
 					trip = <&cpu_alert0>;
-					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 				map1 {
 					trip = <&cpu_alert1>;
-					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 
 				map2 {
@@ -502,10 +361,35 @@ 
 	};
 };
 
+&be0 {
+	compatible = "allwinner,sun8i-a33-display-backend";
+	/* A33 has an extra "SAT" module packed inside the display backend */
+	reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
+	reg-names = "be", "sat";
+	clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
+		 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
+	clock-names = "ahb", "mod",
+		      "ram", "sat";
+	resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
+	reset-names = "be", "sat";
+};
+
 &ccu {
 	compatible = "allwinner,sun8i-a33-ccu";
 };
 
+&de {
+	compatible = "allwinner,sun8i-a33-display-engine";
+};
+
+&drc0 {
+	compatible = "allwinner,sun8i-a33-drc";
+};
+
+&fe0 {
+	compatible = "allwinner,sun8i-a33-display-frontend";
+};
+
 &mali {
 	operating-points-v2 = <&mali_opp_table>;
 };
@@ -515,13 +399,27 @@ 
 	interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 
-	uart0_pins_b: uart0@1 {
+	uart0_pb_pins: uart0-pb-pins {
 		pins = "PB0", "PB1";
 		function = "uart0";
 	};
 
 };
 
+&tcon0 {
+	compatible = "allwinner,sun8i-a33-tcon";
+};
+
+&tcon0_out {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	tcon0_out_dsi: endpoint@1 {
+		reg = <1>;
+		remote-endpoint = <&dsi_in_tcon0>;
+	};
+};
+
 &usb_otg {
 	compatible = "allwinner,sun8i-a33-musb";
 };
diff --git a/arch/arm/dts/sun8i-q8-common.dtsi b/arch/arm/dts/sun8i-q8-common.dtsi
index c676940a96..3d9a1524e1 100644
--- a/arch/arm/dts/sun8i-q8-common.dtsi
+++ b/arch/arm/dts/sun8i-q8-common.dtsi
@@ -49,6 +49,19 @@ 
 		ethernet0 = &sdio_wifi;
 	};
 
+	panel: panel {
+		/* Tablet dts should provide panel compatible */
+		backlight = <&backlight>;
+		enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+		power-supply = <&reg_dc1sw>;
+
+		port {
+			panel_input: endpoint {
+				remote-endpoint = <&tcon0_out_lcd>;
+			};
+		};
+	};
+
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		/*
@@ -64,13 +77,17 @@ 
 	};
 };
 
+&de {
+	status = "okay";
+};
+
 &ehci0 {
 	status  = "okay";
 };
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_dldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -82,18 +99,20 @@ 
 	};
 };
 
-&mmc1_pins_a {
-	bias-pull-up;
-};
-
 &r_pio {
-	wifi_pwrseq_pin_q8: wifi_pwrseq_pin@0 {
+	wifi_pwrseq_pin_q8: wifi-pwrseq-pins {
 		pins = "PL6", "PL7", "PL11";
 		function = "gpio_in";
 		bias-pull-up;
 	};
 };
 
+&tcon0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&lcd_rgb666_pins>;
+	status = "okay";
+};
+
 &usbphy {
 	usb1_vbus-supply = <&reg_dldo1>;
 };
diff --git a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
index 0dbdb29a8f..293016d081 100644
--- a/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/dts/sun8i-r16-bananapi-m2m.dts
@@ -64,17 +64,17 @@ 
 	leds {
 		compatible = "gpio-leds";
 
-		blue {
+		led-0 {
 			label = "bpi-m2m:blue:usr";
 			gpios = <&pio 2 7 GPIO_ACTIVE_LOW>;
 		};
 
-		green {
+		led-1 {
 			label = "bpi-m2m:green:usr";
 			gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>;
 		};
 
-		red {
+		led-2 {
 			label = "bpi-m2m:red:power";
 			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
 			default-state = "on";
@@ -91,6 +91,8 @@ 
 	wifi_pwrseq: wifi_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
+		clocks = <&rtc 1>;
+		clock-names = "ext_clock";
 	};
 };
 
@@ -103,13 +105,13 @@ 
 };
 
 &cpu0_opp_table {
-	opp@1104000000 {
+	opp-1104000000 {
 		opp-hz = /bits/ 64 <1104000000>;
 		opp-microvolt = <1320000>;
 		clock-latency-ns = <244144>; /* 8 32k periods */
 	};
 
-	opp@1200000000 {
+	opp-1200000000 {
 		opp-hz = /bits/ 64 <1200000000>;
 		opp-microvolt = <1320000>;
 		clock-latency-ns = <244144>; /* 8 32k periods */
@@ -124,30 +126,7 @@ 
 	status = "okay";
 };
 
-/* This is the i2c bus exposed on the DSI connector for the touch panel */
-&i2c0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
-	status = "disabled";
-};
-
-/* This is the i2c bus exposed on the GPIO header */
-&i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
-	status = "disabled";
-};
-
-/* This is the i2c bus exposed on the CSI connector to control the sensor */
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_a>;
-	status = "disabled";
-};
-
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
@@ -156,7 +135,7 @@ 
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_aldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -184,7 +163,7 @@ 
 	axp22x: pmic@3a3 {
 		compatible = "x-powers,axp223";
 		reg = <0x3a3>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		eldoin-supply = <&reg_dcdc1>;
 		x-powers,drive-vbus-en;
@@ -292,14 +271,26 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_b>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
 &uart1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1_pins_a>, <&uart1_pins_cts_rts_a>;
+	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>;
+	uart-has-rtscts;
 	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		clocks = <&rtc 1>;
+		clock-names = "lpo";
+		vbat-supply = <&reg_dldo1>;
+		vddio-supply = <&reg_aldo3>;
+		device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+		host-wakeup-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+		shutdown-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+	};
 };
 
 &usb_otg {
diff --git a/arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts b/arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts
new file mode 100644
index 0000000000..246dec5846
--- /dev/null
+++ b/arch/arm/dts/sun8i-r16-nintendo-nes-classic.dts
@@ -0,0 +1,54 @@ 
+// SPDX-License-Identifier: GPL-2.0 OR X11
+/* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com> */
+
+/dts-v1/;
+#include "sun8i-a33.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+/ {
+	model = "Nintendo NES Classic Edition";
+	compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
+		     "allwinner,sun8i-a33";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+};
+
+&uart0 {
+	/*
+	 * UART0 is available on two ports: PB and PF, both are accessible.
+	 * PF can also be used for the SD card so PB is preferred.
+	 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pf_pins>;
+	status = "okay";
+};
+
+&nfc {
+	status = "okay";
+
+	/* 2Gb Macronix MX30LF2G18AC (3V) */
+	nand@0 {
+		reg = <0>;
+		allwinner,rb = <0>;
+		nand-ecc-mode = "hw";
+		nand-ecc-strength = <16>;
+		nand-ecc-step-size = <1024>;
+	};
+};
+
+&usb_otg {
+	status = "okay";
+	dr_mode = "otg";
+};
+
+&usbphy {
+	/* VBUS is always on because it is wired to the power supply */
+	usb1_vbus-supply = <&reg_vcc5v0>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-r16-nintendo-super-nes-classic.dts b/arch/arm/dts/sun8i-r16-nintendo-super-nes-classic.dts
new file mode 100644
index 0000000000..80761d7904
--- /dev/null
+++ b/arch/arm/dts/sun8i-r16-nintendo-super-nes-classic.dts
@@ -0,0 +1,11 @@ 
+// SPDX-License-Identifier: GPL-2.0 OR X11
+/* Copyright (c) 2018 Miquèl RAYNAL <miquel.raynal@bootlin.com> */
+
+/dts-v1/;
+#include "sun8i-r16-nintendo-nes-classic.dts"
+
+/ {
+	model = "Nintendo SuperNES Classic Edition";
+	compatible = "nintendo,super-nes-classic", "nintendo,nes-classic",
+		     "allwinner,sun8i-r16", "allwinner,sun8i-a33";
+};
diff --git a/arch/arm/dts/sun8i-r16-parrot.dts b/arch/arm/dts/sun8i-r16-parrot.dts
index 472c03b7ae..2be1b76fe2 100644
--- a/arch/arm/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/dts/sun8i-r16-parrot.dts
@@ -63,17 +63,15 @@ 
 
 	leds {
 		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&led_pins_parrot>;
 
-		led1 {
+		led-1 {
 			label = "parrot:led1:usr";
-			gpio = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
+			gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */
 		};
 
-		led2 {
+		led-2 {
 			label = "parrot:led2:usr";
-			gpio = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
+			gpios = <&pio 4 16 GPIO_ACTIVE_HIGH>; /* PE16 */
 		};
 	};
 
@@ -97,8 +95,6 @@ 
 };
 
 &i2c1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
 	status = "okay";
 
 	/*
@@ -111,14 +107,14 @@ 
 	vref-supply = <&reg_aldo3>;
 	status = "okay";
 
-	button@0 {
+	button-190 {
 		label = "V+";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <190000>;
 	};
 
-	button@1 {
+	button-390 {
 		label = "V-";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -128,8 +124,6 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_parrot>;
 	vmmc-supply = <&reg_dcdc1>;
 	cd-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
 	bus-width = <4>;
@@ -138,7 +132,7 @@ 
 
 &mmc1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mmc1_pins_a>, <&wifi_reset_pin_parrot>;
+	pinctrl-0 = <&mmc1_pg_pins>;
 	vmmc-supply = <&reg_aldo1>;
 	mmc-pwrseq = <&wifi_pwrseq>;
 	bus-width = <4>;
@@ -158,51 +152,19 @@ 
 
 &mmc2_8bit_pins {
 	drive-strength = <40>;
-	bias-pull-up;
 };
 
 &ohci0 {
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin_parrot: mmc0_cd_pin@0 {
-		pins = "PD14";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	led_pins_parrot: led_pins@0 {
-		pins = "PE16", "PE17";
-		function = "gpio_out";
-	};
-
-	usb0_id_det: usb0_id_detect_pin@0 {
-		pins = "PD10";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	usb1_vbus_pin_parrot: usb1_vbus_pin@0 {
-		pins = "PD12";
-		function = "gpio_out";
-	};
-};
-
-&r_pio {
-	wifi_reset_pin_parrot: wifi_reset_pin@0 {
-		pins = "PL6";
-		function = "gpio_out";
-	};
-};
-
 &r_rsb {
 	status = "okay";
 
 	axp22x: pmic@3a3 {
 		compatible = "x-powers,axp223";
 		reg = <0x3a3>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		drivevbus-supply = <&reg_vcc5v0>;
 		x-powers,drive-vbus-en;
@@ -319,8 +281,6 @@ 
 };
 
 &reg_usb1_vbus {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb1_vbus_pin_parrot>;
 	gpio = <&pio 3 12 GPIO_ACTIVE_HIGH>; /* PD12 */
 	status = "okay";
 };
@@ -331,7 +291,7 @@ 
 
 &uart0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_pins_b>;
+	pinctrl-0 = <&uart0_pb_pins>;
 	status = "okay";
 };
 
@@ -346,10 +306,8 @@ 
 
 &usbphy {
 	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_det>;
 	usb0_vbus-supply = <&reg_drivevbus>;
-	usb0_id_det-gpios = <&pio 3 10 GPIO_ACTIVE_HIGH>; /* PD10 */
+	usb0_id_det-gpios = <&pio 3 10 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PD10 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb1_vbus-supply = <&reg_usb1_vbus>;
 };
diff --git a/arch/arm/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/dts/sun8i-reference-design-tablet.dtsi
index 880096c7e2..797d61cff1 100644
--- a/arch/arm/dts/sun8i-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sun8i-reference-design-tablet.dtsi
@@ -54,6 +54,7 @@ 
 		brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
 		default-brightness-level = <8>;
 		enable-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+		power-supply = <&reg_dc1sw>;
 	};
 
 	chosen {
@@ -69,11 +70,10 @@ 
 	 */
 	clock-frequency = <400000>;
 
-	touchscreen: touchscreen@0 {
+	touchscreen: touchscreen@40 {
+		reg = <0x40>;
 		interrupt-parent = <&pio>;
 		interrupts = <1 5 IRQ_TYPE_EDGE_FALLING>; /* PB5 */
-		pinctrl-names = "default";
-		pinctrl-0 = <&ts_power_pin>;
 		power-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
 		/* Tablet dts must provide reg and compatible */
 		status = "disabled";
@@ -81,40 +81,19 @@ 
 };
 
 &mmc0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
 	vmmc-supply = <&reg_dcdc1>;
 	bus-width = <4>;
 	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
 	status = "okay";
 };
 
-&pio {
-	mmc0_cd_pin: mmc0_cd_pin@0 {
-		pins = "PB4";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-
-	ts_power_pin: ts_power_pin@0 {
-		pins = "PH1";
-		function = "gpio_out";
-	};
-
-	usb0_id_detect_pin: usb0_id_detect_pin@0 {
-		pins = "PH8";
-		function = "gpio_in";
-		bias-pull-up;
-	};
-};
-
 &r_rsb {
 	status = "okay";
 
 	axp22x: pmic@3a3 {
 		compatible = "x-powers,axp223";
 		reg = <0x3a3>;
-		interrupt-parent = <&nmi_intc>;
+		interrupt-parent = <&r_intc>;
 		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
 		eldoin-supply = <&reg_dcdc1>;
 		drivevbus-supply = <&reg_vcc5v0>;
@@ -238,9 +217,7 @@ 
 };
 
 &usbphy {
-	pinctrl-names = "default";
-	pinctrl-0 = <&usb0_id_detect_pin>;
-	usb0_id_det-gpio = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
+	usb0_id_det-gpios = <&pio 7 8 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH8 */
 	usb0_vbus_power-supply = <&usb_power_supply>;
 	usb0_vbus-supply = <&reg_drivevbus>;
 	status = "okay";
diff --git a/arch/arm/dts/sunxi-common-regulators.dtsi b/arch/arm/dts/sunxi-common-regulators.dtsi
index f1953b0c50..d8e5826fb3 100644
--- a/arch/arm/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/dts/sunxi-common-regulators.dtsi
@@ -43,43 +43,10 @@ 
  */
 
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
-
-&pio {
-	ahci_pwr_pin_a: ahci_pwr_pin@0 {
-		allwinner,pins = "PB8";
-		allwinner,function = "gpio_out";
-		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-	};
-
-	usb0_vbus_pin_a: usb0_vbus_pin@0 {
-		allwinner,pins = "PB9";
-		allwinner,function = "gpio_out";
-		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-	};
-
-	usb1_vbus_pin_a: usb1_vbus_pin@0 {
-		allwinner,pins = "PH6";
-		allwinner,function = "gpio_out";
-		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-	};
-
-	usb2_vbus_pin_a: usb2_vbus_pin@0 {
-		allwinner,pins = "PH3";
-		allwinner,function = "gpio_out";
-		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
-		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
-	};
-};
 
 / {
 	reg_ahci_5v: ahci-5v {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&ahci_pwr_pin_a>;
 		regulator-name = "ahci-5v";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -91,8 +58,6 @@ 
 
 	reg_usb0_vbus: usb0-vbus {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb0_vbus_pin_a>;
 		regulator-name = "usb0-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -103,8 +68,6 @@ 
 
 	reg_usb1_vbus: usb1-vbus {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb1_vbus_pin_a>;
 		regulator-name = "usb1-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -116,8 +79,6 @@ 
 
 	reg_usb2_vbus: usb2-vbus {
 		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&usb2_vbus_pin_a>;
 		regulator-name = "usb2-vbus";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
diff --git a/arch/arm/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/dts/sunxi-reference-design-tablet.dtsi
index b8241462fc..117198c52e 100644
--- a/arch/arm/dts/sunxi-reference-design-tablet.dtsi
+++ b/arch/arm/dts/sunxi-reference-design-tablet.dtsi
@@ -42,18 +42,17 @@ 
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
-#include <dt-bindings/pinctrl/sun4i-a10.h>
 #include "sunxi-common-regulators.dtsi"
 
 &i2c0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&i2c0_pins_a>;
+	pinctrl-0 = <&i2c0_pins>;
 	status = "okay";
 };
 
 &i2c1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&i2c1_pins_a>;
+	pinctrl-0 = <&i2c1_pins>;
 	status = "okay";
 };
 
@@ -61,14 +60,14 @@ 
 	vref-supply = <&reg_vcc3v0>;
 	status = "okay";
 
-	button@200 {
+	button-200 {
 		label = "Volume Up";
 		linux,code = <KEY_VOLUMEUP>;
 		channel = <0>;
 		voltage = <200000>;
 	};
 
-	button@400 {
+	button-400 {
 		label = "Volume Down";
 		linux,code = <KEY_VOLUMEDOWN>;
 		channel = <0>;
@@ -78,6 +77,6 @@ 
 
 &pwm {
 	pinctrl-names = "default";
-	pinctrl-0 = <&pwm0_pins>;
+	pinctrl-0 = <&pwm0_pin>;
 	status = "okay";
 };
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 1f43b25324..5fc9b29a3e 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -911,7 +911,7 @@  config VIDEO_LCD_PANEL_I2C
 config VIDEO_LCD_PANEL_I2C_NAME
 	string "LCD panel i2c interface node name"
 	depends on VIDEO_LCD_PANEL_I2C
-	default "i2c@0"
+	default "i2c"
 	---help---
 	Set the device tree node name for the LCD i2c interface.
 
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig b/configs/Nintendo_NES_Classic_Edition_defconfig
index 72e9725c9a..b66023418a 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -1,6 +1,6 @@ 
 CONFIG_ARM=y
 CONFIG_ARCH_SUNXI=y
-CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic"
 CONFIG_SPL=y
 CONFIG_MACH_SUN8I_A33=y
 CONFIG_DRAM_CLK=600