diff mbox series

[v1,04/11] spi: rockchip-sfc: sanity check minimum freq

Message ID 20220222013131.3114990-5-pgwipeout@gmail.com
State Changes Requested
Delegated to: Kever Yang
Headers show
Series rockchip fixes and extend rk3568 support | expand

Commit Message

Peter Geis Feb. 22, 2022, 1:31 a.m. UTC
The rockchip-sfc driver sanity checks the maximum frequency, but not the
minimum frequency.
This causes the probe to fail when a frequency isn't defined, such as
with `sf probe 0`.
Clamp the minimum frequency to the rockchip default clock rate.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
---
 drivers/spi/rockchip_sfc.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Kever Yang March 14, 2022, 8:53 a.m. UTC | #1
+ Jon Lin,

Hi Jon,

     Please help to review this patch.


Thanks,
- Kever
On 2022/2/22 09:31, Peter Geis wrote:
> The rockchip-sfc driver sanity checks the maximum frequency, but not the
> minimum frequency.
> This causes the probe to fail when a frequency isn't defined, such as
> with `sf probe 0`.
> Clamp the minimum frequency to the rockchip default clock rate.
>
> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
> ---
>   drivers/spi/rockchip_sfc.c | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
> index 851a6482985b..d0d2dc70a417 100644
> --- a/drivers/spi/rockchip_sfc.c
> +++ b/drivers/spi/rockchip_sfc.c
> @@ -164,6 +164,8 @@
>   /* DMA is only enabled for large data transmission */
>   #define SFC_DMA_TRANS_THRETHOLD		(0x40)
>   
> +#define SFC_MIN_SPEED		(24 * 1000 * 1000)
> +
>   /* Maximum clock values from datasheet suggest keeping clock value under
>    * 150MHz. No minimum or average value is suggested.
>    */
> @@ -596,6 +598,9 @@ static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
>   	if (speed > sfc->max_freq)
>   		speed = sfc->max_freq;
>   
> +	if (speed < SFC_MIN_SPEED)
> +		speed = SFC_MIN_SPEED;
> +
>   	if (speed == sfc->speed)
>   		return 0;
>
Jon Lin March 15, 2022, 2:10 a.m. UTC | #2
在 2022/3/14 16:53, Kever Yang 写道:
> + Jon Lin,
> 
> Hi Jon,
> 
>      Please help to review this patch.
> 
> 
> Thanks,
> - Kever
> On 2022/2/22 09:31, Peter Geis wrote:
>> The rockchip-sfc driver sanity checks the maximum frequency, but not the
>> minimum frequency.
>> This causes the probe to fail when a frequency isn't defined, such as
>> with `sf probe 0`.
>> Clamp the minimum frequency to the rockchip default clock rate.
>>
>> Signed-off-by: Peter Geis <pgwipeout@gmail.com>
>> ---
>>   drivers/spi/rockchip_sfc.c | 5 +++++
>>   1 file changed, 5 insertions(+)
>>
>> diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
>> index 851a6482985b..d0d2dc70a417 100644
>> --- a/drivers/spi/rockchip_sfc.c
>> +++ b/drivers/spi/rockchip_sfc.c
>> @@ -164,6 +164,8 @@
>>   /* DMA is only enabled for large data transmission */
>>   #define SFC_DMA_TRANS_THRETHOLD        (0x40)
>> +#define SFC_MIN_SPEED        (24 * 1000 * 1000)
>> +
>>   /* Maximum clock values from datasheet suggest keeping clock value 
>> under
>>    * 150MHz. No minimum or average value is suggested.
>>    */
>> @@ -596,6 +598,9 @@ static int rockchip_sfc_set_speed(struct udevice 
>> *bus, uint speed)
>>       if (speed > sfc->max_freq)
>>           speed = sfc->max_freq;
>> +    if (speed < SFC_MIN_SPEED)
>> +        speed = SFC_MIN_SPEED;
>> +
>>       if (speed == sfc->speed)
>>           return 0;

As I know, spi-uclass.c set SPI_DEFAULT_SPEED_HZ as default value when 
detect the param speed is 0.

And I think, For SF probe, error reporting can better remind users to 
use the correct speed configuration instead of directly using the 
default configuration.
diff mbox series

Patch

diff --git a/drivers/spi/rockchip_sfc.c b/drivers/spi/rockchip_sfc.c
index 851a6482985b..d0d2dc70a417 100644
--- a/drivers/spi/rockchip_sfc.c
+++ b/drivers/spi/rockchip_sfc.c
@@ -164,6 +164,8 @@ 
 /* DMA is only enabled for large data transmission */
 #define SFC_DMA_TRANS_THRETHOLD		(0x40)
 
+#define SFC_MIN_SPEED		(24 * 1000 * 1000)
+
 /* Maximum clock values from datasheet suggest keeping clock value under
  * 150MHz. No minimum or average value is suggested.
  */
@@ -596,6 +598,9 @@  static int rockchip_sfc_set_speed(struct udevice *bus, uint speed)
 	if (speed > sfc->max_freq)
 		speed = sfc->max_freq;
 
+	if (speed < SFC_MIN_SPEED)
+		speed = SFC_MIN_SPEED;
+
 	if (speed == sfc->speed)
 		return 0;