diff mbox series

[7/7] microblaze: exception: drop user exception support

Message ID 20220213080925.1548411-7-ovidiu.panait@windriver.com
State Deferred
Delegated to: Tom Rini
Headers show
Series [1/7] microblaze: exception: move privileged instruction exception out of v5 ifdef | expand

Commit Message

Ovidiu Panait Feb. 13, 2022, 8:09 a.m. UTC 
A user exception is triggered by inserting a bralid/brki jump to
"C_BASE_VECTORS+0x8" in the software flow. Because u-boot microblaze code
does not deal with MMU-related features such as user-mode/privileged-mode
separation, there are no code sequences that call into the user exception
handler.

It seems there is no real usecase for having user exception support in
u-boot, so drop the code that installs the nop handler.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
---

 arch/microblaze/cpu/exception.c         |  8 -----
 arch/microblaze/cpu/start.S             | 40 ++-----------------------
 board/xilinx/microblaze-generic/Kconfig |  9 ------
 3 files changed, 3 insertions(+), 54 deletions(-)

Comments

Michal Simek Feb. 15, 2022, 12:16 p.m. UTC | #1 
On 2/13/22 09:09, Ovidiu Panait wrote:
> A user exception is triggered by inserting a bralid/brki jump to
> "C_BASE_VECTORS+0x8" in the software flow. Because u-boot microblaze code
> does not deal with MMU-related features such as user-mode/privileged-mode
> separation, there are no code sequences that call into the user exception
> handler.
> 
> It seems there is no real usecase for having user exception support in
> u-boot, so drop the code that installs the nop handler.

U-Boot still supports to run user code on the top of u-boot which doesn't need 
to handle these kind of exceptions. That's why it is good to jump to this code 
and let you know about it.

M
Ovidiu Panait Feb. 17, 2022, 1:14 p.m. UTC | #2 
Hi Michal,

On 2/15/22 14:16, Michal Simek wrote:
> [Please note: This e-mail is from an EXTERNAL e-mail address]
>
> On 2/13/22 09:09, Ovidiu Panait wrote:
>> A user exception is triggered by inserting a bralid/brki jump to
>> "C_BASE_VECTORS+0x8" in the software flow. Because u-boot microblaze 
>> code
>> does not deal with MMU-related features such as 
>> user-mode/privileged-mode
>> separation, there are no code sequences that call into the user 
>> exception
>> handler.
>>
>> It seems there is no real usecase for having user exception support in
>> u-boot, so drop the code that installs the nop handler.
>
> U-Boot still supports to run user code on the top of u-boot which 
> doesn't need
> to handle these kind of exceptions. That's why it is good to jump to 
> this code
> and let you know about it.
>
Thanks for the feedback, this patch should just be ignored then.


The rest of this series I think it's still a good addition to the 
microblaze exception code.


Ovidiu

> M
diff mbox series

Patch

diff --git a/arch/microblaze/cpu/exception.c b/arch/microblaze/cpu/exception.c
index d3640d3903..1f7c44d1f3 100644
--- a/arch/microblaze/cpu/exception.c
+++ b/arch/microblaze/cpu/exception.c
@@ -63,11 +63,3 @@  void _hw_exception_handler (void)
 	printf("Return address from exception 0x%x\n", address);
 	hang();
 }
-
-#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP)
-void _exception_handler (void)
-{
-	puts("User vector_exception\n");
-	hang();
-}
-#endif
diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 645f7cb038..0ea0b78da9 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -97,9 +97,9 @@  clear_bss:
  * r5 - relocation offset (zero when setting up vectors before
  *      relocation, and gd->reloc_off when setting up vectors after
  *      relocation)
- *    - the relocation offset is added to the _exception_handler,
- *      _interrupt_handler and _hw_exception_handler symbols to reflect the
- *      post-relocation memory addresses
+ *    - the relocation offset is added to the _interrupt_handler and
+ *      _hw_exception_handler symbols to reflect the post-relocation memory
+ *      addresses
  *
  * Reserve registers:
  * r10: Stores little/big endian offset for vectors
@@ -149,40 +149,6 @@  __setup_exceptions:
 	rsubi	r8, r10, 0x6
 	sh	r6, r4, r8
 
-#if CONFIG_IS_ENABLED(XILINX_MICROBLAZE0_USR_EXCEP)
-	/* user_vector_exception */
-	swi	r2, r4, 0x8	/* user vector exception - imm opcode */
-	swi	r3, r4, 0xC	/* user vector exception - brai opcode */
-
-	addik	r6, r5, _exception_handler
-	sw	r6, r1, r0
-	/*
-	 * BIG ENDIAN memory map for user exception
-	 * 0x8: 0xB000XXXX
-	 * 0xC: 0xB808XXXX
-	 *
-	 * then it is necessary to count address for storing the most significant
-	 * 16bits from _exception_handler address and copy it to
-	 * 0xa address. Big endian use offset in r10=0 that's why is it just
-	 * 0xa address. The same is done for the least significant 16 bits
-	 * for 0xe address.
-	 *
-	 * LITTLE ENDIAN memory map for user exception
-	 * 0x8: 0xXXXX00B0
-	 * 0xC: 0xXXXX08B8
-	 *
-	 * Offset is for little endian setup to 0x2. rsubi instruction decrease
-	 * address value to ensure that points to proper place which is
-	 * 0x8 for the most significant 16 bits and
-	 * 0xC for the least significant 16 bits
-	 */
-	lhu	r7, r1, r10
-	rsubi	r8, r10, 0xa
-	sh	r7, r4, r8
-	rsubi	r8, r10, 0xe
-	sh	r6, r4, r8
-#endif
-
 	/* interrupt_handler */
 	swi	r2, r4, 0x10	/* interrupt - imm opcode */
 	swi	r3, r4, 0x14	/* interrupt - brai opcode */
diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig
index 117b476f3f..a0af2e9abd 100644
--- a/board/xilinx/microblaze-generic/Kconfig
+++ b/board/xilinx/microblaze-generic/Kconfig
@@ -38,15 +38,6 @@  config XILINX_MICROBLAZE0_HW_VER
 	string "Core version number"
 	default "7.10.d"
 
-config XILINX_MICROBLAZE0_USR_EXCEP
-	bool "MicroBlaze user exception support"
-	default y
-	help
-	  Enable this option in order to install the user exception handler
-	  (_exception_handler routine from arch/microblaze/cpu/exception.c) in
-	  the exception vector table. The user exception vector is located at
-	  C_BASE_VECTORS + 0x8 address.
-
 config XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP
 	bool "MicroBlaze delay slot exception support"
 	default y