diff mbox series

[09/20] imx8ulp: Fix DCNANO QoS setting

Message ID 20211029014634.20949-10-peng.fan@oss.nxp.com
State Accepted
Commit bd8b673003078309341c81b6a059f3bdebd81c4b
Delegated to: Stefano Babic
Headers show
Series i.MX8ULP misc update | expand

Commit Message

Peng Fan (OSS) Oct. 29, 2021, 1:46 a.m. UTC
From: Ye Li <ye.li@nxp.com>

The setting does not have effect because we should set it after
power on the PS16 for NIC AV.

So move it after upower_init which has powered on all PS

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 1 +
 arch/arm/mach-imx/imx8ulp/soc.c               | 3 +++
 board/freescale/imx8ulp_evk/spl.c             | 3 +++
 3 files changed, 7 insertions(+)

Comments

Stefano Babic Feb. 5, 2022, 4:42 p.m. UTC | #1
> From: Ye Li <ye.li@nxp.com>
> The setting does not have effect because we should set it after
> power on the PS16 for NIC AV.
> So move it after upower_init which has powered on all PS
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
index 1a142dce72..8e2c6ed0ce 100644
--- a/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8ulp/sys_proto.h
@@ -16,4 +16,5 @@  enum bt_mode get_boot_mode(void);
 int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm);
 int xrdc_config_pdac_openacc(u32 bridge, u32 index);
 enum boot_device get_boot_device(void);
+void set_lpav_qos(void);
 #endif
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 0cf4765bd6..2348132bf7 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -485,7 +485,10 @@  void lpav_configure(void)
 	writel(0x1f, SIM_SEC_BASE_ADDR + 0x50);
 	writel(0xffffffff, SIM_SEC_BASE_ADDR + 0x54);
 	writel(0x003fffff, SIM_SEC_BASE_ADDR + 0x58);
+}
 
+void set_lpav_qos(void)
+{
 	/* Set read QoS of dcnano on LPAV NIC */
 	writel(0xf, 0x2e447100);
 }
diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c
index faece336ef..42f8e262b6 100644
--- a/board/freescale/imx8ulp_evk/spl.c
+++ b/board/freescale/imx8ulp_evk/spl.c
@@ -90,6 +90,9 @@  void spl_board_init(void)
 
 	/* Init XRDC MRC for VIDEO, DSP domains */
 	xrdc_init_mrc();
+
+	/* Call it after PS16 power up */
+	set_lpav_qos();
 }
 
 void board_init_f(ulong dummy)