| Message ID | 20210911215049.5840-4-samuel@sholland.org |
|---|---|
| State | Accepted |
| Commit | 8fe8ff34110792f8a4ed4ab7a4f4e14c82feb452 |
| Delegated to: | Andre Przywara |
| Headers | show |
| Series | sunxi: Cleanup to prepare for DM_GPIO/DM_PINCTRL | expand |
On Sat, 11 Sep 2021 16:50:49 -0500 Samuel Holland <samuel@sholland.org> wrote: > Since the beginning, all banks have had space for 32 pins, even when > not all pins were implemented. Let's use a single constant for the GPIO > bank size here, like the GPIO driver is already doing. Yeah, I always found some code in there a bit over the top, thanks for cleaning this up. > Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > > arch/arm/include/asm/arch-sunxi/gpio.h | 14 ++------------ > drivers/gpio/sunxi_gpio.c | 2 -- > 2 files changed, 2 insertions(+), 14 deletions(-) > > diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h > index c93c051a19f..cd5e85988b1 100644 > --- a/arch/arm/include/asm/arch-sunxi/gpio.h > +++ b/arch/arm/include/asm/arch-sunxi/gpio.h > @@ -93,20 +93,10 @@ struct sunxi_gpio_reg { > #define GPIO_PULL_OFFSET(pin) ((((pin) & 0x1f) & 0xf) << 1) > > /* GPIO bank sizes */ > -#define SUNXI_GPIO_A_NR 32 > -#define SUNXI_GPIO_B_NR 32 > -#define SUNXI_GPIO_C_NR 32 > -#define SUNXI_GPIO_D_NR 32 > -#define SUNXI_GPIO_E_NR 32 > -#define SUNXI_GPIO_F_NR 32 > -#define SUNXI_GPIO_G_NR 32 > -#define SUNXI_GPIO_H_NR 32 > -#define SUNXI_GPIO_I_NR 32 > -#define SUNXI_GPIO_L_NR 32 > -#define SUNXI_GPIO_M_NR 32 > +#define SUNXI_GPIOS_PER_BANK 32 > > #define SUNXI_GPIO_NEXT(__gpio) \ > - ((__gpio##_START) + (__gpio##_NR) + 0) > + ((__gpio##_START) + SUNXI_GPIOS_PER_BANK) > > enum sunxi_gpio_number { > SUNXI_GPIO_A_START = 0, > diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c > index 7ce3ef73b46..ed26eb011f4 100644 > --- a/drivers/gpio/sunxi_gpio.c > +++ b/drivers/gpio/sunxi_gpio.c > @@ -19,8 +19,6 @@ > #include <dm/device-internal.h> > #include <dt-bindings/gpio/gpio.h> > > -#define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR > - > struct sunxi_gpio_plat { > struct sunxi_gpio *regs; > const char *bank_name; /* Name of bank, e.g. "B" */
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index c93c051a19f..cd5e85988b1 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -93,20 +93,10 @@ struct sunxi_gpio_reg { #define GPIO_PULL_OFFSET(pin) ((((pin) & 0x1f) & 0xf) << 1) /* GPIO bank sizes */ -#define SUNXI_GPIO_A_NR 32 -#define SUNXI_GPIO_B_NR 32 -#define SUNXI_GPIO_C_NR 32 -#define SUNXI_GPIO_D_NR 32 -#define SUNXI_GPIO_E_NR 32 -#define SUNXI_GPIO_F_NR 32 -#define SUNXI_GPIO_G_NR 32 -#define SUNXI_GPIO_H_NR 32 -#define SUNXI_GPIO_I_NR 32 -#define SUNXI_GPIO_L_NR 32 -#define SUNXI_GPIO_M_NR 32 +#define SUNXI_GPIOS_PER_BANK 32 #define SUNXI_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + 0) + ((__gpio##_START) + SUNXI_GPIOS_PER_BANK) enum sunxi_gpio_number { SUNXI_GPIO_A_START = 0, diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 7ce3ef73b46..ed26eb011f4 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -19,8 +19,6 @@ #include <dm/device-internal.h> #include <dt-bindings/gpio/gpio.h> -#define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR - struct sunxi_gpio_plat { struct sunxi_gpio *regs; const char *bank_name; /* Name of bank, e.g. "B" */
Since the beginning, all banks have had space for 32 pins, even when not all pins were implemented. Let's use a single constant for the GPIO bank size here, like the GPIO driver is already doing. Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/arm/include/asm/arch-sunxi/gpio.h | 14 ++------------ drivers/gpio/sunxi_gpio.c | 2 -- 2 files changed, 2 insertions(+), 14 deletions(-)