diff mbox series

[3/4] ARM: dts: stm32: Enable SDMMC3 on DH DRC02

Message ID 20201201102920.84051-3-marex@denx.de
State Accepted
Commit 1399be91cb57a480d5ff7bb084b40b4787be9f22
Delegated to: Patrick Delaunay
Headers show
Series [1/4] ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM | expand

Commit Message

Marek Vasut Dec. 1, 2020, 10:29 a.m. UTC
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
---
NOTE: Large part of this should be in the DHCOM SoM DT, however
      a DT sync should only happen after Linux 5.10.y and U-Boot
      2021.01 are out.
---
 arch/arm/dts/stm32mp15xx-dhcom-drc02.dts | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

Comments

Patrick Delaunay Dec. 8, 2020, 5:25 p.m. UTC | #1
Hi Marek,
> From: Marek Vasut <marex@denx.de>
> Sent: mardi 1 d├ęcembre 2020 11:29
>
> The DH DRC02 board has an on-board microSD slot, add DT properties to enable the slot.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> ---
> NOTE: Large part of this should be in the DHCOM SoM DT, however
>        a DT sync should only happen after Linux 5.10.y and U-Boot
>        2021.01 are out.
> ---
>   arch/arm/dts/stm32mp15xx-dhcom-drc02.dts | 13 +++++++++++--
>   1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> index 5a237a3b7b..e8508aa4d5 100644
> --- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> +++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
> @@ -105,9 +105,18 @@
>   	 * On DRC02, the SoM does not have SDIO WiFi. The pins
>   	 * are used for on-board microSD slot instead.
>   	 */
> -	/delete-property/broken-cd;
> -	cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> +	pinctrl-names = "default", "opendrain", "sleep";
> +	pinctrl-0 = <&sdmmc3_b4_pins_a>;
> +	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
> +	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
> +	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
>   	disable-wp;
> +	st,neg-edge;
> +	bus-width = <4>;To: u-boot@lists.denx.de
> Cc: Marek Vasut <marex@denx.de>; Patrice CHOTARD <patrice.chotard@st.com>; Patrick DELAUNAY <patrick.delaunay@st.com>
> Subject: [PATCH 2/4] ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
> Importance: High
>
>
> +	vmmc-supply = <&v3v3>;
> +	vqmmc-supply = <&v3v3>;
> +	mmc-ddr-3_3v;
> +	status = "okay";
>   };
>   
>   &spi1 {
> --
> 2.29.2
>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

Thanks

Patrick
diff mbox series

Patch

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
index 5a237a3b7b..e8508aa4d5 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
+++ b/arch/arm/dts/stm32mp15xx-dhcom-drc02.dts
@@ -105,9 +105,18 @@ 
 	 * On DRC02, the SoM does not have SDIO WiFi. The pins
 	 * are used for on-board microSD slot instead.
 	 */
-	/delete-property/broken-cd;
-	cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	pinctrl-names = "default", "opendrain", "sleep";
+	pinctrl-0 = <&sdmmc3_b4_pins_a>;
+	pinctrl-1 = <&sdmmc3_b4_od_pins_a>;
+	pinctrl-2 = <&sdmmc3_b4_sleep_pins_a>;
+	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
 	disable-wp;
+	st,neg-edge;
+	bus-width = <4>;
+	vmmc-supply = <&v3v3>;
+	vqmmc-supply = <&v3v3>;
+	mmc-ddr-3_3v;
+	status = "okay";
 };
 
 &spi1 {