diff mbox series

[v2,2/2] configs: socfpga: add CONFIG_BOOTCOMMAND for cyclone5

Message ID 20200818073330.157654-3-joyce.ooi@intel.com
State Deferred
Delegated to: Tom Rini
Headers show
Series arm: socfpga: enable CONFIG_BOOTCOMMAND for cyclone5 | expand

Commit Message

Joyce Ooi Aug. 18, 2020, 7:33 a.m. UTC
From: Joyce Ooi <joyce.ooi@intel.com>

Add CONFIG_BOOTCOMMAND in cyclone5 defconfig to run fatscript and enable
FPGA bridge when FPGA is in user mode. The fatscript executes the Intel
FPGA u-boot script if it's available so that customers can add any
customization (such as configuring registers) without modifying the codes.

Signed-off-by: Joyce Ooi <joyce.ooi@intel.com>
---
v2: add u-boot script
---
 configs/socfpga_cyclone5_defconfig | 3 ++-
 include/configs/socfpga_common.h   | 3 +++
 2 files changed, 5 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 1633ca1deb5..132b7b7fa81 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -8,7 +8,8 @@  CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
-# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run fatscript; bridge enable; run distro_bootcmd"
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 07c9745eba9..87746541321 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -245,6 +245,9 @@  unsigned int cm_get_qspi_controller_clk_hz(void);
 	"kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0" \
 	"fdt_addr_r=0x02000000\0" \
 	"scriptaddr=0x02100000\0" \
+	"scriptfile=u-boot.scr\0" \
+	"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
+			"then source ${scriptaddr}; fi\0" \
 	"pxefile_addr_r=0x02200000\0" \
 	"ramdisk_addr_r=0x02300000\0" \
 	"socfpga_legacy_reset_compat=1\0" \