diff mbox series

[1/2] IPQ40xx: Add DRAM detection & FDT fixup

Message ID 20200803115220.342329-1-robert.marko@sartura.hr
State Deferred
Delegated to: Tom Rini
Headers show
Series [1/2] IPQ40xx: Add DRAM detection & FDT fixup | expand

Commit Message

Robert Marko Aug. 3, 2020, 11:52 a.m. UTC
Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.

Imported from Snapdragon target.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
---
 arch/arm/mach-ipq40xx/Makefile            |  1 +
 arch/arm/mach-ipq40xx/dram.c              | 99 +++++++++++++++++++++++
 arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++
 3 files changed, 112 insertions(+)
 create mode 100644 arch/arm/mach-ipq40xx/dram.c
 create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h

Comments

Tom Rini Aug. 3, 2020, 2:39 p.m. UTC | #1
On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote:

> Fixup the Linux FDT with the detection of onboard DRAM as
> provided by SBL (Secondary boot loader) by reading
> the shared-memory region.
> 
> Imported from Snapdragon target.
> 
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> Cc: Luka Perkov <luka.perkov@sartura.hr>
> ---
>  arch/arm/mach-ipq40xx/Makefile            |  1 +
>  arch/arm/mach-ipq40xx/dram.c              | 99 +++++++++++++++++++++++
>  arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++
>  3 files changed, 112 insertions(+)
>  create mode 100644 arch/arm/mach-ipq40xx/dram.c
>  create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h

Is this as-is?  If so, we need to figure out something or another to
make sharing the code, rather than copying, possible.  How are these
both grouped in the kernel?  Thanks!
Robert Marko Aug. 4, 2020, 11:20 a.m. UTC | #2
On Mon, Aug 3, 2020 at 4:39 PM Tom Rini <trini@konsulko.com> wrote:
>
> On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote:
>
> > Fixup the Linux FDT with the detection of onboard DRAM as
> > provided by SBL (Secondary boot loader) by reading
> > the shared-memory region.
> >
> > Imported from Snapdragon target.
> >
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > Cc: Luka Perkov <luka.perkov@sartura.hr>
> > ---
> >  arch/arm/mach-ipq40xx/Makefile            |  1 +
> >  arch/arm/mach-ipq40xx/dram.c              | 99 +++++++++++++++++++++++
> >  arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++
> >  3 files changed, 112 insertions(+)
> >  create mode 100644 arch/arm/mach-ipq40xx/dram.c
> >  create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h
>
> Is this as-is?  If so, we need to figure out something or another to
> make sharing the code, rather than copying, possible.  How are these
> both grouped in the kernel?  Thanks!

Yes, the Snapdragon target uses the identical code.
The kernel does not have code for this but rather relies on the
bootloader to do it.
>
> --
> Tom
Tom Rini Aug. 4, 2020, 1:44 p.m. UTC | #3
On Tue, Aug 04, 2020 at 01:20:56PM +0200, Robert Marko wrote:
> On Mon, Aug 3, 2020 at 4:39 PM Tom Rini <trini@konsulko.com> wrote:
> >
> > On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote:
> >
> > > Fixup the Linux FDT with the detection of onboard DRAM as
> > > provided by SBL (Secondary boot loader) by reading
> > > the shared-memory region.
> > >
> > > Imported from Snapdragon target.
> > >
> > > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > > Cc: Luka Perkov <luka.perkov@sartura.hr>
> > > ---
> > >  arch/arm/mach-ipq40xx/Makefile            |  1 +
> > >  arch/arm/mach-ipq40xx/dram.c              | 99 +++++++++++++++++++++++
> > >  arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++
> > >  3 files changed, 112 insertions(+)
> > >  create mode 100644 arch/arm/mach-ipq40xx/dram.c
> > >  create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h
> >
> > Is this as-is?  If so, we need to figure out something or another to
> > make sharing the code, rather than copying, possible.  How are these
> > both grouped in the kernel?  Thanks!
> 
> Yes, the Snapdragon target uses the identical code.
> The kernel does not have code for this but rather relies on the
> bootloader to do it.

Right, but I mean what does the kernel do to avoid copying identical
code between these two platforms?  I guess the answer is that for
arch/arm64 everything has been pushed out of arch/arm64/.  So in this
case, the dram code should get moved to our drivers/ddr/ or drivers/ram/
depending on which place "dram.c" really belongs best.
Robert Marko Aug. 7, 2020, 11:35 a.m. UTC | #4
On Tue, Aug 4, 2020 at 3:45 PM Tom Rini <trini@konsulko.com> wrote:
>
> On Tue, Aug 04, 2020 at 01:20:56PM +0200, Robert Marko wrote:
> > On Mon, Aug 3, 2020 at 4:39 PM Tom Rini <trini@konsulko.com> wrote:
> > >
> > > On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote:
> > >
> > > > Fixup the Linux FDT with the detection of onboard DRAM as
> > > > provided by SBL (Secondary boot loader) by reading
> > > > the shared-memory region.
> > > >
> > > > Imported from Snapdragon target.
> > > >
> > > > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
> > > > Cc: Luka Perkov <luka.perkov@sartura.hr>
> > > > ---
> > > >  arch/arm/mach-ipq40xx/Makefile            |  1 +
> > > >  arch/arm/mach-ipq40xx/dram.c              | 99 +++++++++++++++++++++++
> > > >  arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++
> > > >  3 files changed, 112 insertions(+)
> > > >  create mode 100644 arch/arm/mach-ipq40xx/dram.c
> > > >  create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h
> > >
> > > Is this as-is?  If so, we need to figure out something or another to
> > > make sharing the code, rather than copying, possible.  How are these
> > > both grouped in the kernel?  Thanks!
> >
> > Yes, the Snapdragon target uses the identical code.
> > The kernel does not have code for this but rather relies on the
> > bootloader to do it.
>
> Right, but I mean what does the kernel do to avoid copying identical
> code between these two platforms?  I guess the answer is that for
> arch/arm64 everything has been pushed out of arch/arm64/.  So in this
> case, the dram code should get moved to our drivers/ddr/ or drivers/ram/
> depending on which place "dram.c" really belongs best.

Hi, I have been doing some further testing of the DRAM code on multiple boards.
Since it uses SMEM to detect DRAM configuration it's supposed to remove the need
to manually define DRAM size etc.
Unfortunately, what I experienced was that it's not uncommon for
boards to ship with
incorrect DRAM info in SMEM.
So, I have decided to drop this for now as it's not reliable and
manually config DRAM
start, size, etc.

Regards,
Robert
>
> --
> Tom
diff mbox series

Patch

diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
index 08a65b8854..97d72b1723 100644
--- a/arch/arm/mach-ipq40xx/Makefile
+++ b/arch/arm/mach-ipq40xx/Makefile
@@ -5,5 +5,6 @@ 
 # Author: Robert Marko <robert.marko@sartura.hr>
 
 obj-y += clock-ipq4019.o
+obj-y += dram.o
 obj-y += pinctrl-snapdragon.o
 obj-y += pinctrl-ipq4019.o
diff --git a/arch/arm/mach-ipq40xx/dram.c b/arch/arm/mach-ipq40xx/dram.c
new file mode 100644
index 0000000000..a0dadad85f
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/dram.c
@@ -0,0 +1,99 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Onboard memory detection for Snapdragon boards
+ *
+ * (C) Copyright 2018 Ramon Fried <ramon.fried@gmail.com>
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <smem.h>
+#include <fdt_support.h>
+#include <log.h>
+#include <asm/arch/dram.h>
+
+#define SMEM_USABLE_RAM_PARTITION_TABLE 402
+#define RAM_PART_NAME_LENGTH            16
+#define RAM_NUM_PART_ENTRIES            32
+#define CATEGORY_SDRAM 0x0E
+#define TYPE_SYSMEM 0x01
+
+struct smem_ram_ptable_hdr {
+	u32 magic[2];
+	u32 version;
+	u32 reserved;
+	u32 len;
+} __attribute__ ((__packed__));
+
+struct smem_ram_ptn {
+	char name[RAM_PART_NAME_LENGTH];
+	u64 start;
+	u64 size;
+	u32 attr;
+	u32 category;
+	u32 domain;
+	u32 type;
+	u32 num_partitions;
+	u32 reserved[3];
+} __attribute__ ((__packed__));
+
+struct smem_ram_ptable {
+	struct smem_ram_ptable_hdr hdr;
+	u32 reserved;     /* Added for 8 bytes alignment of header */
+	struct smem_ram_ptn parts[RAM_NUM_PART_ENTRIES];
+} __attribute__ ((__packed__));
+
+#ifndef MEMORY_BANKS_MAX
+#define MEMORY_BANKS_MAX 4
+#endif
+
+int msm_fixup_memory(void *blob)
+{
+	u64 bank_start[MEMORY_BANKS_MAX];
+	u64 bank_size[MEMORY_BANKS_MAX];
+	size_t size;
+	int i;
+	int count = 0;
+	struct udevice *smem;
+	int ret;
+	struct smem_ram_ptable *ram_ptable;
+	struct smem_ram_ptn *p;
+
+	ret = uclass_get_device_by_name(UCLASS_SMEM, "smem", &smem);
+	if (ret < 0) {
+		printf("Failed to find SMEM node. Check device tree\n");
+		return 0;
+	}
+
+	ram_ptable = smem_get(smem, -1, SMEM_USABLE_RAM_PARTITION_TABLE, &size);
+
+	if (!ram_ptable) {
+		printf("Failed to find SMEM partition.\n");
+		return -ENODEV;
+	}
+
+	/* Check validy of RAM */
+	for (i = 0; i < RAM_NUM_PART_ENTRIES; i++) {
+		p = &ram_ptable->parts[i];
+		if (p->category == CATEGORY_SDRAM && p->type == TYPE_SYSMEM) {
+			bank_start[count] = p->start;
+			bank_size[count] = p->size;
+			debug("Detected memory bank %u: start: 0x%llx size: 0x%llx\n",
+					count, p->start, p->size);
+			count++;
+		}
+	}
+
+	if (!count) {
+		printf("Failed to detect any memory bank\n");
+		return -ENODEV;
+	}
+
+	ret = fdt_fixup_memory_banks(blob, bank_start, bank_size, count);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
diff --git a/arch/arm/mach-ipq40xx/include/mach/dram.h b/arch/arm/mach-ipq40xx/include/mach/dram.h
new file mode 100644
index 0000000000..0a9eedda41
--- /dev/null
+++ b/arch/arm/mach-ipq40xx/include/mach/dram.h
@@ -0,0 +1,12 @@ 
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Snapdragon DRAM
+ * Copyright (C) 2018 Ramon Fried <ramon.fried@gmail.com>
+ */
+
+#ifndef DRAM_H
+#define DRAM_H
+
+int msm_fixup_memory(void *blob);
+
+#endif