| Message ID | 20200525141554.2.I0717c6e0f1ed63537b23891f36b95397b7434e41@changeid |
|---|---|
| State | Superseded |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | [1/4] x86: coral: Correct some FSP-M settings | expand |
Hi Simon, On Tue, May 26, 2020 at 4:16 AM Simon Glass <sjg@chromium.org> wrote: > > When comparing hex dumps it is useful to see the offsets of the registers. > Add them in where they correspond to a multiple of 16. > > Possibly it would be useful to have a a command to output the FSP values > in human-readable form, making use of the fsp_bindings implementation. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > .../include/asm/arch-apollolake/fsp/fsp_m_upd.h | 16 ++++++++++++++-- > 1 file changed, 14 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h > index a77964f30c..e9be66e5b6 100644 > --- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h > +++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h > @@ -34,7 +34,14 @@ struct __packed fsp_ram_channel { > u8 odt_levels; > }; > > +/* struct fsp_m_config - FSP-M configuration nits: incorrect multi-line comment format > + * > + * Note that headers precede this and are 64 bytes long. The hex offsets > + * mentioned in this file are relative to the start of the header, the same > + * convention used in Intel's APL FSP header file. > + */ > struct __packed fsp_m_config { > + /* 40 */ So this is a hex number, please make it explicit by adding the 0x prefix to all these numbers otherwise it's quite confusing. > u32 serial_debug_port_address; > u8 serial_debug_port_type; > u8 serial_debug_port_device; > @@ -49,6 +56,7 @@ struct __packed fsp_m_config { > u8 profile; > u8 memory_down; > > + /* 50 */ > u8 ddr3_l_page_size; > u8 ddr3_lasr; > u8 scrambler_support; > @@ -62,6 +70,7 @@ struct __packed fsp_m_config { > u16 memory_size_limit; > u16 low_memory_max_value; > > + /* 60 */ > u16 high_memory_max_value; > u8 disable_fast_boot; > u8 dimm0_spd_address; > @@ -73,6 +82,7 @@ struct __packed fsp_m_config { > u32 msg_level_mask; > u8 unused_upd_space0[4]; > > + /* 110 */ > u8 pre_mem_gpio_table_pin_num[4]; > u32 pre_mem_gpio_table_ptr; > u8 pre_mem_gpio_table_entry_num; > @@ -81,8 +91,10 @@ struct __packed fsp_m_config { > u8 mrc_data_saving; > u32 oem_loading_base; > > + /* 120 */ > u8 oem_file_name[16]; > > + /* 130 */ > void *mrc_boot_data_ptr; > u8 e_mmc_trace_len; > u8 skip_cse_rbp; > @@ -94,20 +106,20 @@ struct __packed fsp_m_config { > u8 msc1_wrap; > u32 msc0_size; > > + /* 140 */ > u32 msc1_size; > u8 pti_mode; > u8 pti_training; > u8 pti_speed; > u8 punit_mlvl; > - > u8 pmc_mlvl; > u8 sw_trace_en; > u8 periodic_retraining_disable; > u8 enable_reset_system; > - > u8 enable_s3_heci2; > u8 unused_upd_space1[3]; > > + /* 150 */ > void *variable_nvs_buffer_ptr; > u8 reserved_fspm_upd[12]; > }; > -- Regards, Bin
diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h index a77964f30c..e9be66e5b6 100644 --- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h +++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h @@ -34,7 +34,14 @@ struct __packed fsp_ram_channel { u8 odt_levels; }; +/* struct fsp_m_config - FSP-M configuration + * + * Note that headers precede this and are 64 bytes long. The hex offsets + * mentioned in this file are relative to the start of the header, the same + * convention used in Intel's APL FSP header file. + */ struct __packed fsp_m_config { + /* 40 */ u32 serial_debug_port_address; u8 serial_debug_port_type; u8 serial_debug_port_device; @@ -49,6 +56,7 @@ struct __packed fsp_m_config { u8 profile; u8 memory_down; + /* 50 */ u8 ddr3_l_page_size; u8 ddr3_lasr; u8 scrambler_support; @@ -62,6 +70,7 @@ struct __packed fsp_m_config { u16 memory_size_limit; u16 low_memory_max_value; + /* 60 */ u16 high_memory_max_value; u8 disable_fast_boot; u8 dimm0_spd_address; @@ -73,6 +82,7 @@ struct __packed fsp_m_config { u32 msg_level_mask; u8 unused_upd_space0[4]; + /* 110 */ u8 pre_mem_gpio_table_pin_num[4]; u32 pre_mem_gpio_table_ptr; u8 pre_mem_gpio_table_entry_num; @@ -81,8 +91,10 @@ struct __packed fsp_m_config { u8 mrc_data_saving; u32 oem_loading_base; + /* 120 */ u8 oem_file_name[16]; + /* 130 */ void *mrc_boot_data_ptr; u8 e_mmc_trace_len; u8 skip_cse_rbp; @@ -94,20 +106,20 @@ struct __packed fsp_m_config { u8 msc1_wrap; u32 msc0_size; + /* 140 */ u32 msc1_size; u8 pti_mode; u8 pti_training; u8 pti_speed; u8 punit_mlvl; - u8 pmc_mlvl; u8 sw_trace_en; u8 periodic_retraining_disable; u8 enable_reset_system; - u8 enable_s3_heci2; u8 unused_upd_space1[3]; + /* 150 */ void *variable_nvs_buffer_ptr; u8 reserved_fspm_upd[12]; };
When comparing hex dumps it is useful to see the offsets of the registers. Add them in where they correspond to a multiple of 16. Possibly it would be useful to have a a command to output the FSP values in human-readable form, making use of the fsp_bindings implementation. Signed-off-by: Simon Glass <sjg@chromium.org> --- .../include/asm/arch-apollolake/fsp/fsp_m_upd.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)