| Message ID | 20190408164951.1819-4-peron.clem@gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | Add Beelink GS1 | expand |
+Chen-Yu. I would like to fix the reset using the R_WDOG instead of WDOG. What do you think? If it's acceptable I will propose a similar patch on ATF. Regards, Clement On Mon, 8 Apr 2019 at 18:41, Clément Péron <peron.clem@gmail.com> wrote: > > WDOG in H6 is broken so the reset is actually not working. > > Use the R_WDOG instead. > > Signed-off-by: Clément Péron <peron.clem@gmail.com> > --- > arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 + > arch/arm/mach-sunxi/board.c | 9 +++++++-- > 2 files changed, 8 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > index 41a9b0fc47..6392cb07b4 100644 > --- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > @@ -60,6 +60,7 @@ > #define SUNXI_RTC_BASE 0x07000000 > #define SUNXI_R_CPUCFG_BASE 0x07000400 > #define SUNXI_PRCM_BASE 0x07010000 > +#define SUNXI_R_WDOG_BASE 0x07020400 > #define SUNXI_R_PIO_BASE 0x07022000 > #define SUNXI_R_UART_BASE 0x07080000 > #define SUNXI_R_TWI_BASE 0x07081400 > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > index b74eaf2a0e..3f8128fbf4 100644 > --- a/arch/arm/mach-sunxi/board.c > +++ b/arch/arm/mach-sunxi/board.c > @@ -287,9 +287,14 @@ void reset_cpu(ulong addr) > writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); > } > #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6) > +#if defined(CONFIG_MACH_SUN50I_H6) > + /* WDOG is broken for H6 use the R_WDOG instead */ > static const struct sunxi_wdog *wdog = > - ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; > - > + (struct sunxi_wdog *)SUNXI_R_WDOG_BASE; > +#else > + static const struct sunxi_wdog *wdog = > + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; > +#endif > /* Set the watchdog for its shortest interval (.5s) and wait */ > writel(WDT_CFG_RESET, &wdog->cfg); > writel(WDT_MODE_EN, &wdog->mode); > -- > 2.17.1 >
Hi, On Mon, 8 Apr 2019 at 18:47, Clément Péron <peron.clem@gmail.com> wrote: > > +Chen-Yu. > > I would like to fix the reset using the R_WDOG instead of WDOG. > > What do you think? Adding information about the issue as explained on ATF: " There seems to have a HW errata in the new revision of the SoC. Only SoC used in Pine H64 and Rongpin RP-H6B seems to be NOT affected. Lot of users on OrangePi boards (Lite2 / One Plus and 3) are complaining about this issue. I personnaly own a Beelink GS1 which has the issue. My SoC is a H6 V200-AWIN H7309BA 6842 and Chen-Yu Tsai has these two boards : - Pine h64 with a SoC H6 V200-AWIN H6448BA 7782 - OrangePi Lite 2 with a SoC H6 V200-AWIN H8068BA 61C2 The Pine H64 is working fine but not OPi Lite 2. I'm not sure if it's an HW errata or not but the result is here WDOG doesn't make these boards reboot properly which should never happen ! " https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/830 Clement > > Regards, > Clement > > On Mon, 8 Apr 2019 at 18:41, Clément Péron <peron.clem@gmail.com> wrote: > > > > WDOG in H6 is broken so the reset is actually not working. > > > > Use the R_WDOG instead. > > > > Signed-off-by: Clément Péron <peron.clem@gmail.com> > > --- > > arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 + > > arch/arm/mach-sunxi/board.c | 9 +++++++-- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > > index 41a9b0fc47..6392cb07b4 100644 > > --- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > > +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h > > @@ -60,6 +60,7 @@ > > #define SUNXI_RTC_BASE 0x07000000 > > #define SUNXI_R_CPUCFG_BASE 0x07000400 > > #define SUNXI_PRCM_BASE 0x07010000 > > +#define SUNXI_R_WDOG_BASE 0x07020400 > > #define SUNXI_R_PIO_BASE 0x07022000 > > #define SUNXI_R_UART_BASE 0x07080000 > > #define SUNXI_R_TWI_BASE 0x07081400 > > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > > index b74eaf2a0e..3f8128fbf4 100644 > > --- a/arch/arm/mach-sunxi/board.c > > +++ b/arch/arm/mach-sunxi/board.c > > @@ -287,9 +287,14 @@ void reset_cpu(ulong addr) > > writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); > > } > > #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6) > > +#if defined(CONFIG_MACH_SUN50I_H6) > > + /* WDOG is broken for H6 use the R_WDOG instead */ > > static const struct sunxi_wdog *wdog = > > - ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; > > - > > + (struct sunxi_wdog *)SUNXI_R_WDOG_BASE; > > +#else > > + static const struct sunxi_wdog *wdog = > > + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; > > +#endif > > /* Set the watchdog for its shortest interval (.5s) and wait */ > > writel(WDT_CFG_RESET, &wdog->cfg); > > writel(WDT_MODE_EN, &wdog->mode); > > -- > > 2.17.1 > >
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h index 41a9b0fc47..6392cb07b4 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h @@ -60,6 +60,7 @@ #define SUNXI_RTC_BASE 0x07000000 #define SUNXI_R_CPUCFG_BASE 0x07000400 #define SUNXI_PRCM_BASE 0x07010000 +#define SUNXI_R_WDOG_BASE 0x07020400 #define SUNXI_R_PIO_BASE 0x07022000 #define SUNXI_R_UART_BASE 0x07080000 #define SUNXI_R_TWI_BASE 0x07081400 diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index b74eaf2a0e..3f8128fbf4 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -287,9 +287,14 @@ void reset_cpu(ulong addr) writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode); } #elif defined(CONFIG_SUNXI_GEN_SUN6I) || defined(CONFIG_MACH_SUN50I_H6) +#if defined(CONFIG_MACH_SUN50I_H6) + /* WDOG is broken for H6 use the R_WDOG instead */ static const struct sunxi_wdog *wdog = - ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; - + (struct sunxi_wdog *)SUNXI_R_WDOG_BASE; +#else + static const struct sunxi_wdog *wdog = + ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog; +#endif /* Set the watchdog for its shortest interval (.5s) and wait */ writel(WDT_CFG_RESET, &wdog->cfg); writel(WDT_MODE_EN, &wdog->mode);
WDOG in H6 is broken so the reset is actually not working. Use the R_WDOG instead. Signed-off-by: Clément Péron <peron.clem@gmail.com> --- arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h | 1 + arch/arm/mach-sunxi/board.c | 9 +++++++-- 2 files changed, 8 insertions(+), 2 deletions(-)