diff mbox series

[U-Boot] arm: socfpga: fix SPL booting from fpga OnChip RAM

Message ID 20181006203342.11180-1-simon.k.r.goldschmidt@gmail.com
State Superseded
Delegated to: Marek Vasut
Headers show
Series [U-Boot] arm: socfpga: fix SPL booting from fpga OnChip RAM | expand

Commit Message

Simon Goldschmidt Oct. 6, 2018, 8:33 p.m. UTC
This patch prevents disabling the FPGA bridges when
SPL or U-Boot is executed from FPGA onchip RAM.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
---


There are other patches required to make boot from
FPGA work correctly:
- CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
  ideally this is done by moving SPL_TEXT_BASE to Kconfig:
  https://patchwork.ozlabs.org/patch/976918/
- spl_ram.c needs this patch by Michal Simek:
  https://patchwork.ozlabs.org/patch/978694/
- For U-Boot to be run from FPGA onchip RAM, either
  CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
  is required to relocate gd->env_addr:
  https://patchwork.ozlabs.org/patch/975702/
---
 arch/arm/mach-socfpga/include/mach/base_addr_ac5.h | 1 +
 arch/arm/mach-socfpga/misc_gen5.c                  | 8 ++++++++
 arch/arm/mach-socfpga/spl_gen5.c                   | 4 ++++
 3 files changed, 13 insertions(+)

Comments

Tom Rini Oct. 6, 2018, 8:38 p.m. UTC | #1
On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:

> This patch prevents disabling the FPGA bridges when
> SPL or U-Boot is executed from FPGA onchip RAM.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> ---
> 
> 
> There are other patches required to make boot from
> FPGA work correctly:
> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
>   ideally this is done by moving SPL_TEXT_BASE to Kconfig:
>   https://patchwork.ozlabs.org/patch/976918/
> - spl_ram.c needs this patch by Michal Simek:
>   https://patchwork.ozlabs.org/patch/978694/
> - For U-Boot to be run from FPGA onchip RAM, either
>   CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
>   is required to relocate gd->env_addr:
>   https://patchwork.ozlabs.org/patch/975702/

For the record, I'm currently reviewing the last two parts here.  The
first one will come soon (I do Kconfig migrations separate so I can see
a lack of size change).
Simon Goldschmidt Oct. 7, 2018, 11:08 a.m. UTC | #2
On 06.10.2018 22:38, Tom Rini wrote:
> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
>
>> This patch prevents disabling the FPGA bridges when
>> SPL or U-Boot is executed from FPGA onchip RAM.
>>
>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>> ---
>>
>>
>> There are other patches required to make boot from
>> FPGA work correctly:
>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
>>    https://patchwork.ozlabs.org/patch/976918/
>> - spl_ram.c needs this patch by Michal Simek:
>>    https://patchwork.ozlabs.org/patch/978694/
>> - For U-Boot to be run from FPGA onchip RAM, either
>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
>>    is required to relocate gd->env_addr:
>>    https://patchwork.ozlabs.org/patch/975702/
> For the record, I'm currently reviewing the last two parts here.  The
> first one will come soon (I do Kconfig migrations separate so I can see
> a lack of size change).


OK, after Tom merged the last to parts, I can confirm I can successfully 
boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking 
CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still 
missing).


Thanks,

Simon
Marek Vasut Oct. 7, 2018, 12:36 p.m. UTC | #3
On 10/07/2018 01:08 PM, Simon Goldschmidt wrote:
> On 06.10.2018 22:38, Tom Rini wrote:
>> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
>>
>>> This patch prevents disabling the FPGA bridges when
>>> SPL or U-Boot is executed from FPGA onchip RAM.
>>>
>>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
>>> ---
>>>
>>>
>>> There are other patches required to make boot from
>>> FPGA work correctly:
>>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
>>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
>>>    https://patchwork.ozlabs.org/patch/976918/
>>> - spl_ram.c needs this patch by Michal Simek:
>>>    https://patchwork.ozlabs.org/patch/978694/
>>> - For U-Boot to be run from FPGA onchip RAM, either
>>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
>>>    is required to relocate gd->env_addr:
>>>    https://patchwork.ozlabs.org/patch/975702/
>> For the record, I'm currently reviewing the last two parts here.  The
>> first one will come soon (I do Kconfig migrations separate so I can see
>> a lack of size change).
> 
> 
> OK, after Tom merged the last to parts, I can confirm I can successfully
> boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking
> CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still
> missing).

So is this patch still needed ?
Simon Goldschmidt Oct. 8, 2018, 4:04 a.m. UTC | #4
Marek Vasut <marex@denx.de> schrieb am Mo., 8. Okt. 2018, 02:20:

> On 10/07/2018 01:08 PM, Simon Goldschmidt wrote:
> > On 06.10.2018 22:38, Tom Rini wrote:
> >> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
> >>
> >>> This patch prevents disabling the FPGA bridges when
> >>> SPL or U-Boot is executed from FPGA onchip RAM.
> >>>
> >>> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
> >>> ---
> >>>
> >>>
> >>> There are other patches required to make boot from
> >>> FPGA work correctly:
> >>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
> >>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
> >>>    https://patchwork.ozlabs.org/patch/976918/
> >>> - spl_ram.c needs this patch by Michal Simek:
> >>>    https://patchwork.ozlabs.org/patch/978694/
> >>> - For U-Boot to be run from FPGA onchip RAM, either
> >>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
> >>>    is required to relocate gd->env_addr:
> >>>    https://patchwork.ozlabs.org/patch/975702/
> >> For the record, I'm currently reviewing the last two parts here.  The
> >> first one will come soon (I do Kconfig migrations separate so I can see
> >> a lack of size change).
> >
> >
> > OK, after Tom merged the last to parts, I can confirm I can successfully
> > boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking
> > CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still
> > missing).
>
> So is this patch still needed ?
>

Yes, sorry for being unclear there.

Simon
Marek Vasut Oct. 8, 2018, 9:03 a.m. UTC | #5
On 10/08/2018 06:04 AM, Simon Goldschmidt wrote:
> 
> 
> Marek Vasut <marex@denx.de <mailto:marex@denx.de>> schrieb am Mo., 8.
> Okt. 2018, 02:20:
> 
>     On 10/07/2018 01:08 PM, Simon Goldschmidt wrote:
>     > On 06.10.2018 22:38, Tom Rini wrote:
>     >> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
>     >>
>     >>> This patch prevents disabling the FPGA bridges when
>     >>> SPL or U-Boot is executed from FPGA onchip RAM.
>     >>>
>     >>> Signed-off-by: Simon Goldschmidt
>     <simon.k.r.goldschmidt@gmail.com
>     <mailto:simon.k.r.goldschmidt@gmail.com>>
>     >>> ---
>     >>>
>     >>>
>     >>> There are other patches required to make boot from
>     >>> FPGA work correctly:
>     >>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
>     >>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
>     >>>    https://patchwork.ozlabs.org/patch/976918/
>     >>> - spl_ram.c needs this patch by Michal Simek:
>     >>>    https://patchwork.ozlabs.org/patch/978694/
>     >>> - For U-Boot to be run from FPGA onchip RAM, either
>     >>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
>     >>>    is required to relocate gd->env_addr:
>     >>>    https://patchwork.ozlabs.org/patch/975702/
>     >> For the record, I'm currently reviewing the last two parts here.  The
>     >> first one will come soon (I do Kconfig migrations separate so I
>     can see
>     >> a lack of size change).
>     >
>     >
>     > OK, after Tom merged the last to parts, I can confirm I can
>     successfully
>     > boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking
>     > CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still
>     > missing).
> 
>     So is this patch still needed ?
> 
> 
> Yes, sorry for being unclear there.

Can we do what this patch does with less ifdeffery ? Maybe with simple
if (address > FOO && < bar) remap() ?
Simon Goldschmidt Oct. 8, 2018, 1:17 p.m. UTC | #6
On Mon, Oct 8, 2018 at 1:42 PM Marek Vasut <marex@denx.de> wrote:
>
> On 10/08/2018 06:04 AM, Simon Goldschmidt wrote:
> >
> >
> > Marek Vasut <marex@denx.de <mailto:marex@denx.de>> schrieb am Mo., 8.
> > Okt. 2018, 02:20:
> >
> >     On 10/07/2018 01:08 PM, Simon Goldschmidt wrote:
> >     > On 06.10.2018 22:38, Tom Rini wrote:
> >     >> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
> >     >>
> >     >>> This patch prevents disabling the FPGA bridges when
> >     >>> SPL or U-Boot is executed from FPGA onchip RAM.
> >     >>>
> >     >>> Signed-off-by: Simon Goldschmidt
> >     <simon.k.r.goldschmidt@gmail.com
> >     <mailto:simon.k.r.goldschmidt@gmail.com>>
> >     >>> ---
> >     >>>
> >     >>>
> >     >>> There are other patches required to make boot from
> >     >>> FPGA work correctly:
> >     >>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
> >     >>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
> >     >>>    https://patchwork.ozlabs.org/patch/976918/
> >     >>> - spl_ram.c needs this patch by Michal Simek:
> >     >>>    https://patchwork.ozlabs.org/patch/978694/
> >     >>> - For U-Boot to be run from FPGA onchip RAM, either
> >     >>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
> >     >>>    is required to relocate gd->env_addr:
> >     >>>    https://patchwork.ozlabs.org/patch/975702/
> >     >> For the record, I'm currently reviewing the last two parts here.  The
> >     >> first one will come soon (I do Kconfig migrations separate so I
> >     can see
> >     >> a lack of size change).
> >     >
> >     >
> >     > OK, after Tom merged the last to parts, I can confirm I can
> >     successfully
> >     > boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking
> >     > CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still
> >     > missing).
> >
> >     So is this patch still needed ?
> >
> >
> > Yes, sorry for being unclear there.
>
> Can we do what this patch does with less ifdeffery ? Maybe with simple
> if (address > FOO && < bar) remap() ?

Hmm, I can try, but the change in misc_gen5.c depends on whether we build SPL or
U-Boot, I'm not sure how to do that without ifdef...

Does 'if (CONFIG_IS_ENABLED(SPL_BUILD))' work? Does it look nice? It's not
used anywhere else like that.

Simon
Marek Vasut Oct. 8, 2018, 1:22 p.m. UTC | #7
On 10/08/2018 03:17 PM, Simon Goldschmidt wrote:
> On Mon, Oct 8, 2018 at 1:42 PM Marek Vasut <marex@denx.de> wrote:
>>
>> On 10/08/2018 06:04 AM, Simon Goldschmidt wrote:
>>>
>>>
>>> Marek Vasut <marex@denx.de <mailto:marex@denx.de>> schrieb am Mo., 8.
>>> Okt. 2018, 02:20:
>>>
>>>     On 10/07/2018 01:08 PM, Simon Goldschmidt wrote:
>>>     > On 06.10.2018 22:38, Tom Rini wrote:
>>>     >> On Sat, Oct 06, 2018 at 10:33:42PM +0200, Simon Goldschmidt wrote:
>>>     >>
>>>     >>> This patch prevents disabling the FPGA bridges when
>>>     >>> SPL or U-Boot is executed from FPGA onchip RAM.
>>>     >>>
>>>     >>> Signed-off-by: Simon Goldschmidt
>>>     <simon.k.r.goldschmidt@gmail.com
>>>     <mailto:simon.k.r.goldschmidt@gmail.com>>
>>>     >>> ---
>>>     >>>
>>>     >>>
>>>     >>> There are other patches required to make boot from
>>>     >>> FPGA work correctly:
>>>     >>> - CONFIG_SPL_TEXT_BASE needs to be set to 0xC0000000
>>>     >>>    ideally this is done by moving SPL_TEXT_BASE to Kconfig:
>>>     >>>    https://patchwork.ozlabs.org/patch/976918/
>>>     >>> - spl_ram.c needs this patch by Michal Simek:
>>>     >>>    https://patchwork.ozlabs.org/patch/978694/
>>>     >>> - For U-Boot to be run from FPGA onchip RAM, either
>>>     >>>    CONFIG_SYS_EXTRA_ENV_RELOC needs to be used or this patch
>>>     >>>    is required to relocate gd->env_addr:
>>>     >>>    https://patchwork.ozlabs.org/patch/975702/
>>>     >> For the record, I'm currently reviewing the last two parts here.  The
>>>     >> first one will come soon (I do Kconfig migrations separate so I
>>>     can see
>>>     >> a lack of size change).
>>>     >
>>>     >
>>>     > OK, after Tom merged the last to parts, I can confirm I can
>>>     successfully
>>>     > boot from FPGA by adapting CONFIG_SYS_TEXT_BASE via config and hacking
>>>     > CONFIG_SPL_TEXT_BASE to 0xC0000000 (as moving this to Kconfig is still
>>>     > missing).
>>>
>>>     So is this patch still needed ?
>>>
>>>
>>> Yes, sorry for being unclear there.
>>
>> Can we do what this patch does with less ifdeffery ? Maybe with simple
>> if (address > FOO && < bar) remap() ?
> 
> Hmm, I can try, but the change in misc_gen5.c depends on whether we build SPL or
> U-Boot, I'm not sure how to do that without ifdef...
> 
> Does 'if (CONFIG_IS_ENABLED(SPL_BUILD))' work? Does it look nice? It's not
> used anywhere else like that.

That's fine, I had those address range checks in mind.
diff mbox series

Patch

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
index bb9e3faa29..2725e9fcc3 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
@@ -6,6 +6,7 @@ 
 #ifndef _SOCFPGA_BASE_ADDRS_H_
 #define _SOCFPGA_BASE_ADDRS_H_
 
+#define SOCFPGA_FPGA_SLAVES_ADDRESS	0xc0000000
 #define SOCFPGA_STM_ADDRESS		0xfc000000
 #define SOCFPGA_DAP_ADDRESS		0xff000000
 #define SOCFPGA_EMAC0_ADDRESS		0xff700000
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 429c3d6cd5..fa66484783 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -187,7 +187,15 @@  void socfpga_sdram_remap_zero(void)
 	setbits_le32(&scu_regs->sacr, 0xfff);
 
 	/* Configure the L2 controller to make SDRAM start at 0 */
+#if (defined(CONFIG_SPL_BUILD) && \
+	(CONFIG_SPL_TEXT_BASE == SOCFPGA_FPGA_SLAVES_ADDRESS)) || \
+	((CONFIG_SYS_TEXT_BASE >= SOCFPGA_FPGA_SLAVES_ADDRESS) && \
+	(CONFIG_SYS_TEXT_BASE < SOCFPGA_STM_ADDRESS))
+	/* remap.mpuzero, keep fpga bridge enabled */
+	writel(0x9, &nic301_regs->remap);
+#else
 	writel(0x1, &nic301_regs->remap);	/* remap.mpuzero */
+#endif
 	writel(0x1, &pl310->pl310_addr_filter_start);
 }
 
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index be318cc0d9..41e7787f11 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -92,8 +92,10 @@  void board_init_f(ulong dummy)
 
 	/* Put everything into reset but L4WD0. */
 	socfpga_per_reset_all();
+#if CONFIG_SPL_TEXT_BASE != SOCFPGA_FPGA_SLAVES_ADDRESS
 	/* Put FPGA bridges into reset too. */
 	socfpga_bridges_reset(1);
+#endif
 
 	socfpga_per_reset(SOCFPGA_RESET(SDR), 0);
 	socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
@@ -163,5 +165,7 @@  void board_init_f(ulong dummy)
 		hang();
 	}
 
+#if CONFIG_SPL_TEXT_BASE != SOCFPGA_FPGA_SLAVES_ADDRESS
 	socfpga_bridges_reset(1);
+#endif
 }