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[4/4] spi: zynq_qspi: Fix programming qspi speed

Message ID 1657893679-20039-5-git-send-email-ashok.reddy.soma@xilinx.com
State Accepted
Commit 2a75bc1303b34e88745fcecfeacbe94f2a4bd1e2
Delegated to: Michal Simek
Headers show
Series Xilinx zynq_qspi updates | expand

Commit Message

Ashok Reddy Soma July 15, 2022, 2:01 p.m. UTC 
When programming qspi flash speed we need to check the requested flash
speed not to exceed the spi max frequency. In the current implementation
we are checking qspi ref clk instead. This commit fixes the issue by
checking the requested speed and programs the specified max frequency.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
---

 drivers/spi/zynq_qspi.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 52db7b3f21..00e3ffcd1d 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -622,15 +622,12 @@  static int zynq_qspi_set_speed(struct udevice *bus, uint speed)
 	uint32_t confr;
 	u8 baud_rate_val = 0;
 
-	if (speed > plat->frequency)
-		speed = plat->frequency;
+	if (!speed || speed > priv->max_hz)
+		speed = priv->max_hz;
 
 	/* Set the clock frequency */
 	confr = readl(&regs->cr);
-	if (speed == 0) {
-		/* Set baudrate x8, if the freq is 0 */
-		baud_rate_val = 0x2;
-	} else if (plat->speed_hz != speed) {
+	if (plat->speed_hz != speed) {
 		while ((baud_rate_val < ZYNQ_QSPI_CR_BAUD_MAX) &&
 		       ((plat->frequency /
 		       (2 << baud_rate_val)) > speed))